Merge tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-nextgrafted

Pull networking updates from Jakub Kicinski:
 "Core:

   - Add dedicated kmem_cache for typical/small skb->head, avoid having
     to access struct page at kfree time, and improve memory use.

   - Introduce sysctl to set default RPS configuration for new netdevs.

   - Define Netlink protocol specification format which can be used to
     describe messages used by each family and auto-generate parsers.
     Add tools for generating kernel data structures and uAPI headers.

   - Expose all net/core sysctls inside netns.

   - Remove 4s sleep in netpoll if carrier is instantly detected on
     boot.

   - Add configurable limit of MDB entries per port, and port-vlan.

   - Continue populating drop reasons throughout the stack.

   - Retire a handful of legacy Qdiscs and classifiers.

  Protocols:

   - Support IPv4 big TCP (TSO frames larger than 64kB).

   - Add IP_LOCAL_PORT_RANGE socket option, to control local port range
     on socket by socket basis.

   - Track and report in procfs number of MPTCP sockets used.

   - Support mixing IPv4 and IPv6 flows in the in-kernel MPTCP path
     manager.

   - IPv6: don't check net.ipv6.route.max_size and rely on garbage
     collection to free memory (similarly to IPv4).

   - Support Penultimate Segment Pop (PSP) flavor in SRv6 (RFC8986).

   - ICMP: add per-rate limit counters.

   - Add support for user scanning requests in ieee802154.

   - Remove static WEP support.

   - Support minimal Wi-Fi 7 Extremely High Throughput (EHT) rate
     reporting.

   - WiFi 7 EHT channel puncturing support (client & AP).

  BPF:

   - Add a rbtree data structure following the "next-gen data structure"
     precedent set by recently added linked list, that is, by using
     kfunc + kptr instead of adding a new BPF map type.

   - Expose XDP hints via kfuncs with initial support for RX hash and
     timestamp metadata.

   - Add BPF_F_NO_TUNNEL_KEY extension to bpf_skb_set_tunnel_key to
     better support decap on GRE tunnel devices not operating in collect
     metadata.

   - Improve x86 JIT's codegen for PROBE_MEM runtime error checks.

   - Remove the need for trace_printk_lock for bpf_trace_printk and
     bpf_trace_vprintk helpers.

   - Extend libbpf's bpf_tracing.h support for tracing arguments of
     kprobes/uprobes and syscall as a special case.

   - Significantly reduce the search time for module symbols by
     livepatch and BPF.

   - Enable cpumasks to be used as kptrs, which is useful for tracing
     programs tracking which tasks end up running on which CPUs in
     different time intervals.

   - Add support for BPF trampoline on s390x and riscv64.

   - Add capability to export the XDP features supported by the NIC.

   - Add __bpf_kfunc tag for marking kernel functions as kfuncs.

   - Add cgroup.memory=nobpf kernel parameter option to disable BPF
     memory accounting for container environments.

  Netfilter:

   - Remove the CLUSTERIP target. It has been marked as obsolete for
     years, and we still have WARN splats wrt races of the out-of-band
     /proc interface installed by this target.

   - Add 'destroy' commands to nf_tables. They are identical to the
     existing 'delete' commands, but do not return an error if the
     referenced object (set, chain, rule...) did not exist.

  Driver API:

   - Improve cpumask_local_spread() locality to help NICs set the right
     IRQ affinity on AMD platforms.

   - Separate C22 and C45 MDIO bus transactions more clearly.

   - Introduce new DCB table to control DSCP rewrite on egress.

   - Support configuration of Physical Layer Collision Avoidance (PLCA)
     Reconciliation Sublayer (RS) (802.3cg-2019). Modern version of
     shared medium Ethernet.

   - Support for MAC Merge layer (IEEE 802.3-2018 clause 99). Allowing
     preemption of low priority frames by high priority frames.

   - Add support for controlling MACSec offload using netlink SET.

   - Rework devlink instance refcounts to allow registration and
     de-registration under the instance lock. Split the code into
     multiple files, drop some of the unnecessarily granular locks and
     factor out common parts of netlink operation handling.

   - Add TX frame aggregation parameters (for USB drivers).

   - Add a new attr TCA_EXT_WARN_MSG to report TC (offload) warning
     messages with notifications for debug.

   - Allow offloading of UDP NEW connections via act_ct.

   - Add support for per action HW stats in TC.

   - Support hardware miss to TC action (continue processing in SW from
     a specific point in the action chain).

   - Warn if old Wireless Extension user space interface is used with
     modern cfg80211/mac80211 drivers. Do not support Wireless
     Extensions for Wi-Fi 7 devices at all. Everyone should switch to
     using nl80211 interface instead.

   - Improve the CAN bit timing configuration. Use extack to return
     error messages directly to user space, update the SJW handling,
     including the definition of a new default value that will benefit
     CAN-FD controllers, by increasing their oscillator tolerance.

  New hardware / drivers:

   - Ethernet:
      - nVidia BlueField-3 support (control traffic driver)
      - Ethernet support for imx93 SoCs
      - Motorcomm yt8531 gigabit Ethernet PHY
      - onsemi NCN26000 10BASE-T1S PHY (with support for PLCA)
      - Microchip LAN8841 PHY (incl. cable diagnostics and PTP)
      - Amlogic gxl MDIO mux

   - WiFi:
      - RealTek RTL8188EU (rtl8xxxu)
      - Qualcomm Wi-Fi 7 devices (ath12k)

   - CAN:
      - Renesas R-Car V4H

  Drivers:

   - Bluetooth:
      - Set Per Platform Antenna Gain (PPAG) for Intel controllers.

   - Ethernet NICs:
      - Intel (1G, igc):
         - support TSN / Qbv / packet scheduling features of i226 model
      - Intel (100G, ice):
         - use GNSS subsystem instead of TTY
         - multi-buffer XDP support
         - extend support for GPIO pins to E823 devices
      - nVidia/Mellanox:
         - update the shared buffer configuration on PFC commands
         - implement PTP adjphase function for HW offset control
         - TC support for Geneve and GRE with VF tunnel offload
         - more efficient crypto key management method
         - multi-port eswitch support
      - Netronome/Corigine:
         - add DCB IEEE support
         - support IPsec offloading for NFP3800
      - Freescale/NXP (enetc):
         - support XDP_REDIRECT for XDP non-linear buffers
         - improve reconfig, avoid link flap and waiting for idle
         - support MAC Merge layer
      - Other NICs:
         - sfc/ef100: add basic devlink support for ef100
         - ionic: rx_push mode operation (writing descriptors via MMIO)
         - bnxt: use the auxiliary bus abstraction for RDMA
         - r8169: disable ASPM and reset bus in case of tx timeout
         - cpsw: support QSGMII mode for J721e CPSW9G
         - cpts: support pulse-per-second output
         - ngbe: add an mdio bus driver
         - usbnet: optimize usbnet_bh() by avoiding unnecessary queuing
         - r8152: handle devices with FW with NCM support
         - amd-xgbe: support 10Mbps, 2.5GbE speeds and rx-adaptation
         - virtio-net: support multi buffer XDP
         - virtio/vsock: replace virtio_vsock_pkt with sk_buff
         - tsnep: XDP support

   - Ethernet high-speed switches:
      - nVidia/Mellanox (mlxsw):
         - add support for latency TLV (in FW control messages)
      - Microchip (sparx5):
         - separate explicit and implicit traffic forwarding rules, make
           the implicit rules always active
         - add support for egress DSCP rewrite
         - IS0 VCAP support (Ingress Classification)
         - IS2 VCAP filters (protos, L3 addrs, L4 ports, flags, ToS
           etc.)
         - ES2 VCAP support (Egress Access Control)
         - support for Per-Stream Filtering and Policing (802.1Q,
           8.6.5.1)

   - Ethernet embedded switches:
      - Marvell (mv88e6xxx):
         - add MAB (port auth) offload support
         - enable PTP receive for mv88e6390
      - NXP (ocelot):
         - support MAC Merge layer
         - support for the the vsc7512 internal copper phys
      - Microchip:
         - lan9303: convert to PHYLINK
         - lan966x: support TC flower filter statistics
         - lan937x: PTP support for KSZ9563/KSZ8563 and LAN937x
         - lan937x: support Credit Based Shaper configuration
         - ksz9477: support Energy Efficient Ethernet
      - other:
         - qca8k: convert to regmap read/write API, use bulk operations
         - rswitch: Improve TX timestamp accuracy

   - Intel WiFi (iwlwifi):
      - EHT (Wi-Fi 7) rate reporting
      - STEP equalizer support: transfer some STEP (connection to radio
        on platforms with integrated wifi) related parameters from the
        BIOS to the firmware.

   - Qualcomm 802.11ax WiFi (ath11k):
      - IPQ5018 support
      - Fine Timing Measurement (FTM) responder role support
      - channel 177 support

   - MediaTek WiFi (mt76):
      - per-PHY LED support
      - mt7996: EHT (Wi-Fi 7) support
      - Wireless Ethernet Dispatch (WED) reset support
      - switch to using page pool allocator

   - RealTek WiFi (rtw89):
      - support new version of Bluetooth co-existance

   - Mobile:
      - rmnet: support TX aggregation"

* tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1872 commits)
  page_pool: add a comment explaining the fragment counter usage
  net: ethtool: fix __ethtool_dev_mm_supported() implementation
  ethtool: pse-pd: Fix double word in comments
  xsk: add linux/vmalloc.h to xsk.c
  sefltests: netdevsim: wait for devlink instance after netns removal
  selftest: fib_tests: Always cleanup before exit
  net/mlx5e: Align IPsec ASO result memory to be as required by hardware
  net/mlx5e: TC, Set CT miss to the specific ct action instance
  net/mlx5e: Rename CHAIN_TO_REG to MAPPED_OBJ_TO_REG
  net/mlx5: Refactor tc miss handling to a single function
  net/mlx5: Kconfig: Make tc offload depend on tc skb extension
  net/sched: flower: Support hardware miss to tc action
  net/sched: flower: Move filter handle initialization earlier
  net/sched: cls_api: Support hardware miss to tc action
  net/sched: Rename user cookie and act cookie
  sfc: fix builds without CONFIG_RTC_LIB
  sfc: clean up some inconsistent indentings
  net/mlx4_en: Introduce flexible array to silence overflow warning
  net: lan966x: Fix possible deadlock inside PTP
  net/ulp: Remove redundant ->clone() test in inet_clone_ulp().
  ...

1 files changed, 624 insertions, 0 deletions

diff --git a/drivers/pinctrl/mediatek/pinctrl-mt6795.c b/drivers/pinctrl/mediatek/pinctrl-mt6795.c
new file mode 100644
index 000000000..01e855ccd
--- /dev/null
+++ b/drivers/pinctrl/mediatek/pinctrl-mt6795.c
@@ -0,0 +1,624 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2022 Collabora Ltd.
+ * Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
+ */
+
+#include "pinctrl-mtk-mt6795.h"
+#include "pinctrl-paris.h"
+
+#define PIN_FIELD15(_s_pin, _e_pin, _s_addr, _x_addrs, _s_bit, _x_bits)	\
+	PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit,	\
+		       _x_bits, 15, 0)
+
+#define PIN_FIELD16(_s_pin, _e_pin, _s_addr, _x_addrs, _s_bit, _x_bits)	\
+	PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit,	\
+		       _x_bits, 16, 0)
+
+#define PINS_FIELD16(_s_pin, _e_pin, _s_addr, _x_addrs, _s_bit, _x_bits)\
+	PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit,	\
+		       _x_bits, 16, 1)
+
+static const struct mtk_pin_field_calc mt6795_pin_dir_range[] = {
+	PIN_FIELD16(0, 196, 0x0, 0x10, 0, 1),
+};
+
+static const struct mtk_pin_field_calc mt6795_pin_pullen_range[] = {
+	PIN_FIELD16(0, 196, 0x100, 0x10, 0, 1),
+};
+
+static const struct mtk_pin_field_calc mt6795_pin_pullsel_range[] = {
+	PIN_FIELD16(0, 196, 0x200, 0x10, 0, 1),
+};
+
+static const struct mtk_pin_field_calc mt6795_pin_do_range[] = {
+	PIN_FIELD16(0, 196, 0x400, 0x10, 0, 1),
+};
+
+static const struct mtk_pin_field_calc mt6795_pin_di_range[] = {
+	PIN_FIELD16(0, 196, 0x500, 0x10, 0, 1),
+};
+
+static const struct mtk_pin_field_calc mt6795_pin_mode_range[] = {
+	PIN_FIELD15(0, 196, 0x600, 0x10, 0, 3),
+};
+
+static const struct mtk_pin_field_calc mt6795_pin_ies_range[] = {
+	PINS_FIELD16(0, 4, 0x900, 0x10, 1, 1),
+	PINS_FIELD16(5, 9, 0x900, 0x10, 2, 1),
+	PINS_FIELD16(10, 15, 0x900, 0x10, 10, 1),
+	PINS_FIELD16(16, 16, 0x900, 0x10, 2, 1),
+	PINS_FIELD16(17, 19, 0x910, 0x10, 3, 1),
+	PINS_FIELD16(20, 22, 0x910, 0x10, 4, 1),
+	PINS_FIELD16(23, 26, 0xce0, 0x10, 14, 1),
+	PINS_FIELD16(27, 27, 0xcc0, 0x10, 14, 1),
+	PINS_FIELD16(28, 28, 0xcd0, 0x10, 14, 1),
+	PINS_FIELD16(29, 32, 0x900, 0x10, 3, 1),
+	PINS_FIELD16(33, 33, 0x900, 0x10, 4, 1),
+	PINS_FIELD16(34, 36, 0x900, 0x10, 5, 1),
+	PINS_FIELD16(37, 38, 0x900, 0x10, 6, 1),
+	PINS_FIELD16(39, 39, 0x900, 0x10, 7, 1),
+	PINS_FIELD16(40, 40, 0x900, 0x10, 8, 1),
+	PINS_FIELD16(41, 42, 0x900, 0x10, 9, 1),
+	PINS_FIELD16(43, 46, 0x900, 0x10, 11, 1),
+	PINS_FIELD16(47, 61, 0x920, 0x10, 3, 1),
+	PINS_FIELD16(62, 66, 0x920, 0x10, 4, 1),
+	PINS_FIELD16(67, 67, 0x920, 0x10, 3, 1),
+	PINS_FIELD16(68, 72, 0x920, 0x10, 5, 1),
+	PINS_FIELD16(73, 77, 0x920, 0x10, 6, 1),
+	PINS_FIELD16(78, 91, 0x920, 0x10, 7, 1),
+	PINS_FIELD16(92, 92, 0x900, 0x10, 13, 1),
+	PINS_FIELD16(93, 95, 0x900, 0x10, 14, 1),
+	PINS_FIELD16(96, 99, 0x900, 0x10, 15, 1),
+	PINS_FIELD16(100, 103, 0xca0, 0x10, 14, 1),
+	PINS_FIELD16(104, 104, 0xc80, 0x10, 14, 1),
+	PINS_FIELD16(105, 105, 0xc90, 0x10, 14, 1),
+	PINS_FIELD16(106, 107, 0x910, 0x10, 0, 1),
+	PINS_FIELD16(108, 112, 0x910, 0x10, 1, 1),
+	PINS_FIELD16(113, 116, 0x910, 0x10, 2, 1),
+	PINS_FIELD16(117, 118, 0x910, 0x10, 5, 1),
+	PINS_FIELD16(119, 124, 0x910, 0x10, 6, 1),
+	PINS_FIELD16(125, 126, 0x910, 0x10, 7, 1),
+	PINS_FIELD16(129, 129, 0x910, 0x10, 8, 1),
+	PINS_FIELD16(130, 131, 0x910, 0x10, 9, 1),
+	PINS_FIELD16(132, 135, 0x910, 0x10, 8, 1),
+	PINS_FIELD16(136, 137, 0x910, 0x10, 7, 1),
+	PINS_FIELD16(154, 161, 0xc20, 0x10, 14, 1),
+	PINS_FIELD16(162, 162, 0xc10, 0x10, 14, 1),
+	PINS_FIELD16(163, 163, 0xc00, 0x10, 14, 1),
+	PINS_FIELD16(164, 164, 0xd10, 0x10, 14, 1),
+	PINS_FIELD16(165, 165, 0xd00, 0x10, 14, 1),
+	PINS_FIELD16(166, 169, 0x910, 0x10, 14, 1),
+	PINS_FIELD16(176, 179, 0x910, 0x10, 15, 1),
+	PINS_FIELD16(180, 180, 0x920, 0x10, 0, 1),
+	PINS_FIELD16(181, 184, 0x920, 0x10, 1, 1),
+	PINS_FIELD16(185, 191, 0x920, 0x10, 2, 1),
+	PINS_FIELD16(192, 192, 0x920, 0x10, 8, 1),
+	PINS_FIELD16(193, 194, 0x920, 0x10, 9, 1),
+	PINS_FIELD16(195, 196, 0x920, 0x10, 8, 1),
+};
+
+static const struct mtk_pin_field_calc mt6795_pin_smt_range[] = {
+	PINS_FIELD16(0, 4, 0x930, 0x10, 1, 1),
+	PINS_FIELD16(5, 9, 0x930, 0x10, 2, 1),
+	PINS_FIELD16(10, 15, 0x930, 0x10, 10, 1),
+	PINS_FIELD16(16, 16, 0x930, 0x10, 2, 1),
+	PINS_FIELD16(17, 19, 0x940, 0x10, 3, 1),
+	PINS_FIELD16(20, 22, 0x940, 0x10, 4, 1),
+	PINS_FIELD16(23, 26, 0xce0, 0x10, 13, 1),
+	PINS_FIELD16(27, 27, 0xcc0, 0x10, 13, 1),
+	PINS_FIELD16(28, 28, 0xcd0, 0x10, 13, 1),
+	PINS_FIELD16(29, 32, 0x930, 0x10, 3, 1),
+	PINS_FIELD16(33, 33, 0x930, 0x10, 4, 1),
+	PINS_FIELD16(34, 36, 0x930, 0x10, 5, 1),
+	PINS_FIELD16(37, 38, 0x930, 0x10, 6, 1),
+	PINS_FIELD16(39, 39, 0x930, 0x10, 7, 1),
+	PINS_FIELD16(40, 40, 0x930, 0x10, 8, 1),
+	PINS_FIELD16(41, 42, 0x930, 0x10, 9, 1),
+	PINS_FIELD16(43, 46, 0x930, 0x10, 11, 1),
+	PINS_FIELD16(47, 61, 0x950, 0x10, 3, 1),
+	PINS_FIELD16(62, 66, 0x950, 0x10, 4, 1),
+	PINS_FIELD16(67, 67, 0x950, 0x10, 3, 1),
+	PINS_FIELD16(68, 72, 0x950, 0x10, 5, 1),
+	PINS_FIELD16(73, 77, 0x950, 0x10, 6, 1),
+	PINS_FIELD16(78, 91, 0x950, 0x10, 7, 1),
+	PINS_FIELD16(92, 92, 0x930, 0x10, 13, 1),
+	PINS_FIELD16(93, 95, 0x930, 0x10, 14, 1),
+	PINS_FIELD16(96, 99, 0x930, 0x10, 15, 1),
+	PINS_FIELD16(100, 103, 0xca0, 0x10, 13, 1),
+	PINS_FIELD16(104, 104, 0xc80, 0x10, 13, 1),
+	PINS_FIELD16(105, 105, 0xc90, 0x10, 13, 1),
+	PINS_FIELD16(106, 107, 0x940, 0x10, 0, 1),
+	PINS_FIELD16(108, 112, 0x940, 0x10, 1, 1),
+	PINS_FIELD16(113, 116, 0x940, 0x10, 2, 1),
+	PINS_FIELD16(117, 118, 0x940, 0x10, 5, 1),
+	PINS_FIELD16(119, 124, 0x940, 0x10, 6, 1),
+	PINS_FIELD16(125, 126, 0x940, 0x10, 7, 1),
+	PINS_FIELD16(129, 129, 0x940, 0x10, 8, 1),
+	PINS_FIELD16(130, 131, 0x940, 0x10, 9, 1),
+	PINS_FIELD16(132, 135, 0x940, 0x10, 8, 1),
+	PINS_FIELD16(136, 137, 0x940, 0x10, 7, 1),
+	PINS_FIELD16(154, 161, 0xc20, 0x10, 13, 1),
+	PINS_FIELD16(162, 162, 0xc10, 0x10, 13, 1),
+	PINS_FIELD16(163, 163, 0xc00, 0x10, 13, 1),
+	PINS_FIELD16(164, 164, 0xd10, 0x10, 13, 1),
+	PINS_FIELD16(165, 165, 0xd00, 0x10, 13, 1),
+	PINS_FIELD16(166, 169, 0x940, 0x10, 14, 1),
+	PINS_FIELD16(176, 179, 0x940, 0x10, 15, 1),
+	PINS_FIELD16(180, 180, 0x950, 0x10, 0, 1),
+	PINS_FIELD16(181, 184, 0x950, 0x10, 1, 1),
+	PINS_FIELD16(185, 191, 0x950, 0x10, 2, 1),
+	PINS_FIELD16(192, 192, 0x950, 0x10, 8, 1),
+	PINS_FIELD16(193, 194, 0x950, 0x10, 9, 1),
+	PINS_FIELD16(195, 196, 0x950, 0x10, 8, 1),
+};
+
+
+static const struct mtk_pin_field_calc mt6795_pin_pupd_range[] = {
+	/* KROW */
+	PIN_FIELD16(119, 119, 0xe00, 0x10, 2, 1),	/* KROW0 */
+	PIN_FIELD16(120, 120, 0xe00, 0x10, 6, 1),	/* KROW1 */
+	PIN_FIELD16(121, 121, 0xe00, 0x10, 10, 1),	/* KROW2 */
+	PIN_FIELD16(122, 122, 0xe10, 0x10, 2, 1),	/* KCOL0 */
+	PIN_FIELD16(123, 123, 0xe10, 0x10, 6, 1),	/* KCOL1 */
+	PIN_FIELD16(124, 124, 0xe10, 0x10, 10, 1),	/* KCOL2 */
+
+	/* DPI */
+	PIN_FIELD16(138, 138, 0xd50, 0x10, 2, 1),	/* CK */
+	PIN_FIELD16(139, 139, 0xd60, 0x10, 1, 1),	/* DE */
+	PIN_FIELD16(140, 140, 0xd70, 0x10, 1, 1),	/* data0 */
+	PIN_FIELD16(141, 141, 0xd70, 0x10, 3, 1),	/* data1 */
+	PIN_FIELD16(142, 142, 0xd70, 0x10, 5, 1),	/* data2 */
+	PIN_FIELD16(143, 143, 0xd70, 0x10, 7, 1),	/* data3 */
+	PIN_FIELD16(144, 144, 0xd50, 0x10, 5, 1),	/* data4 */
+	PIN_FIELD16(145, 145, 0xd50, 0x10, 7, 1),	/* data5 */
+	PIN_FIELD16(146, 146, 0xd60, 0x10, 7, 1),	/* data6 */
+	PIN_FIELD16(147, 147, 0xed0, 0x10, 6, 1),	/* data7 */
+	PIN_FIELD16(148, 148, 0xed0, 0x10, 8, 1),	/* data8 */
+	PIN_FIELD16(149, 149, 0xed0, 0x10, 10, 1),	/* data9 */
+	PIN_FIELD16(150, 150, 0xed0, 0x10, 12, 1),	/* data10 */
+	PIN_FIELD16(151, 151, 0xed0, 0x10, 14, 1),	/* data11 */
+	PIN_FIELD16(152, 152, 0xd60, 0x10, 3, 1),	/* hsync */
+	PIN_FIELD16(153, 153, 0xd60, 0x10, 5, 1),	/* vsync */
+
+	/* MSDC0 */
+	PIN_FIELD16(154, 154, 0xc20, 0x10, 2, 1),	/* DATA 0-7 */
+	PIN_FIELD16(155, 155, 0xc20, 0x10, 2, 1),	/* DATA 0-7 */
+	PIN_FIELD16(156, 156, 0xc20, 0x10, 2, 1),	/* DATA 0-7 */
+	PIN_FIELD16(157, 157, 0xc20, 0x10, 2, 1),	/* DATA 0-7 */
+	PIN_FIELD16(158, 158, 0xc20, 0x10, 2, 1),	/* DATA 0-7 */
+	PIN_FIELD16(159, 159, 0xc20, 0x10, 2, 1),	/* DATA 0-7 */
+	PIN_FIELD16(160, 160, 0xc20, 0x10, 2, 1),	/* DATA 0-7 */
+	PIN_FIELD16(161, 161, 0xc20, 0x10, 2, 1),	/* DATA 0-7 */
+	PIN_FIELD16(162, 162, 0xc10, 0x10, 2, 1),	/* CMD */
+	PIN_FIELD16(163, 163, 0xc00, 0x10, 2, 1),	/* CLK */
+	PIN_FIELD16(164, 164, 0xd10, 0x10, 2, 1),	/* DS  */
+	PIN_FIELD16(165, 165, 0xd00, 0x10, 2, 1),	/* RST */
+
+	/* MSDC1 */
+	PIN_FIELD16(170, 170, 0xc50, 0x10, 2, 1),	/* CMD */
+	PIN_FIELD16(171, 171, 0xd20, 0x10, 2, 1),	/* DAT0 */
+	PIN_FIELD16(172, 172, 0xd20, 0x10, 6, 1),	/* DAT1 */
+	PIN_FIELD16(173, 173, 0xd20, 0x10, 10, 1),	/* DAT2 */
+	PIN_FIELD16(174, 174, 0xd20, 0x10, 14, 1),	/* DAT3 */
+	PIN_FIELD16(175, 175, 0xc40, 0x10, 2, 1),	/* CLK */
+
+	/* MSDC2 */
+	PIN_FIELD16(100, 100, 0xd30, 0x10, 2, 1),	/* DAT0 */
+	PIN_FIELD16(101, 101, 0xd30, 0x10, 6, 1),	/* DAT1 */
+	PIN_FIELD16(102, 102, 0xd30, 0x10, 10, 1),	/* DAT2 */
+	PIN_FIELD16(103, 103, 0xd30, 0x10, 14, 1),	/* DAT3 */
+	PIN_FIELD16(104, 104, 0xc80, 0x10, 2, 1),	/* CLK */
+	PIN_FIELD16(105, 105, 0xc90, 0x10, 2, 1),	/* CMD */
+
+	/* MSDC3 */
+	PIN_FIELD16(23, 23, 0xd40, 0x10, 2, 1),		/* DAT0 */
+	PIN_FIELD16(24, 24, 0xd40, 0x10, 6, 5),		/* DAT1 */
+	PIN_FIELD16(25, 25, 0xd40, 0x10, 10, 9),	/* DAT2 */
+	PIN_FIELD16(26, 26, 0xd40, 0x10, 14, 13),	/* DAT3 */
+	PIN_FIELD16(27, 27, 0xcc0, 0x10, 2, 1),		/* CLK */
+	PIN_FIELD16(28, 28, 0xcd0, 0x10, 2, 1)		/* CMD */
+};
+
+static const struct mtk_pin_field_calc mt6795_pin_r0_range[] = {
+	PIN_FIELD16(23, 23, 0xd40, 0x10, 0, 1),
+	PIN_FIELD16(24, 24, 0xd40, 0x10, 4, 1),
+	PIN_FIELD16(25, 25, 0xd40, 0x10, 8, 1),
+	PIN_FIELD16(26, 26, 0xd40, 0x10, 12, 1),
+	PIN_FIELD16(27, 27, 0xcc0, 0x10, 0, 1),
+	PIN_FIELD16(28, 28, 0xcd0, 0x10, 0, 1),
+	PIN_FIELD16(100, 100, 0xd30, 0x10, 0, 1),
+	PIN_FIELD16(101, 101, 0xd30, 0x10, 4, 1),
+	PIN_FIELD16(102, 102, 0xd30, 0x10, 8, 1),
+	PIN_FIELD16(103, 103, 0xd30, 0x10, 12, 1),
+	PIN_FIELD16(104, 104, 0xc80, 0x10, 0, 1),
+	PIN_FIELD16(105, 105, 0xc90, 0x10, 0, 1),
+	PIN_FIELD16(119, 119, 0xe00, 0x10, 0, 1),
+	PIN_FIELD16(120, 120, 0xe00, 0x10, 4, 1),
+	PIN_FIELD16(121, 121, 0xe00, 0x10, 8, 1),
+	PIN_FIELD16(122, 122, 0xe10, 0x10, 0, 1),
+	PIN_FIELD16(123, 123, 0xe10, 0x10, 4, 1),
+	PIN_FIELD16(124, 124, 0xe10, 0x10, 8, 1),
+	PIN_FIELD16(138, 138, 0xd50, 0x10, 0, 1),
+	PIN_FIELD16(139, 139, 0xd60, 0x10, 0, 1),
+	PIN_FIELD16(140, 140, 0xd70, 0x10, 0, 1),
+	PIN_FIELD16(141, 141, 0xd70, 0x10, 1, 1),
+	PIN_FIELD16(142, 142, 0xd70, 0x10, 3, 1),
+	PIN_FIELD16(143, 143, 0xd70, 0x10, 5, 1),
+	PIN_FIELD16(144, 144, 0xd50, 0x10, 3, 1),
+	PIN_FIELD16(145, 145, 0xd50, 0x10, 5, 1),
+	PIN_FIELD16(146, 146, 0xd60, 0x10, 5, 1),
+	PIN_FIELD16(147, 147, 0xed0, 0x10, 4, 1),
+	PIN_FIELD16(148, 148, 0xed0, 0x10, 6, 1),
+	PIN_FIELD16(149, 149, 0xed0, 0x10, 8, 1),
+	PIN_FIELD16(150, 150, 0xed0, 0x10, 10, 1),
+	PIN_FIELD16(151, 151, 0xed0, 0x10, 12, 1),
+	PIN_FIELD16(152, 152, 0xd60, 0x10, 1, 1),
+	PIN_FIELD16(153, 153, 0xd60, 0x10, 3, 1),
+	PIN_FIELD16(154, 155, 0xc20, 0x10, 0, 1),
+	PIN_FIELD16(155, 156, 0xc20, 0x10, 0, 1),
+	PIN_FIELD16(156, 157, 0xc20, 0x10, 0, 1),
+	PIN_FIELD16(157, 158, 0xc20, 0x10, 0, 1),
+	PIN_FIELD16(158, 159, 0xc20, 0x10, 0, 1),
+	PIN_FIELD16(159, 160, 0xc20, 0x10, 0, 1),
+	PIN_FIELD16(160, 161, 0xc20, 0x10, 0, 1),
+	PIN_FIELD16(161, 161, 0xc20, 0x10, 0, 1),
+	PIN_FIELD16(162, 162, 0xc10, 0x10, 0, 1),
+	PIN_FIELD16(163, 163, 0xc00, 0x10, 0, 1),
+	PIN_FIELD16(164, 164, 0xd10, 0x10, 0, 1),
+	PIN_FIELD16(165, 165, 0xd00, 0x10, 0, 1),
+	PIN_FIELD16(170, 170, 0xc50, 0x10, 0, 1),
+	PIN_FIELD16(171, 171, 0xd20, 0x10, 0, 1),
+	PIN_FIELD16(172, 172, 0xd20, 0x10, 4, 1),
+	PIN_FIELD16(173, 173, 0xd20, 0x10, 8, 1),
+	PIN_FIELD16(174, 174, 0xd20, 0x10, 12, 1),
+	PIN_FIELD16(175, 175, 0xc40, 0x10, 0, 1),
+};
+
+static const struct mtk_pin_field_calc mt6795_pin_r1_range[] = {
+	PIN_FIELD16(23, 23, 0xd40, 0x10, 1, 1),
+	PIN_FIELD16(24, 24, 0xd40, 0x10, 5, 1),
+	PIN_FIELD16(25, 25, 0xd40, 0x10, 9, 1),
+	PIN_FIELD16(26, 26, 0xd40, 0x10, 13, 1),
+	PIN_FIELD16(27, 27, 0xcc0, 0x10, 1, 1),
+	PIN_FIELD16(28, 28, 0xcd0, 0x10, 1, 1),
+	PIN_FIELD16(100, 100, 0xd30, 0x10, 1, 1),
+	PIN_FIELD16(101, 101, 0xd30, 0x10, 5, 1),
+	PIN_FIELD16(102, 102, 0xd30, 0x10, 9, 1),
+	PIN_FIELD16(103, 103, 0xd30, 0x10, 13, 1),
+	PIN_FIELD16(104, 104, 0xc80, 0x10, 1, 1),
+	PIN_FIELD16(105, 105, 0xc90, 0x10, 1, 1),
+	PIN_FIELD16(119, 119, 0xe00, 0x10, 1, 1),
+	PIN_FIELD16(120, 120, 0xe00, 0x10, 5, 1),
+	PIN_FIELD16(121, 121, 0xe00, 0x10, 9, 1),
+	PIN_FIELD16(122, 122, 0xe10, 0x10, 1, 1),
+	PIN_FIELD16(123, 123, 0xe10, 0x10, 5, 1),
+	PIN_FIELD16(124, 124, 0xe10, 0x10, 9, 1),
+	PIN_FIELD16(138, 138, 0xd50, 0x10, 1, 1),
+	PIN_FIELD16(139, 139, 0xd60, 0x10, 0, 1),
+	PIN_FIELD16(140, 140, 0xd70, 0x10, 0, 1),
+	PIN_FIELD16(141, 141, 0xd70, 0x10, 2, 1),
+	PIN_FIELD16(142, 142, 0xd70, 0x10, 4, 1),
+	PIN_FIELD16(143, 143, 0xd70, 0x10, 6, 1),
+	PIN_FIELD16(144, 144, 0xd50, 0x10, 4, 1),
+	PIN_FIELD16(145, 145, 0xd50, 0x10, 6, 1),
+	PIN_FIELD16(146, 146, 0xd60, 0x10, 6, 1),
+	PIN_FIELD16(147, 147, 0xed0, 0x10, 5, 1),
+	PIN_FIELD16(148, 148, 0xed0, 0x10, 7, 1),
+	PIN_FIELD16(149, 149, 0xed0, 0x10, 9, 1),
+	PIN_FIELD16(150, 150, 0xed0, 0x10, 11, 1),
+	PIN_FIELD16(151, 151, 0xed0, 0x10, 13, 1),
+	PIN_FIELD16(152, 152, 0xd60, 0x10, 2, 1),
+	PIN_FIELD16(153, 153, 0xd60, 0x10, 4, 1),
+	PIN_FIELD16(154, 155, 0xc20, 0x10, 1, 1),
+	PIN_FIELD16(155, 156, 0xc20, 0x10, 1, 1),
+	PIN_FIELD16(156, 157, 0xc20, 0x10, 1, 1),
+	PIN_FIELD16(157, 158, 0xc20, 0x10, 1, 1),
+	PIN_FIELD16(158, 159, 0xc20, 0x10, 1, 1),
+	PIN_FIELD16(159, 160, 0xc20, 0x10, 1, 1),
+	PIN_FIELD16(160, 161, 0xc20, 0x10, 1, 1),
+	PIN_FIELD16(161, 161, 0xc20, 0x10, 1, 1),
+	PIN_FIELD16(162, 162, 0xc10, 0x10, 1, 1),
+	PIN_FIELD16(163, 163, 0xc00, 0x10, 1, 1),
+	PIN_FIELD16(164, 164, 0xd10, 0x10, 1, 1),
+	PIN_FIELD16(165, 165, 0xd00, 0x10, 1, 1),
+	PIN_FIELD16(170, 170, 0xc50, 0x10, 1, 1),
+	PIN_FIELD16(171, 171, 0xd20, 0x10, 1, 1),
+	PIN_FIELD16(172, 172, 0xd20, 0x10, 5, 1),
+	PIN_FIELD16(173, 173, 0xd20, 0x10, 9, 1),
+	PIN_FIELD16(174, 174, 0xd20, 0x10, 13, 1),
+	PIN_FIELD16(175, 175, 0xc40, 0x10, 1, 1),
+};
+
+static const struct mtk_pin_field_calc mt6795_pin_drv_range[] = {
+	PINS_FIELD16(0, 4, 0xb30, 0x10, 13, 2),
+	PINS_FIELD16(5, 9, 0xb30, 0x10, 1, 2),
+	PINS_FIELD16(10, 15, 0xb30, 0x10, 5, 2),
+	PIN_FIELD16(16, 16, 0xb30, 0x10, 1, 2),
+	PINS_FIELD16(17, 19, 0xb70, 0x10, 5, 2),
+	PINS_FIELD16(20, 22, 0xb70, 0x10, 9, 2),
+	PINS_FIELD16(23, 26, 0xce0, 0x10, 8, 2),
+	PIN_FIELD16(27, 27, 0xcc0, 0x10, 8, 2),
+	PIN_FIELD16(28, 28, 0xcd0, 0x10, 8, 2),
+	PINS_FIELD16(29, 32, 0xb80, 0x10, 13, 2),
+	PIN_FIELD16(33, 33, 0xb10, 0x10, 13, 2),
+	PINS_FIELD16(34, 36, 0xb10, 0x10, 9, 2),
+	PINS_FIELD16(37, 38, 0xb10, 0x10, 5, 2),
+	PIN_FIELD16(39, 39, 0xb20, 0x10, 1, 2),
+	PIN_FIELD16(40, 40, 0xb20, 0x10, 5, 2),
+	PINS_FIELD16(41, 42, 0xb20, 0x10, 9, 2),
+	PINS_FIELD16(47, 61, 0xb00, 0x10, 9, 2),
+	PINS_FIELD16(62, 66, 0xb70, 0x10, 1, 2),
+	PINS_FIELD16(67, 67, 0xb00, 0x10, 9, 2),
+	PINS_FIELD16(68, 72, 0xb60, 0x10, 13, 2),
+	PINS_FIELD16(73, 77, 0xb40, 0x10, 13, 2),
+	PIN_FIELD16(78, 78, 0xb00, 0x10, 12, 3),
+	PINS_FIELD16(79, 91, 0xb00, 0x10, 13, 2),
+	PIN_FIELD16(92, 92, 0xb60, 0x10, 5, 2),
+	PINS_FIELD16(93, 95, 0xb60, 0x10, 1, 2),
+	PINS_FIELD16(96, 99, 0xb80, 0x10, 9, 2),
+	PINS_FIELD16(100, 103, 0xca0, 0x10, 8, 2),
+	PIN_FIELD16(104, 104, 0xc80, 0x10, 8, 2),
+	PIN_FIELD16(105, 105, 0xc90, 0x10, 8, 2),
+	PINS_FIELD16(106, 107, 0xb50, 0x10, 9, 2),
+	PINS_FIELD16(108, 112, 0xb50, 0x10, 1, 2),
+	PINS_FIELD16(113, 116, 0xb80, 0x10, 5, 2),
+	PINS_FIELD16(117, 118, 0xb90, 0x10, 1, 2),
+	PINS_FIELD16(119, 124, 0xb50, 0x10, 5, 2),
+	PIN_FIELD16(127, 127, 0xb70, 0x10, 5, 2),
+	PIN_FIELD16(128, 128, 0xb70, 0x10, 9, 2),
+	PIN_FIELD16(129, 129, 0xb40, 0x10, 9, 2),
+	PINS_FIELD16(130, 131, 0xb40, 0x10, 13, 2),
+	PINS_FIELD16(132, 135, 0xb40, 0x10, 9, 2),
+	PIN_FIELD16(138, 138, 0xb50, 0x10, 8, 2),
+	PIN_FIELD16(139, 139, 0xb60, 0x10, 8, 2),
+	PINS_FIELD16(140, 151, 0xb70, 0x10, 8, 2),
+	PINS_FIELD16(152, 153, 0xb60, 0x10, 8, 2),
+	PINS_FIELD16(153, 153, 0xb60, 0x10, 8, 2),
+	PINS_FIELD16(154, 161, 0xc20, 0x10, 8, 2),
+	PIN_FIELD16(162, 162, 0xc10, 0x10, 8, 2),
+	PIN_FIELD16(163, 163, 0xc00, 0x10, 8, 2),
+	PIN_FIELD16(164, 164, 0xd10, 0x10, 8, 2),
+	PIN_FIELD16(165, 165, 0xd00, 0x10, 8, 2),
+	PINS_FIELD16(166, 169, 0xb80, 0x10, 1, 2),
+	PINS_FIELD16(170, 173, 0xc60, 0x10, 8, 2),
+	PIN_FIELD16(174, 174, 0xc40, 0x10, 8, 2),
+	PIN_FIELD16(175, 175, 0xc50, 0x10, 8, 2),
+	PINS_FIELD16(176, 179, 0xb70, 0x10, 13, 2),
+	PIN_FIELD16(180, 180, 0xb00, 0x10, 5, 2),
+	PINS_FIELD16(181, 184, 0xb00, 0x10, 1, 2),
+	PINS_FIELD16(185, 191, 0xb60, 0x10, 9, 2),
+	PIN_FIELD16(192, 192, 0xb40, 0x10, 1, 2),
+	PINS_FIELD16(193, 194, 0xb40, 0x10, 5, 2),
+	PINS_FIELD16(195, 196, 0xb40, 0x10, 1, 2),
+};
+
+static const struct mtk_pin_field_calc mt6795_pin_sr_range[] = {
+	PINS_FIELD16(0, 4, 0xb30, 0x10, 15, 1),
+	PINS_FIELD16(5, 9, 0xb30, 0x10, 3, 1),
+	PINS_FIELD16(10, 15, 0xb30, 0x10, 7, 1),
+	PIN_FIELD16(16, 16, 0xb30, 0x10, 5, 1),
+	PINS_FIELD16(23, 26, 0xce0, 0x10, 12, 1),
+	PIN_FIELD16(27, 27, 0xcc0, 0x10, 12, 1),
+	PIN_FIELD16(28, 28, 0xcd0, 0x10, 12, 1),
+	PINS_FIELD16(29, 32, 0xb80, 0x10, 15, 1),
+	PIN_FIELD16(33, 33, 0xb10, 0x10, 15, 1),
+	PINS_FIELD16(34, 36, 0xb10, 0x10, 11, 1),
+	PINS_FIELD16(37, 38, 0xb10, 0x10, 7, 1),
+	PIN_FIELD16(39, 39, 0xb20, 0x10, 3, 1),
+	PIN_FIELD16(40, 40, 0xb20, 0x10, 7, 1),
+	PINS_FIELD16(41, 42, 0xb20, 0x10, 11, 1),
+	PINS_FIELD16(47, 61, 0xb00, 0x10, 11, 1),
+	PINS_FIELD16(62, 66, 0xb70, 0x10, 3, 1),
+	PINS_FIELD16(67, 67, 0xb00, 0x10, 11, 1),
+	PINS_FIELD16(68, 72, 0xb60, 0x10, 15, 1),
+	PINS_FIELD16(73, 77, 0xb40, 0x10, 15, 1),
+	PIN_FIELD16(78, 78, 0xb00, 0x10, 15, 3),
+	PINS_FIELD16(79, 91, 0xb00, 0x10, 15, 1),
+	PIN_FIELD16(92, 92, 0xb60, 0x10, 7, 1),
+	PINS_FIELD16(93, 95, 0xb60, 0x10, 3, 1),
+	PINS_FIELD16(96, 99, 0xb80, 0x10, 11, 1),
+	PINS_FIELD16(100, 103, 0xca0, 0x10, 12, 1),
+	PIN_FIELD16(104, 104, 0xc80, 0x10, 12, 1),
+	PIN_FIELD16(105, 105, 0xc90, 0x10, 12, 1),
+	PINS_FIELD16(106, 107, 0xb50, 0x10, 11, 1),
+	PINS_FIELD16(108, 112, 0xb50, 0x10, 3, 1),
+	PINS_FIELD16(113, 116, 0xb80, 0x10, 7, 1),
+	PINS_FIELD16(117, 118, 0xb90, 0x10, 3, 1),
+	PINS_FIELD16(119, 124, 0xb50, 0x10, 7, 1),
+	PIN_FIELD16(127, 127, 0xb70, 0x10, 7, 1),
+	PIN_FIELD16(128, 128, 0xb70, 0x10, 11, 1),
+	PIN_FIELD16(129, 129, 0xb40, 0x10, 11, 1),
+	PINS_FIELD16(130, 131, 0xb40, 0x10, 15, 1),
+	PINS_FIELD16(132, 135, 0xb40, 0x10, 11, 1),
+	PIN_FIELD16(138, 138, 0xb50, 0x10, 12, 1),
+	PIN_FIELD16(139, 139, 0xb60, 0x10, 12, 1),
+	PINS_FIELD16(140, 151, 0xb70, 0x10, 12, 1),
+	PINS_FIELD16(152, 153, 0xb60, 0x10, 12, 1),
+	PINS_FIELD16(153, 153, 0xb60, 0x10, 12, 1),
+	PINS_FIELD16(154, 161, 0xc20, 0x10, 12, 1),
+	PIN_FIELD16(162, 162, 0xc10, 0x10, 12, 1),
+	PIN_FIELD16(163, 163, 0xc00, 0x10, 12, 1),
+	PIN_FIELD16(164, 164, 0xd10, 0x10, 12, 1),
+	PIN_FIELD16(165, 165, 0xd00, 0x10, 12, 1),
+	PINS_FIELD16(166, 169, 0xb80, 0x10, 3, 1),
+	PINS_FIELD16(170, 173, 0xc60, 0x10, 12, 1),
+	PIN_FIELD16(174, 174, 0xc40, 0x10, 12, 1),
+	PIN_FIELD16(175, 175, 0xc50, 0x10, 12, 1),
+	PINS_FIELD16(176, 179, 0xb70, 0x10, 15, 1),
+	PIN_FIELD16(180, 180, 0xb00, 0x10, 7, 1),
+	PINS_FIELD16(181, 184, 0xb00, 0x10, 3, 1),
+	PINS_FIELD16(185, 191, 0xb60, 0x10, 11, 1),
+	PIN_FIELD16(192, 192, 0xb40, 0x10, 3, 1),
+	PINS_FIELD16(193, 194, 0xb40, 0x10, 7, 1),
+	PINS_FIELD16(195, 196, 0xb40, 0x10, 3, 1),
+};
+
+static const struct mtk_pin_reg_calc mt6795_reg_cals[PINCTRL_PIN_REG_MAX] = {
+	[PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt6795_pin_mode_range),
+	[PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt6795_pin_dir_range),
+	[PINCTRL_PIN_REG_DI] = MTK_RANGE(mt6795_pin_di_range),
+	[PINCTRL_PIN_REG_DO] = MTK_RANGE(mt6795_pin_do_range),
+	[PINCTRL_PIN_REG_SR] = MTK_RANGE(mt6795_pin_sr_range),
+	[PINCTRL_PIN_REG_SMT] = MTK_RANGE(mt6795_pin_smt_range),
+	[PINCTRL_PIN_REG_DRV] = MTK_RANGE(mt6795_pin_drv_range),
+	[PINCTRL_PIN_REG_PUPD] = MTK_RANGE(mt6795_pin_pupd_range),
+	[PINCTRL_PIN_REG_R0] = MTK_RANGE(mt6795_pin_r0_range),
+	[PINCTRL_PIN_REG_R1] = MTK_RANGE(mt6795_pin_r1_range),
+	[PINCTRL_PIN_REG_IES] = MTK_RANGE(mt6795_pin_ies_range),
+	[PINCTRL_PIN_REG_PULLEN] = MTK_RANGE(mt6795_pin_pullen_range),
+	[PINCTRL_PIN_REG_PULLSEL] = MTK_RANGE(mt6795_pin_pullsel_range),
+};
+
+static const struct mtk_eint_hw mt6795_eint_hw = {
+	.port_mask = 7,
+	.ports     = 7,
+	.ap_num    = 224,
+	.db_cnt    = 32,
+	.db_time   = debounce_time_mt6795,
+};
+
+static const unsigned int mt6795_pull_type[] = {
+	MTK_PULL_PULLSEL_TYPE,/*0*/		MTK_PULL_PULLSEL_TYPE,/*1*/
+	MTK_PULL_PULLSEL_TYPE,/*2*/		MTK_PULL_PULLSEL_TYPE,/*3*/
+	MTK_PULL_PULLSEL_TYPE,/*4*/		MTK_PULL_PULLSEL_TYPE,/*5*/
+	MTK_PULL_PULLSEL_TYPE,/*6*/		MTK_PULL_PULLSEL_TYPE,/*7*/
+	MTK_PULL_PULLSEL_TYPE,/*8*/		MTK_PULL_PULLSEL_TYPE,/*9*/
+	MTK_PULL_PULLSEL_TYPE,/*10*/		MTK_PULL_PULLSEL_TYPE,/*11*/
+	MTK_PULL_PULLSEL_TYPE,/*12*/		MTK_PULL_PULLSEL_TYPE,/*13*/
+	MTK_PULL_PULLSEL_TYPE,/*14*/		MTK_PULL_PULLSEL_TYPE,/*15*/
+	MTK_PULL_PULLSEL_TYPE,/*16*/		MTK_PULL_PULLSEL_TYPE,/*17*/
+	MTK_PULL_PULLSEL_TYPE,/*18*/		MTK_PULL_PULLSEL_TYPE,/*19*/
+	MTK_PULL_PULLSEL_TYPE,/*20*/		MTK_PULL_PULLSEL_TYPE,/*21*/
+	MTK_PULL_PULLSEL_TYPE,/*22*/		MTK_PULL_PUPD_R1R0_TYPE,/*23*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*24*/		MTK_PULL_PUPD_R1R0_TYPE,/*25*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*26*/		MTK_PULL_PUPD_R1R0_TYPE,/*27*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*28*/		MTK_PULL_PULLSEL_TYPE,/*29*/
+	MTK_PULL_PULLSEL_TYPE,/*30*/		MTK_PULL_PULLSEL_TYPE,/*31*/
+	MTK_PULL_PULLSEL_TYPE,/*32*/		MTK_PULL_PULLSEL_TYPE,/*33*/
+	MTK_PULL_PULLSEL_TYPE,/*34*/		MTK_PULL_PULLSEL_TYPE,/*35*/
+	MTK_PULL_PULLSEL_TYPE,/*36*/		MTK_PULL_PULLSEL_TYPE,/*37*/
+	MTK_PULL_PULLSEL_TYPE,/*38*/		MTK_PULL_PULLSEL_TYPE,/*39*/
+	MTK_PULL_PULLSEL_TYPE,/*40*/		MTK_PULL_PULLSEL_TYPE,/*41*/
+	MTK_PULL_PULLSEL_TYPE,/*42*/		MTK_PULL_PULLSEL_TYPE,/*43*/
+	MTK_PULL_PULLSEL_TYPE,/*44*/		MTK_PULL_PULLSEL_TYPE,/*45*/
+	MTK_PULL_PULLSEL_TYPE,/*46*/		MTK_PULL_PULLSEL_TYPE,/*47*/
+	MTK_PULL_PULLSEL_TYPE,/*48*/		MTK_PULL_PULLSEL_TYPE,/*49*/
+	MTK_PULL_PULLSEL_TYPE,/*50*/		MTK_PULL_PULLSEL_TYPE,/*51*/
+	MTK_PULL_PULLSEL_TYPE,/*52*/		MTK_PULL_PULLSEL_TYPE,/*53*/
+	MTK_PULL_PULLSEL_TYPE,/*54*/		MTK_PULL_PULLSEL_TYPE,/*55*/
+	MTK_PULL_PULLSEL_TYPE,/*56*/		MTK_PULL_PULLSEL_TYPE,/*57*/
+	MTK_PULL_PULLSEL_TYPE,/*58*/		MTK_PULL_PULLSEL_TYPE,/*59*/
+	MTK_PULL_PULLSEL_TYPE,/*60*/		MTK_PULL_PULLSEL_TYPE,/*61*/
+	MTK_PULL_PULLSEL_TYPE,/*62*/		MTK_PULL_PULLSEL_TYPE,/*63*/
+	MTK_PULL_PULLSEL_TYPE,/*64*/		MTK_PULL_PULLSEL_TYPE,/*65*/
+	MTK_PULL_PULLSEL_TYPE,/*66*/		MTK_PULL_PUPD_R1R0_TYPE,/*67*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*68*/		MTK_PULL_PUPD_R1R0_TYPE,/*69*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*70*/		MTK_PULL_PUPD_R1R0_TYPE,/*71*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*72*/		MTK_PULL_PUPD_R1R0_TYPE,/*73*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*74*/		MTK_PULL_PUPD_R1R0_TYPE,/*75*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*76*/		MTK_PULL_PUPD_R1R0_TYPE,/*77*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*78*/		MTK_PULL_PUPD_R1R0_TYPE,/*79*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*80*/		MTK_PULL_PUPD_R1R0_TYPE,/*81*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*82*/		MTK_PULL_PULLSEL_TYPE,/*83*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*84*/		MTK_PULL_PUPD_R1R0_TYPE,/*85*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*86*/		MTK_PULL_PUPD_R1R0_TYPE,/*87*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*88*/		MTK_PULL_PUPD_R1R0_TYPE,/*89*/
+	MTK_PULL_PULLSEL_TYPE,/*90*/		MTK_PULL_PULLSEL_TYPE,/*91*/
+	MTK_PULL_PULLSEL_TYPE,/*92*/		MTK_PULL_PULLSEL_TYPE,/*93*/
+	MTK_PULL_PULLSEL_TYPE,/*94*/		MTK_PULL_PULLSEL_TYPE,/*95*/
+	MTK_PULL_PULLSEL_TYPE,/*96*/		MTK_PULL_PULLSEL_TYPE,/*97*/
+	MTK_PULL_PULLSEL_TYPE,/*98*/		MTK_PULL_PULLSEL_TYPE,/*99*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*100*/		MTK_PULL_PUPD_R1R0_TYPE,/*101*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*102*/		MTK_PULL_PUPD_R1R0_TYPE,/*103*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*104*/		MTK_PULL_PUPD_R1R0_TYPE,/*105*/
+	MTK_PULL_PULLSEL_TYPE,/*106*/		MTK_PULL_PULLSEL_TYPE,/*107*/
+	MTK_PULL_PULLSEL_TYPE,/*108*/		MTK_PULL_PULLSEL_TYPE,/*109*/
+	MTK_PULL_PULLSEL_TYPE,/*110*/		MTK_PULL_PULLSEL_TYPE,/*111*/
+	MTK_PULL_PULLSEL_TYPE,/*112*/		MTK_PULL_PULLSEL_TYPE,/*113*/
+	MTK_PULL_PULLSEL_TYPE,/*114*/		MTK_PULL_PULLSEL_TYPE,/*115*/
+	MTK_PULL_PULLSEL_TYPE,/*116*/		MTK_PULL_PULLSEL_TYPE,/*117*/
+	MTK_PULL_PULLSEL_TYPE,/*118*/		MTK_PULL_PUPD_R1R0_TYPE,/*119*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*120*/		MTK_PULL_PUPD_R1R0_TYPE,/*121*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*122*/		MTK_PULL_PUPD_R1R0_TYPE,/*123*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*124*/		MTK_PULL_PULLSEL_TYPE,/*125*/
+	MTK_PULL_PULLSEL_TYPE,/*126*/		MTK_PULL_PULLSEL_TYPE,/*127*/
+	MTK_PULL_PULLSEL_TYPE,/*128*/		MTK_PULL_PULLSEL_TYPE,/*129*/
+	MTK_PULL_PULLSEL_TYPE,/*130*/		MTK_PULL_PULLSEL_TYPE,/*131*/
+	MTK_PULL_PULLSEL_TYPE,/*132*/		MTK_PULL_PULLSEL_TYPE,/*133*/
+	MTK_PULL_PULLSEL_TYPE,/*134*/		MTK_PULL_PULLSEL_TYPE,/*135*/
+	MTK_PULL_PULLSEL_TYPE,/*136*/		MTK_PULL_PULLSEL_TYPE,/*137*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*138*/		MTK_PULL_PUPD_R1R0_TYPE,/*139*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*140*/		MTK_PULL_PUPD_R1R0_TYPE,/*141*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*142*/		MTK_PULL_PUPD_R1R0_TYPE,/*143*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*144*/		MTK_PULL_PUPD_R1R0_TYPE,/*145*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*146*/		MTK_PULL_PUPD_R1R0_TYPE,/*147*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*148*/		MTK_PULL_PUPD_R1R0_TYPE,/*149*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*150*/		MTK_PULL_PUPD_R1R0_TYPE,/*151*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*152*/		MTK_PULL_PUPD_R1R0_TYPE,/*153*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*154*/		MTK_PULL_PUPD_R1R0_TYPE,/*155*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*156*/		MTK_PULL_PUPD_R1R0_TYPE,/*157*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*158*/		MTK_PULL_PUPD_R1R0_TYPE,/*159*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*160*/		MTK_PULL_PUPD_R1R0_TYPE,/*161*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*162*/		MTK_PULL_PUPD_R1R0_TYPE,/*163*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*164*/		MTK_PULL_PUPD_R1R0_TYPE,/*165*/
+	MTK_PULL_PULLSEL_TYPE,/*166*/		MTK_PULL_PULLSEL_TYPE,/*167*/
+	MTK_PULL_PULLSEL_TYPE,/*168*/		MTK_PULL_PULLSEL_TYPE,/*169*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*170*/		MTK_PULL_PUPD_R1R0_TYPE,/*171*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*172*/		MTK_PULL_PUPD_R1R0_TYPE,/*173*/
+	MTK_PULL_PUPD_R1R0_TYPE,/*174*/		MTK_PULL_PUPD_R1R0_TYPE,/*175*/
+	MTK_PULL_PULLSEL_TYPE,/*176*/		MTK_PULL_PULLSEL_TYPE,/*177*/
+	MTK_PULL_PULLSEL_TYPE,/*178*/		MTK_PULL_PULLSEL_TYPE,/*179*/
+	MTK_PULL_PULLSEL_TYPE,/*180*/		MTK_PULL_PULLSEL_TYPE,/*181*/
+	MTK_PULL_PULLSEL_TYPE,/*182*/		MTK_PULL_PULLSEL_TYPE,/*183*/
+	MTK_PULL_PULLSEL_TYPE,/*184*/		MTK_PULL_PULLSEL_TYPE,/*185*/
+	MTK_PULL_PULLSEL_TYPE,/*186*/		MTK_PULL_PULLSEL_TYPE,/*187*/
+	MTK_PULL_PULLSEL_TYPE,/*188*/		MTK_PULL_PULLSEL_TYPE,/*189*/
+	MTK_PULL_PULLSEL_TYPE,/*190*/		MTK_PULL_PULLSEL_TYPE,/*191*/
+	MTK_PULL_PULLSEL_TYPE,/*192*/		MTK_PULL_PULLSEL_TYPE,/*193*/
+	MTK_PULL_PULLSEL_TYPE,/*194*/		MTK_PULL_PULLSEL_TYPE,/*195*/
+	MTK_PULL_PULLSEL_TYPE,/*196*/
+};
+
+static const struct mtk_pin_soc mt6795_data = {
+	.reg_cal = mt6795_reg_cals,
+	.pins = mtk_pins_mt6795,
+	.npins = ARRAY_SIZE(mtk_pins_mt6795),
+	.ngrps = ARRAY_SIZE(mtk_pins_mt6795),
+	.nfuncs = 8,
+	.eint_hw = &mt6795_eint_hw,
+	.gpio_m = 0,
+	.base_names = mtk_default_register_base_names,
+	.nbase_names = ARRAY_SIZE(mtk_default_register_base_names),
+	.pull_type = mt6795_pull_type,
+	.bias_disable_set = mtk_pinconf_bias_disable_set_rev1,
+	.bias_disable_get = mtk_pinconf_bias_disable_get_rev1,
+	.bias_set = mtk_pinconf_bias_set_rev1,
+	.bias_get = mtk_pinconf_bias_get_rev1,
+	.bias_set_combo = mtk_pinconf_bias_set_combo,
+	.bias_get_combo = mtk_pinconf_bias_get_combo,
+	.drive_set = mtk_pinconf_drive_set_rev1,
+	.drive_get = mtk_pinconf_drive_get_rev1,
+	.adv_pull_get = mtk_pinconf_adv_pull_get,
+	.adv_pull_set = mtk_pinconf_adv_pull_set,
+};
+
+static const struct of_device_id mt6795_pctrl_match[] = {
+	{ .compatible = "mediatek,mt6795-pinctrl", .data = &mt6795_data },
+	{ }
+};
+
+static struct platform_driver mt6795_pinctrl_driver = {
+	.driver = {
+		.name = "mt6795-pinctrl",
+		.of_match_table = mt6795_pctrl_match,
+		.pm = &mtk_paris_pinctrl_pm_ops,
+	},
+	.probe = mtk_paris_pinctrl_probe,
+};
+
+static int __init mtk_pinctrl_init(void)
+{
+	return platform_driver_register(&mt6795_pinctrl_driver);
+}
+arch_initcall(mtk_pinctrl_init);