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authorLibravatar Linus Torvalds <torvalds@linux-foundation.org>2023-02-21 18:24:12 -0800
committerLibravatar Linus Torvalds <torvalds@linux-foundation.org>2023-02-21 18:24:12 -0800
commit5b7c4cabbb65f5c469464da6c5f614cbd7f730f2 (patch)
treecc5c2d0a898769fd59549594fedb3ee6f84e59a0 /drivers/sbus/char/oradax.c
downloadlinux-5b7c4cabbb65f5c469464da6c5f614cbd7f730f2.tar.gz
linux-5b7c4cabbb65f5c469464da6c5f614cbd7f730f2.zip
Merge tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-nextgrafted
Pull networking updates from Jakub Kicinski: "Core: - Add dedicated kmem_cache for typical/small skb->head, avoid having to access struct page at kfree time, and improve memory use. - Introduce sysctl to set default RPS configuration for new netdevs. - Define Netlink protocol specification format which can be used to describe messages used by each family and auto-generate parsers. Add tools for generating kernel data structures and uAPI headers. - Expose all net/core sysctls inside netns. - Remove 4s sleep in netpoll if carrier is instantly detected on boot. - Add configurable limit of MDB entries per port, and port-vlan. - Continue populating drop reasons throughout the stack. - Retire a handful of legacy Qdiscs and classifiers. Protocols: - Support IPv4 big TCP (TSO frames larger than 64kB). - Add IP_LOCAL_PORT_RANGE socket option, to control local port range on socket by socket basis. - Track and report in procfs number of MPTCP sockets used. - Support mixing IPv4 and IPv6 flows in the in-kernel MPTCP path manager. - IPv6: don't check net.ipv6.route.max_size and rely on garbage collection to free memory (similarly to IPv4). - Support Penultimate Segment Pop (PSP) flavor in SRv6 (RFC8986). - ICMP: add per-rate limit counters. - Add support for user scanning requests in ieee802154. - Remove static WEP support. - Support minimal Wi-Fi 7 Extremely High Throughput (EHT) rate reporting. - WiFi 7 EHT channel puncturing support (client & AP). BPF: - Add a rbtree data structure following the "next-gen data structure" precedent set by recently added linked list, that is, by using kfunc + kptr instead of adding a new BPF map type. - Expose XDP hints via kfuncs with initial support for RX hash and timestamp metadata. - Add BPF_F_NO_TUNNEL_KEY extension to bpf_skb_set_tunnel_key to better support decap on GRE tunnel devices not operating in collect metadata. - Improve x86 JIT's codegen for PROBE_MEM runtime error checks. - Remove the need for trace_printk_lock for bpf_trace_printk and bpf_trace_vprintk helpers. - Extend libbpf's bpf_tracing.h support for tracing arguments of kprobes/uprobes and syscall as a special case. - Significantly reduce the search time for module symbols by livepatch and BPF. - Enable cpumasks to be used as kptrs, which is useful for tracing programs tracking which tasks end up running on which CPUs in different time intervals. - Add support for BPF trampoline on s390x and riscv64. - Add capability to export the XDP features supported by the NIC. - Add __bpf_kfunc tag for marking kernel functions as kfuncs. - Add cgroup.memory=nobpf kernel parameter option to disable BPF memory accounting for container environments. Netfilter: - Remove the CLUSTERIP target. It has been marked as obsolete for years, and we still have WARN splats wrt races of the out-of-band /proc interface installed by this target. - Add 'destroy' commands to nf_tables. They are identical to the existing 'delete' commands, but do not return an error if the referenced object (set, chain, rule...) did not exist. Driver API: - Improve cpumask_local_spread() locality to help NICs set the right IRQ affinity on AMD platforms. - Separate C22 and C45 MDIO bus transactions more clearly. - Introduce new DCB table to control DSCP rewrite on egress. - Support configuration of Physical Layer Collision Avoidance (PLCA) Reconciliation Sublayer (RS) (802.3cg-2019). Modern version of shared medium Ethernet. - Support for MAC Merge layer (IEEE 802.3-2018 clause 99). Allowing preemption of low priority frames by high priority frames. - Add support for controlling MACSec offload using netlink SET. - Rework devlink instance refcounts to allow registration and de-registration under the instance lock. Split the code into multiple files, drop some of the unnecessarily granular locks and factor out common parts of netlink operation handling. - Add TX frame aggregation parameters (for USB drivers). - Add a new attr TCA_EXT_WARN_MSG to report TC (offload) warning messages with notifications for debug. - Allow offloading of UDP NEW connections via act_ct. - Add support for per action HW stats in TC. - Support hardware miss to TC action (continue processing in SW from a specific point in the action chain). - Warn if old Wireless Extension user space interface is used with modern cfg80211/mac80211 drivers. Do not support Wireless Extensions for Wi-Fi 7 devices at all. Everyone should switch to using nl80211 interface instead. - Improve the CAN bit timing configuration. Use extack to return error messages directly to user space, update the SJW handling, including the definition of a new default value that will benefit CAN-FD controllers, by increasing their oscillator tolerance. New hardware / drivers: - Ethernet: - nVidia BlueField-3 support (control traffic driver) - Ethernet support for imx93 SoCs - Motorcomm yt8531 gigabit Ethernet PHY - onsemi NCN26000 10BASE-T1S PHY (with support for PLCA) - Microchip LAN8841 PHY (incl. cable diagnostics and PTP) - Amlogic gxl MDIO mux - WiFi: - RealTek RTL8188EU (rtl8xxxu) - Qualcomm Wi-Fi 7 devices (ath12k) - CAN: - Renesas R-Car V4H Drivers: - Bluetooth: - Set Per Platform Antenna Gain (PPAG) for Intel controllers. - Ethernet NICs: - Intel (1G, igc): - support TSN / Qbv / packet scheduling features of i226 model - Intel (100G, ice): - use GNSS subsystem instead of TTY - multi-buffer XDP support - extend support for GPIO pins to E823 devices - nVidia/Mellanox: - update the shared buffer configuration on PFC commands - implement PTP adjphase function for HW offset control - TC support for Geneve and GRE with VF tunnel offload - more efficient crypto key management method - multi-port eswitch support - Netronome/Corigine: - add DCB IEEE support - support IPsec offloading for NFP3800 - Freescale/NXP (enetc): - support XDP_REDIRECT for XDP non-linear buffers - improve reconfig, avoid link flap and waiting for idle - support MAC Merge layer - Other NICs: - sfc/ef100: add basic devlink support for ef100 - ionic: rx_push mode operation (writing descriptors via MMIO) - bnxt: use the auxiliary bus abstraction for RDMA - r8169: disable ASPM and reset bus in case of tx timeout - cpsw: support QSGMII mode for J721e CPSW9G - cpts: support pulse-per-second output - ngbe: add an mdio bus driver - usbnet: optimize usbnet_bh() by avoiding unnecessary queuing - r8152: handle devices with FW with NCM support - amd-xgbe: support 10Mbps, 2.5GbE speeds and rx-adaptation - virtio-net: support multi buffer XDP - virtio/vsock: replace virtio_vsock_pkt with sk_buff - tsnep: XDP support - Ethernet high-speed switches: - nVidia/Mellanox (mlxsw): - add support for latency TLV (in FW control messages) - Microchip (sparx5): - separate explicit and implicit traffic forwarding rules, make the implicit rules always active - add support for egress DSCP rewrite - IS0 VCAP support (Ingress Classification) - IS2 VCAP filters (protos, L3 addrs, L4 ports, flags, ToS etc.) - ES2 VCAP support (Egress Access Control) - support for Per-Stream Filtering and Policing (802.1Q, 8.6.5.1) - Ethernet embedded switches: - Marvell (mv88e6xxx): - add MAB (port auth) offload support - enable PTP receive for mv88e6390 - NXP (ocelot): - support MAC Merge layer - support for the the vsc7512 internal copper phys - Microchip: - lan9303: convert to PHYLINK - lan966x: support TC flower filter statistics - lan937x: PTP support for KSZ9563/KSZ8563 and LAN937x - lan937x: support Credit Based Shaper configuration - ksz9477: support Energy Efficient Ethernet - other: - qca8k: convert to regmap read/write API, use bulk operations - rswitch: Improve TX timestamp accuracy - Intel WiFi (iwlwifi): - EHT (Wi-Fi 7) rate reporting - STEP equalizer support: transfer some STEP (connection to radio on platforms with integrated wifi) related parameters from the BIOS to the firmware. - Qualcomm 802.11ax WiFi (ath11k): - IPQ5018 support - Fine Timing Measurement (FTM) responder role support - channel 177 support - MediaTek WiFi (mt76): - per-PHY LED support - mt7996: EHT (Wi-Fi 7) support - Wireless Ethernet Dispatch (WED) reset support - switch to using page pool allocator - RealTek WiFi (rtw89): - support new version of Bluetooth co-existance - Mobile: - rmnet: support TX aggregation" * tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1872 commits) page_pool: add a comment explaining the fragment counter usage net: ethtool: fix __ethtool_dev_mm_supported() implementation ethtool: pse-pd: Fix double word in comments xsk: add linux/vmalloc.h to xsk.c sefltests: netdevsim: wait for devlink instance after netns removal selftest: fib_tests: Always cleanup before exit net/mlx5e: Align IPsec ASO result memory to be as required by hardware net/mlx5e: TC, Set CT miss to the specific ct action instance net/mlx5e: Rename CHAIN_TO_REG to MAPPED_OBJ_TO_REG net/mlx5: Refactor tc miss handling to a single function net/mlx5: Kconfig: Make tc offload depend on tc skb extension net/sched: flower: Support hardware miss to tc action net/sched: flower: Move filter handle initialization earlier net/sched: cls_api: Support hardware miss to tc action net/sched: Rename user cookie and act cookie sfc: fix builds without CONFIG_RTC_LIB sfc: clean up some inconsistent indentings net/mlx4_en: Introduce flexible array to silence overflow warning net: lan966x: Fix possible deadlock inside PTP net/ulp: Remove redundant ->clone() test in inet_clone_ulp(). ...
Diffstat (limited to '')
-rw-r--r--drivers/sbus/char/oradax.c990
1 files changed, 990 insertions, 0 deletions
diff --git a/drivers/sbus/char/oradax.c b/drivers/sbus/char/oradax.c
new file mode 100644
index 000000000..21b7cb6e7
--- /dev/null
+++ b/drivers/sbus/char/oradax.c
@@ -0,0 +1,990 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (c) 2017, Oracle and/or its affiliates. All rights reserved.
+ */
+
+/*
+ * Oracle Data Analytics Accelerator (DAX)
+ *
+ * DAX is a coprocessor which resides on the SPARC M7 (DAX1) and M8
+ * (DAX2) processor chips, and has direct access to the CPU's L3
+ * caches as well as physical memory. It can perform several
+ * operations on data streams with various input and output formats.
+ * The driver provides a transport mechanism only and has limited
+ * knowledge of the various opcodes and data formats. A user space
+ * library provides high level services and translates these into low
+ * level commands which are then passed into the driver and
+ * subsequently the hypervisor and the coprocessor. The library is
+ * the recommended way for applications to use the coprocessor, and
+ * the driver interface is not intended for general use.
+ *
+ * See Documentation/sparc/oradax/oracle-dax.rst for more details.
+ */
+
+#include <linux/uaccess.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/cdev.h>
+#include <linux/slab.h>
+#include <linux/mm.h>
+
+#include <asm/hypervisor.h>
+#include <asm/mdesc.h>
+#include <asm/oradax.h>
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Driver for Oracle Data Analytics Accelerator");
+
+#define DAX_DBG_FLG_BASIC 0x01
+#define DAX_DBG_FLG_STAT 0x02
+#define DAX_DBG_FLG_INFO 0x04
+#define DAX_DBG_FLG_ALL 0xff
+
+#define dax_err(fmt, ...) pr_err("%s: " fmt "\n", __func__, ##__VA_ARGS__)
+#define dax_info(fmt, ...) pr_info("%s: " fmt "\n", __func__, ##__VA_ARGS__)
+
+#define dax_dbg(fmt, ...) do { \
+ if (dax_debug & DAX_DBG_FLG_BASIC)\
+ dax_info(fmt, ##__VA_ARGS__); \
+ } while (0)
+#define dax_stat_dbg(fmt, ...) do { \
+ if (dax_debug & DAX_DBG_FLG_STAT) \
+ dax_info(fmt, ##__VA_ARGS__); \
+ } while (0)
+#define dax_info_dbg(fmt, ...) do { \
+ if (dax_debug & DAX_DBG_FLG_INFO) \
+ dax_info(fmt, ##__VA_ARGS__); \
+ } while (0)
+
+#define DAX1_MINOR 1
+#define DAX1_MAJOR 1
+#define DAX2_MINOR 0
+#define DAX2_MAJOR 2
+
+#define DAX1_STR "ORCL,sun4v-dax"
+#define DAX2_STR "ORCL,sun4v-dax2"
+
+#define DAX_CA_ELEMS (DAX_MMAP_LEN / sizeof(struct dax_cca))
+
+#define DAX_CCB_USEC 100
+#define DAX_CCB_RETRIES 10000
+
+/* stream types */
+enum {
+ OUT,
+ PRI,
+ SEC,
+ TBL,
+ NUM_STREAM_TYPES
+};
+
+/* completion status */
+#define CCA_STAT_NOT_COMPLETED 0
+#define CCA_STAT_COMPLETED 1
+#define CCA_STAT_FAILED 2
+#define CCA_STAT_KILLED 3
+#define CCA_STAT_NOT_RUN 4
+#define CCA_STAT_PIPE_OUT 5
+#define CCA_STAT_PIPE_SRC 6
+#define CCA_STAT_PIPE_DST 7
+
+/* completion err */
+#define CCA_ERR_SUCCESS 0x0 /* no error */
+#define CCA_ERR_OVERFLOW 0x1 /* buffer overflow */
+#define CCA_ERR_DECODE 0x2 /* CCB decode error */
+#define CCA_ERR_PAGE_OVERFLOW 0x3 /* page overflow */
+#define CCA_ERR_KILLED 0x7 /* command was killed */
+#define CCA_ERR_TIMEOUT 0x8 /* Timeout */
+#define CCA_ERR_ADI 0x9 /* ADI error */
+#define CCA_ERR_DATA_FMT 0xA /* data format error */
+#define CCA_ERR_OTHER_NO_RETRY 0xE /* Other error, do not retry */
+#define CCA_ERR_OTHER_RETRY 0xF /* Other error, retry */
+#define CCA_ERR_PARTIAL_SYMBOL 0x80 /* QP partial symbol warning */
+
+/* CCB address types */
+#define DAX_ADDR_TYPE_NONE 0
+#define DAX_ADDR_TYPE_VA_ALT 1 /* secondary context */
+#define DAX_ADDR_TYPE_RA 2 /* real address */
+#define DAX_ADDR_TYPE_VA 3 /* virtual address */
+
+/* dax_header_t opcode */
+#define DAX_OP_SYNC_NOP 0x0
+#define DAX_OP_EXTRACT 0x1
+#define DAX_OP_SCAN_VALUE 0x2
+#define DAX_OP_SCAN_RANGE 0x3
+#define DAX_OP_TRANSLATE 0x4
+#define DAX_OP_SELECT 0x5
+#define DAX_OP_INVERT 0x10 /* OR with translate, scan opcodes */
+
+struct dax_header {
+ u32 ccb_version:4; /* 31:28 CCB Version */
+ /* 27:24 Sync Flags */
+ u32 pipe:1; /* Pipeline */
+ u32 longccb:1; /* Longccb. Set for scan with lu2, lu3, lu4. */
+ u32 cond:1; /* Conditional */
+ u32 serial:1; /* Serial */
+ u32 opcode:8; /* 23:16 Opcode */
+ /* 15:0 Address Type. */
+ u32 reserved:3; /* 15:13 reserved */
+ u32 table_addr_type:2; /* 12:11 Huffman Table Address Type */
+ u32 out_addr_type:3; /* 10:8 Destination Address Type */
+ u32 sec_addr_type:3; /* 7:5 Secondary Source Address Type */
+ u32 pri_addr_type:3; /* 4:2 Primary Source Address Type */
+ u32 cca_addr_type:2; /* 1:0 Completion Address Type */
+};
+
+struct dax_control {
+ u32 pri_fmt:4; /* 31:28 Primary Input Format */
+ u32 pri_elem_size:5; /* 27:23 Primary Input Element Size(less1) */
+ u32 pri_offset:3; /* 22:20 Primary Input Starting Offset */
+ u32 sec_encoding:1; /* 19 Secondary Input Encoding */
+ /* (must be 0 for Select) */
+ u32 sec_offset:3; /* 18:16 Secondary Input Starting Offset */
+ u32 sec_elem_size:2; /* 15:14 Secondary Input Element Size */
+ /* (must be 0 for Select) */
+ u32 out_fmt:2; /* 13:12 Output Format */
+ u32 out_elem_size:2; /* 11:10 Output Element Size */
+ u32 misc:10; /* 9:0 Opcode specific info */
+};
+
+struct dax_data_access {
+ u64 flow_ctrl:2; /* 63:62 Flow Control Type */
+ u64 pipe_target:2; /* 61:60 Pipeline Target */
+ u64 out_buf_size:20; /* 59:40 Output Buffer Size */
+ /* (cachelines less 1) */
+ u64 unused1:8; /* 39:32 Reserved, Set to 0 */
+ u64 out_alloc:5; /* 31:27 Output Allocation */
+ u64 unused2:1; /* 26 Reserved */
+ u64 pri_len_fmt:2; /* 25:24 Input Length Format */
+ u64 pri_len:24; /* 23:0 Input Element/Byte/Bit Count */
+ /* (less 1) */
+};
+
+struct dax_ccb {
+ struct dax_header hdr; /* CCB Header */
+ struct dax_control ctrl;/* Control Word */
+ void *ca; /* Completion Address */
+ void *pri; /* Primary Input Address */
+ struct dax_data_access dac; /* Data Access Control */
+ void *sec; /* Secondary Input Address */
+ u64 dword5; /* depends on opcode */
+ void *out; /* Output Address */
+ void *tbl; /* Table Address or bitmap */
+};
+
+struct dax_cca {
+ u8 status; /* user may mwait on this address */
+ u8 err; /* user visible error notification */
+ u8 rsvd[2]; /* reserved */
+ u32 n_remaining; /* for QP partial symbol warning */
+ u32 output_sz; /* output in bytes */
+ u32 rsvd2; /* reserved */
+ u64 run_cycles; /* run time in OCND2 cycles */
+ u64 run_stats; /* nothing reported in version 1.0 */
+ u32 n_processed; /* number input elements */
+ u32 rsvd3[5]; /* reserved */
+ u64 retval; /* command return value */
+ u64 rsvd4[8]; /* reserved */
+};
+
+/* per thread CCB context */
+struct dax_ctx {
+ struct dax_ccb *ccb_buf;
+ u64 ccb_buf_ra; /* cached RA of ccb_buf */
+ struct dax_cca *ca_buf;
+ u64 ca_buf_ra; /* cached RA of ca_buf */
+ struct page *pages[DAX_CA_ELEMS][NUM_STREAM_TYPES];
+ /* array of locked pages */
+ struct task_struct *owner; /* thread that owns ctx */
+ struct task_struct *client; /* requesting thread */
+ union ccb_result result;
+ u32 ccb_count;
+ u32 fail_count;
+};
+
+/* driver public entry points */
+static int dax_open(struct inode *inode, struct file *file);
+static ssize_t dax_read(struct file *filp, char __user *buf,
+ size_t count, loff_t *ppos);
+static ssize_t dax_write(struct file *filp, const char __user *buf,
+ size_t count, loff_t *ppos);
+static int dax_devmap(struct file *f, struct vm_area_struct *vma);
+static int dax_close(struct inode *i, struct file *f);
+
+static const struct file_operations dax_fops = {
+ .owner = THIS_MODULE,
+ .open = dax_open,
+ .read = dax_read,
+ .write = dax_write,
+ .mmap = dax_devmap,
+ .release = dax_close,
+};
+
+static int dax_ccb_exec(struct dax_ctx *ctx, const char __user *buf,
+ size_t count, loff_t *ppos);
+static int dax_ccb_info(u64 ca, struct ccb_info_result *info);
+static int dax_ccb_kill(u64 ca, u16 *kill_res);
+
+static struct cdev c_dev;
+static struct class *cl;
+static dev_t first;
+
+static int max_ccb_version;
+static int dax_debug;
+module_param(dax_debug, int, 0644);
+MODULE_PARM_DESC(dax_debug, "Debug flags");
+
+static int __init dax_attach(void)
+{
+ unsigned long dummy, hv_rv, major, minor, minor_requested, max_ccbs;
+ struct mdesc_handle *hp = mdesc_grab();
+ char *prop, *dax_name;
+ bool found = false;
+ int len, ret = 0;
+ u64 pn;
+
+ if (hp == NULL) {
+ dax_err("Unable to grab mdesc");
+ return -ENODEV;
+ }
+
+ mdesc_for_each_node_by_name(hp, pn, "virtual-device") {
+ prop = (char *)mdesc_get_property(hp, pn, "name", &len);
+ if (prop == NULL)
+ continue;
+ if (strncmp(prop, "dax", strlen("dax")))
+ continue;
+ dax_dbg("Found node 0x%llx = %s", pn, prop);
+
+ prop = (char *)mdesc_get_property(hp, pn, "compatible", &len);
+ if (prop == NULL)
+ continue;
+ dax_dbg("Found node 0x%llx = %s", pn, prop);
+ found = true;
+ break;
+ }
+
+ if (!found) {
+ dax_err("No DAX device found");
+ ret = -ENODEV;
+ goto done;
+ }
+
+ if (strncmp(prop, DAX2_STR, strlen(DAX2_STR)) == 0) {
+ dax_name = DAX_NAME "2";
+ major = DAX2_MAJOR;
+ minor_requested = DAX2_MINOR;
+ max_ccb_version = 1;
+ dax_dbg("MD indicates DAX2 coprocessor");
+ } else if (strncmp(prop, DAX1_STR, strlen(DAX1_STR)) == 0) {
+ dax_name = DAX_NAME "1";
+ major = DAX1_MAJOR;
+ minor_requested = DAX1_MINOR;
+ max_ccb_version = 0;
+ dax_dbg("MD indicates DAX1 coprocessor");
+ } else {
+ dax_err("Unknown dax type: %s", prop);
+ ret = -ENODEV;
+ goto done;
+ }
+
+ minor = minor_requested;
+ dax_dbg("Registering DAX HV api with major %ld minor %ld", major,
+ minor);
+ if (sun4v_hvapi_register(HV_GRP_DAX, major, &minor)) {
+ dax_err("hvapi_register failed");
+ ret = -ENODEV;
+ goto done;
+ } else {
+ dax_dbg("Max minor supported by HV = %ld (major %ld)", minor,
+ major);
+ minor = min(minor, minor_requested);
+ dax_dbg("registered DAX major %ld minor %ld", major, minor);
+ }
+
+ /* submit a zero length ccb array to query coprocessor queue size */
+ hv_rv = sun4v_ccb_submit(0, 0, HV_CCB_QUERY_CMD, 0, &max_ccbs, &dummy);
+ if (hv_rv != 0) {
+ dax_err("get_hwqueue_size failed with status=%ld and max_ccbs=%ld",
+ hv_rv, max_ccbs);
+ ret = -ENODEV;
+ goto done;
+ }
+
+ if (max_ccbs != DAX_MAX_CCBS) {
+ dax_err("HV reports unsupported max_ccbs=%ld", max_ccbs);
+ ret = -ENODEV;
+ goto done;
+ }
+
+ if (alloc_chrdev_region(&first, 0, 1, DAX_NAME) < 0) {
+ dax_err("alloc_chrdev_region failed");
+ ret = -ENXIO;
+ goto done;
+ }
+
+ cl = class_create(THIS_MODULE, DAX_NAME);
+ if (IS_ERR(cl)) {
+ dax_err("class_create failed");
+ ret = PTR_ERR(cl);
+ goto class_error;
+ }
+
+ if (device_create(cl, NULL, first, NULL, dax_name) == NULL) {
+ dax_err("device_create failed");
+ ret = -ENXIO;
+ goto device_error;
+ }
+
+ cdev_init(&c_dev, &dax_fops);
+ if (cdev_add(&c_dev, first, 1) == -1) {
+ dax_err("cdev_add failed");
+ ret = -ENXIO;
+ goto cdev_error;
+ }
+
+ pr_info("Attached DAX module\n");
+ goto done;
+
+cdev_error:
+ device_destroy(cl, first);
+device_error:
+ class_destroy(cl);
+class_error:
+ unregister_chrdev_region(first, 1);
+done:
+ mdesc_release(hp);
+ return ret;
+}
+module_init(dax_attach);
+
+static void __exit dax_detach(void)
+{
+ pr_info("Cleaning up DAX module\n");
+ cdev_del(&c_dev);
+ device_destroy(cl, first);
+ class_destroy(cl);
+ unregister_chrdev_region(first, 1);
+}
+module_exit(dax_detach);
+
+/* map completion area */
+static int dax_devmap(struct file *f, struct vm_area_struct *vma)
+{
+ struct dax_ctx *ctx = (struct dax_ctx *)f->private_data;
+ size_t len = vma->vm_end - vma->vm_start;
+
+ dax_dbg("len=0x%lx, flags=0x%lx", len, vma->vm_flags);
+
+ if (ctx->owner != current) {
+ dax_dbg("devmap called from wrong thread");
+ return -EINVAL;
+ }
+
+ if (len != DAX_MMAP_LEN) {
+ dax_dbg("len(%lu) != DAX_MMAP_LEN(%d)", len, DAX_MMAP_LEN);
+ return -EINVAL;
+ }
+
+ /* completion area is mapped read-only for user */
+ if (vma->vm_flags & VM_WRITE)
+ return -EPERM;
+ vma->vm_flags &= ~VM_MAYWRITE;
+
+ if (remap_pfn_range(vma, vma->vm_start, ctx->ca_buf_ra >> PAGE_SHIFT,
+ len, vma->vm_page_prot))
+ return -EAGAIN;
+
+ dax_dbg("mmapped completion area at uva 0x%lx", vma->vm_start);
+ return 0;
+}
+
+/* Unlock user pages. Called during dequeue or device close */
+static void dax_unlock_pages(struct dax_ctx *ctx, int ccb_index, int nelem)
+{
+ int i, j;
+
+ for (i = ccb_index; i < ccb_index + nelem; i++) {
+ for (j = 0; j < NUM_STREAM_TYPES; j++) {
+ struct page *p = ctx->pages[i][j];
+
+ if (p) {
+ dax_dbg("freeing page %p", p);
+ unpin_user_pages_dirty_lock(&p, 1, j == OUT);
+ ctx->pages[i][j] = NULL;
+ }
+ }
+ }
+}
+
+static int dax_lock_page(void *va, struct page **p)
+{
+ int ret;
+
+ dax_dbg("uva %p", va);
+
+ ret = pin_user_pages_fast((unsigned long)va, 1, FOLL_WRITE, p);
+ if (ret == 1) {
+ dax_dbg("locked page %p, for VA %p", *p, va);
+ return 0;
+ }
+
+ dax_dbg("pin_user_pages failed, va=%p, ret=%d", va, ret);
+ return -1;
+}
+
+static int dax_lock_pages(struct dax_ctx *ctx, int idx,
+ int nelem, u64 *err_va)
+{
+ int i;
+
+ for (i = 0; i < nelem; i++) {
+ struct dax_ccb *ccbp = &ctx->ccb_buf[i];
+
+ /*
+ * For each address in the CCB whose type is virtual,
+ * lock the page and change the type to virtual alternate
+ * context. On error, return the offending address in
+ * err_va.
+ */
+ if (ccbp->hdr.out_addr_type == DAX_ADDR_TYPE_VA) {
+ dax_dbg("output");
+ if (dax_lock_page(ccbp->out,
+ &ctx->pages[i + idx][OUT]) != 0) {
+ *err_va = (u64)ccbp->out;
+ goto error;
+ }
+ ccbp->hdr.out_addr_type = DAX_ADDR_TYPE_VA_ALT;
+ }
+
+ if (ccbp->hdr.pri_addr_type == DAX_ADDR_TYPE_VA) {
+ dax_dbg("input");
+ if (dax_lock_page(ccbp->pri,
+ &ctx->pages[i + idx][PRI]) != 0) {
+ *err_va = (u64)ccbp->pri;
+ goto error;
+ }
+ ccbp->hdr.pri_addr_type = DAX_ADDR_TYPE_VA_ALT;
+ }
+
+ if (ccbp->hdr.sec_addr_type == DAX_ADDR_TYPE_VA) {
+ dax_dbg("sec input");
+ if (dax_lock_page(ccbp->sec,
+ &ctx->pages[i + idx][SEC]) != 0) {
+ *err_va = (u64)ccbp->sec;
+ goto error;
+ }
+ ccbp->hdr.sec_addr_type = DAX_ADDR_TYPE_VA_ALT;
+ }
+
+ if (ccbp->hdr.table_addr_type == DAX_ADDR_TYPE_VA) {
+ dax_dbg("tbl");
+ if (dax_lock_page(ccbp->tbl,
+ &ctx->pages[i + idx][TBL]) != 0) {
+ *err_va = (u64)ccbp->tbl;
+ goto error;
+ }
+ ccbp->hdr.table_addr_type = DAX_ADDR_TYPE_VA_ALT;
+ }
+
+ /* skip over 2nd 64 bytes of long CCB */
+ if (ccbp->hdr.longccb)
+ i++;
+ }
+ return DAX_SUBMIT_OK;
+
+error:
+ dax_unlock_pages(ctx, idx, nelem);
+ return DAX_SUBMIT_ERR_NOACCESS;
+}
+
+static void dax_ccb_wait(struct dax_ctx *ctx, int idx)
+{
+ int ret, nretries;
+ u16 kill_res;
+
+ dax_dbg("idx=%d", idx);
+
+ for (nretries = 0; nretries < DAX_CCB_RETRIES; nretries++) {
+ if (ctx->ca_buf[idx].status == CCA_STAT_NOT_COMPLETED)
+ udelay(DAX_CCB_USEC);
+ else
+ return;
+ }
+ dax_dbg("ctx (%p): CCB[%d] timed out, wait usec=%d, retries=%d. Killing ccb",
+ (void *)ctx, idx, DAX_CCB_USEC, DAX_CCB_RETRIES);
+
+ ret = dax_ccb_kill(ctx->ca_buf_ra + idx * sizeof(struct dax_cca),
+ &kill_res);
+ dax_dbg("Kill CCB[%d] %s", idx, ret ? "failed" : "succeeded");
+}
+
+static int dax_close(struct inode *ino, struct file *f)
+{
+ struct dax_ctx *ctx = (struct dax_ctx *)f->private_data;
+ int i;
+
+ f->private_data = NULL;
+
+ for (i = 0; i < DAX_CA_ELEMS; i++) {
+ if (ctx->ca_buf[i].status == CCA_STAT_NOT_COMPLETED) {
+ dax_dbg("CCB[%d] not completed", i);
+ dax_ccb_wait(ctx, i);
+ }
+ dax_unlock_pages(ctx, i, 1);
+ }
+
+ kfree(ctx->ccb_buf);
+ kfree(ctx->ca_buf);
+ dax_stat_dbg("CCBs: %d good, %d bad", ctx->ccb_count, ctx->fail_count);
+ kfree(ctx);
+
+ return 0;
+}
+
+static ssize_t dax_read(struct file *f, char __user *buf,
+ size_t count, loff_t *ppos)
+{
+ struct dax_ctx *ctx = f->private_data;
+
+ if (ctx->client != current)
+ return -EUSERS;
+
+ ctx->client = NULL;
+
+ if (count != sizeof(union ccb_result))
+ return -EINVAL;
+ if (copy_to_user(buf, &ctx->result, sizeof(union ccb_result)))
+ return -EFAULT;
+ return count;
+}
+
+static ssize_t dax_write(struct file *f, const char __user *buf,
+ size_t count, loff_t *ppos)
+{
+ struct dax_ctx *ctx = f->private_data;
+ struct dax_command hdr;
+ unsigned long ca;
+ int i, idx, ret;
+
+ if (ctx->client != NULL)
+ return -EINVAL;
+
+ if (count == 0 || count > DAX_MAX_CCBS * sizeof(struct dax_ccb))
+ return -EINVAL;
+
+ if (count % sizeof(struct dax_ccb) == 0)
+ return dax_ccb_exec(ctx, buf, count, ppos); /* CCB EXEC */
+
+ if (count != sizeof(struct dax_command))
+ return -EINVAL;
+
+ /* immediate command */
+ if (ctx->owner != current)
+ return -EUSERS;
+
+ if (copy_from_user(&hdr, buf, sizeof(hdr)))
+ return -EFAULT;
+
+ ca = ctx->ca_buf_ra + hdr.ca_offset;
+
+ switch (hdr.command) {
+ case CCB_KILL:
+ if (hdr.ca_offset >= DAX_MMAP_LEN) {
+ dax_dbg("invalid ca_offset (%d) >= ca_buflen (%d)",
+ hdr.ca_offset, DAX_MMAP_LEN);
+ return -EINVAL;
+ }
+
+ ret = dax_ccb_kill(ca, &ctx->result.kill.action);
+ if (ret != 0) {
+ dax_dbg("dax_ccb_kill failed (ret=%d)", ret);
+ return ret;
+ }
+
+ dax_info_dbg("killed (ca_offset %d)", hdr.ca_offset);
+ idx = hdr.ca_offset / sizeof(struct dax_cca);
+ ctx->ca_buf[idx].status = CCA_STAT_KILLED;
+ ctx->ca_buf[idx].err = CCA_ERR_KILLED;
+ ctx->client = current;
+ return count;
+
+ case CCB_INFO:
+ if (hdr.ca_offset >= DAX_MMAP_LEN) {
+ dax_dbg("invalid ca_offset (%d) >= ca_buflen (%d)",
+ hdr.ca_offset, DAX_MMAP_LEN);
+ return -EINVAL;
+ }
+
+ ret = dax_ccb_info(ca, &ctx->result.info);
+ if (ret != 0) {
+ dax_dbg("dax_ccb_info failed (ret=%d)", ret);
+ return ret;
+ }
+
+ dax_info_dbg("info succeeded on ca_offset %d", hdr.ca_offset);
+ ctx->client = current;
+ return count;
+
+ case CCB_DEQUEUE:
+ for (i = 0; i < DAX_CA_ELEMS; i++) {
+ if (ctx->ca_buf[i].status !=
+ CCA_STAT_NOT_COMPLETED)
+ dax_unlock_pages(ctx, i, 1);
+ }
+ return count;
+
+ default:
+ return -EINVAL;
+ }
+}
+
+static int dax_open(struct inode *inode, struct file *f)
+{
+ struct dax_ctx *ctx = NULL;
+ int i;
+
+ ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
+ if (ctx == NULL)
+ goto done;
+
+ ctx->ccb_buf = kcalloc(DAX_MAX_CCBS, sizeof(struct dax_ccb),
+ GFP_KERNEL);
+ if (ctx->ccb_buf == NULL)
+ goto done;
+
+ ctx->ccb_buf_ra = virt_to_phys(ctx->ccb_buf);
+ dax_dbg("ctx->ccb_buf=0x%p, ccb_buf_ra=0x%llx",
+ (void *)ctx->ccb_buf, ctx->ccb_buf_ra);
+
+ /* allocate CCB completion area buffer */
+ ctx->ca_buf = kzalloc(DAX_MMAP_LEN, GFP_KERNEL);
+ if (ctx->ca_buf == NULL)
+ goto alloc_error;
+ for (i = 0; i < DAX_CA_ELEMS; i++)
+ ctx->ca_buf[i].status = CCA_STAT_COMPLETED;
+
+ ctx->ca_buf_ra = virt_to_phys(ctx->ca_buf);
+ dax_dbg("ctx=0x%p, ctx->ca_buf=0x%p, ca_buf_ra=0x%llx",
+ (void *)ctx, (void *)ctx->ca_buf, ctx->ca_buf_ra);
+
+ ctx->owner = current;
+ f->private_data = ctx;
+ return 0;
+
+alloc_error:
+ kfree(ctx->ccb_buf);
+done:
+ kfree(ctx);
+ return -ENOMEM;
+}
+
+static char *dax_hv_errno(unsigned long hv_ret, int *ret)
+{
+ switch (hv_ret) {
+ case HV_EBADALIGN:
+ *ret = -EFAULT;
+ return "HV_EBADALIGN";
+ case HV_ENORADDR:
+ *ret = -EFAULT;
+ return "HV_ENORADDR";
+ case HV_EINVAL:
+ *ret = -EINVAL;
+ return "HV_EINVAL";
+ case HV_EWOULDBLOCK:
+ *ret = -EAGAIN;
+ return "HV_EWOULDBLOCK";
+ case HV_ENOACCESS:
+ *ret = -EPERM;
+ return "HV_ENOACCESS";
+ default:
+ break;
+ }
+
+ *ret = -EIO;
+ return "UNKNOWN";
+}
+
+static int dax_ccb_kill(u64 ca, u16 *kill_res)
+{
+ unsigned long hv_ret;
+ int count, ret = 0;
+ char *err_str;
+
+ for (count = 0; count < DAX_CCB_RETRIES; count++) {
+ dax_dbg("attempting kill on ca_ra 0x%llx", ca);
+ hv_ret = sun4v_ccb_kill(ca, kill_res);
+
+ if (hv_ret == HV_EOK) {
+ dax_info_dbg("HV_EOK (ca_ra 0x%llx): %d", ca,
+ *kill_res);
+ } else {
+ err_str = dax_hv_errno(hv_ret, &ret);
+ dax_dbg("%s (ca_ra 0x%llx)", err_str, ca);
+ }
+
+ if (ret != -EAGAIN)
+ return ret;
+ dax_info_dbg("ccb_kill count = %d", count);
+ udelay(DAX_CCB_USEC);
+ }
+
+ return -EAGAIN;
+}
+
+static int dax_ccb_info(u64 ca, struct ccb_info_result *info)
+{
+ unsigned long hv_ret;
+ char *err_str;
+ int ret = 0;
+
+ dax_dbg("attempting info on ca_ra 0x%llx", ca);
+ hv_ret = sun4v_ccb_info(ca, info);
+
+ if (hv_ret == HV_EOK) {
+ dax_info_dbg("HV_EOK (ca_ra 0x%llx): %d", ca, info->state);
+ if (info->state == DAX_CCB_ENQUEUED) {
+ dax_info_dbg("dax_unit %d, queue_num %d, queue_pos %d",
+ info->inst_num, info->q_num, info->q_pos);
+ }
+ } else {
+ err_str = dax_hv_errno(hv_ret, &ret);
+ dax_dbg("%s (ca_ra 0x%llx)", err_str, ca);
+ }
+
+ return ret;
+}
+
+static void dax_prt_ccbs(struct dax_ccb *ccb, int nelem)
+{
+ int i, j;
+ u64 *ccbp;
+
+ dax_dbg("ccb buffer:");
+ for (i = 0; i < nelem; i++) {
+ ccbp = (u64 *)&ccb[i];
+ dax_dbg(" %sccb[%d]", ccb[i].hdr.longccb ? "long " : "", i);
+ for (j = 0; j < 8; j++)
+ dax_dbg("\tccb[%d].dwords[%d]=0x%llx",
+ i, j, *(ccbp + j));
+ }
+}
+
+/*
+ * Validates user CCB content. Also sets completion address and address types
+ * for all addresses contained in CCB.
+ */
+static int dax_preprocess_usr_ccbs(struct dax_ctx *ctx, int idx, int nelem)
+{
+ int i;
+
+ /*
+ * The user is not allowed to specify real address types in
+ * the CCB header. This must be enforced by the kernel before
+ * submitting the CCBs to HV. The only allowed values for all
+ * address fields are VA or IMM
+ */
+ for (i = 0; i < nelem; i++) {
+ struct dax_ccb *ccbp = &ctx->ccb_buf[i];
+ unsigned long ca_offset;
+
+ if (ccbp->hdr.ccb_version > max_ccb_version)
+ return DAX_SUBMIT_ERR_CCB_INVAL;
+
+ switch (ccbp->hdr.opcode) {
+ case DAX_OP_SYNC_NOP:
+ case DAX_OP_EXTRACT:
+ case DAX_OP_SCAN_VALUE:
+ case DAX_OP_SCAN_RANGE:
+ case DAX_OP_TRANSLATE:
+ case DAX_OP_SCAN_VALUE | DAX_OP_INVERT:
+ case DAX_OP_SCAN_RANGE | DAX_OP_INVERT:
+ case DAX_OP_TRANSLATE | DAX_OP_INVERT:
+ case DAX_OP_SELECT:
+ break;
+ default:
+ return DAX_SUBMIT_ERR_CCB_INVAL;
+ }
+
+ if (ccbp->hdr.out_addr_type != DAX_ADDR_TYPE_VA &&
+ ccbp->hdr.out_addr_type != DAX_ADDR_TYPE_NONE) {
+ dax_dbg("invalid out_addr_type in user CCB[%d]", i);
+ return DAX_SUBMIT_ERR_CCB_INVAL;
+ }
+
+ if (ccbp->hdr.pri_addr_type != DAX_ADDR_TYPE_VA &&
+ ccbp->hdr.pri_addr_type != DAX_ADDR_TYPE_NONE) {
+ dax_dbg("invalid pri_addr_type in user CCB[%d]", i);
+ return DAX_SUBMIT_ERR_CCB_INVAL;
+ }
+
+ if (ccbp->hdr.sec_addr_type != DAX_ADDR_TYPE_VA &&
+ ccbp->hdr.sec_addr_type != DAX_ADDR_TYPE_NONE) {
+ dax_dbg("invalid sec_addr_type in user CCB[%d]", i);
+ return DAX_SUBMIT_ERR_CCB_INVAL;
+ }
+
+ if (ccbp->hdr.table_addr_type != DAX_ADDR_TYPE_VA &&
+ ccbp->hdr.table_addr_type != DAX_ADDR_TYPE_NONE) {
+ dax_dbg("invalid table_addr_type in user CCB[%d]", i);
+ return DAX_SUBMIT_ERR_CCB_INVAL;
+ }
+
+ /* set completion (real) address and address type */
+ ccbp->hdr.cca_addr_type = DAX_ADDR_TYPE_RA;
+ ca_offset = (idx + i) * sizeof(struct dax_cca);
+ ccbp->ca = (void *)ctx->ca_buf_ra + ca_offset;
+ memset(&ctx->ca_buf[idx + i], 0, sizeof(struct dax_cca));
+
+ dax_dbg("ccb[%d]=%p, ca_offset=0x%lx, compl RA=0x%llx",
+ i, ccbp, ca_offset, ctx->ca_buf_ra + ca_offset);
+
+ /* skip over 2nd 64 bytes of long CCB */
+ if (ccbp->hdr.longccb)
+ i++;
+ }
+
+ return DAX_SUBMIT_OK;
+}
+
+static int dax_ccb_exec(struct dax_ctx *ctx, const char __user *buf,
+ size_t count, loff_t *ppos)
+{
+ unsigned long accepted_len, hv_rv;
+ int i, idx, nccbs, naccepted;
+
+ ctx->client = current;
+ idx = *ppos;
+ nccbs = count / sizeof(struct dax_ccb);
+
+ if (ctx->owner != current) {
+ dax_dbg("wrong thread");
+ ctx->result.exec.status = DAX_SUBMIT_ERR_THR_INIT;
+ return 0;
+ }
+ dax_dbg("args: ccb_buf_len=%ld, idx=%d", count, idx);
+
+ /* for given index and length, verify ca_buf range exists */
+ if (idx < 0 || idx > (DAX_CA_ELEMS - nccbs)) {
+ ctx->result.exec.status = DAX_SUBMIT_ERR_NO_CA_AVAIL;
+ return 0;
+ }
+
+ /*
+ * Copy CCBs into kernel buffer to prevent modification by the
+ * user in between validation and submission.
+ */
+ if (copy_from_user(ctx->ccb_buf, buf, count)) {
+ dax_dbg("copyin of user CCB buffer failed");
+ ctx->result.exec.status = DAX_SUBMIT_ERR_CCB_ARR_MMU_MISS;
+ return 0;
+ }
+
+ /* check to see if ca_buf[idx] .. ca_buf[idx + nccbs] are available */
+ for (i = idx; i < idx + nccbs; i++) {
+ if (ctx->ca_buf[i].status == CCA_STAT_NOT_COMPLETED) {
+ dax_dbg("CA range not available, dequeue needed");
+ ctx->result.exec.status = DAX_SUBMIT_ERR_NO_CA_AVAIL;
+ return 0;
+ }
+ }
+ dax_unlock_pages(ctx, idx, nccbs);
+
+ ctx->result.exec.status = dax_preprocess_usr_ccbs(ctx, idx, nccbs);
+ if (ctx->result.exec.status != DAX_SUBMIT_OK)
+ return 0;
+
+ ctx->result.exec.status = dax_lock_pages(ctx, idx, nccbs,
+ &ctx->result.exec.status_data);
+ if (ctx->result.exec.status != DAX_SUBMIT_OK)
+ return 0;
+
+ if (dax_debug & DAX_DBG_FLG_BASIC)
+ dax_prt_ccbs(ctx->ccb_buf, nccbs);
+
+ hv_rv = sun4v_ccb_submit(ctx->ccb_buf_ra, count,
+ HV_CCB_QUERY_CMD | HV_CCB_VA_SECONDARY, 0,
+ &accepted_len, &ctx->result.exec.status_data);
+
+ switch (hv_rv) {
+ case HV_EOK:
+ /*
+ * Hcall succeeded with no errors but the accepted
+ * length may be less than the requested length. The
+ * only way the driver can resubmit the remainder is
+ * to wait for completion of the submitted CCBs since
+ * there is no way to guarantee the ordering semantics
+ * required by the client applications. Therefore we
+ * let the user library deal with resubmissions.
+ */
+ ctx->result.exec.status = DAX_SUBMIT_OK;
+ break;
+ case HV_EWOULDBLOCK:
+ /*
+ * This is a transient HV API error. The user library
+ * can retry.
+ */
+ dax_dbg("hcall returned HV_EWOULDBLOCK");
+ ctx->result.exec.status = DAX_SUBMIT_ERR_WOULDBLOCK;
+ break;
+ case HV_ENOMAP:
+ /*
+ * HV was unable to translate a VA. The VA it could
+ * not translate is returned in the status_data param.
+ */
+ dax_dbg("hcall returned HV_ENOMAP");
+ ctx->result.exec.status = DAX_SUBMIT_ERR_NOMAP;
+ break;
+ case HV_EINVAL:
+ /*
+ * This is the result of an invalid user CCB as HV is
+ * validating some of the user CCB fields. Pass this
+ * error back to the user. There is no supporting info
+ * to isolate the invalid field.
+ */
+ dax_dbg("hcall returned HV_EINVAL");
+ ctx->result.exec.status = DAX_SUBMIT_ERR_CCB_INVAL;
+ break;
+ case HV_ENOACCESS:
+ /*
+ * HV found a VA that did not have the appropriate
+ * permissions (such as the w bit). The VA in question
+ * is returned in status_data param.
+ */
+ dax_dbg("hcall returned HV_ENOACCESS");
+ ctx->result.exec.status = DAX_SUBMIT_ERR_NOACCESS;
+ break;
+ case HV_EUNAVAILABLE:
+ /*
+ * The requested CCB operation could not be performed
+ * at this time. Return the specific unavailable code
+ * in the status_data field.
+ */
+ dax_dbg("hcall returned HV_EUNAVAILABLE");
+ ctx->result.exec.status = DAX_SUBMIT_ERR_UNAVAIL;
+ break;
+ default:
+ ctx->result.exec.status = DAX_SUBMIT_ERR_INTERNAL;
+ dax_dbg("unknown hcall return value (%ld)", hv_rv);
+ break;
+ }
+
+ /* unlock pages associated with the unaccepted CCBs */
+ naccepted = accepted_len / sizeof(struct dax_ccb);
+ dax_unlock_pages(ctx, idx + naccepted, nccbs - naccepted);
+
+ /* mark unaccepted CCBs as not completed */
+ for (i = idx + naccepted; i < idx + nccbs; i++)
+ ctx->ca_buf[i].status = CCA_STAT_COMPLETED;
+
+ ctx->ccb_count += naccepted;
+ ctx->fail_count += nccbs - naccepted;
+
+ dax_dbg("hcall rv=%ld, accepted_len=%ld, status_data=0x%llx, ret status=%d",
+ hv_rv, accepted_len, ctx->result.exec.status_data,
+ ctx->result.exec.status);
+
+ if (count == accepted_len)
+ ctx->client = NULL; /* no read needed to complete protocol */
+ return accepted_len;
+}