From 5b7c4cabbb65f5c469464da6c5f614cbd7f730f2 Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Tue, 21 Feb 2023 18:24:12 -0800 Subject: Merge tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next Pull networking updates from Jakub Kicinski: "Core: - Add dedicated kmem_cache for typical/small skb->head, avoid having to access struct page at kfree time, and improve memory use. - Introduce sysctl to set default RPS configuration for new netdevs. - Define Netlink protocol specification format which can be used to describe messages used by each family and auto-generate parsers. Add tools for generating kernel data structures and uAPI headers. - Expose all net/core sysctls inside netns. - Remove 4s sleep in netpoll if carrier is instantly detected on boot. - Add configurable limit of MDB entries per port, and port-vlan. - Continue populating drop reasons throughout the stack. - Retire a handful of legacy Qdiscs and classifiers. Protocols: - Support IPv4 big TCP (TSO frames larger than 64kB). - Add IP_LOCAL_PORT_RANGE socket option, to control local port range on socket by socket basis. - Track and report in procfs number of MPTCP sockets used. - Support mixing IPv4 and IPv6 flows in the in-kernel MPTCP path manager. - IPv6: don't check net.ipv6.route.max_size and rely on garbage collection to free memory (similarly to IPv4). - Support Penultimate Segment Pop (PSP) flavor in SRv6 (RFC8986). - ICMP: add per-rate limit counters. - Add support for user scanning requests in ieee802154. - Remove static WEP support. - Support minimal Wi-Fi 7 Extremely High Throughput (EHT) rate reporting. - WiFi 7 EHT channel puncturing support (client & AP). BPF: - Add a rbtree data structure following the "next-gen data structure" precedent set by recently added linked list, that is, by using kfunc + kptr instead of adding a new BPF map type. - Expose XDP hints via kfuncs with initial support for RX hash and timestamp metadata. - Add BPF_F_NO_TUNNEL_KEY extension to bpf_skb_set_tunnel_key to better support decap on GRE tunnel devices not operating in collect metadata. - Improve x86 JIT's codegen for PROBE_MEM runtime error checks. - Remove the need for trace_printk_lock for bpf_trace_printk and bpf_trace_vprintk helpers. - Extend libbpf's bpf_tracing.h support for tracing arguments of kprobes/uprobes and syscall as a special case. - Significantly reduce the search time for module symbols by livepatch and BPF. - Enable cpumasks to be used as kptrs, which is useful for tracing programs tracking which tasks end up running on which CPUs in different time intervals. - Add support for BPF trampoline on s390x and riscv64. - Add capability to export the XDP features supported by the NIC. - Add __bpf_kfunc tag for marking kernel functions as kfuncs. - Add cgroup.memory=nobpf kernel parameter option to disable BPF memory accounting for container environments. Netfilter: - Remove the CLUSTERIP target. It has been marked as obsolete for years, and we still have WARN splats wrt races of the out-of-band /proc interface installed by this target. - Add 'destroy' commands to nf_tables. They are identical to the existing 'delete' commands, but do not return an error if the referenced object (set, chain, rule...) did not exist. Driver API: - Improve cpumask_local_spread() locality to help NICs set the right IRQ affinity on AMD platforms. - Separate C22 and C45 MDIO bus transactions more clearly. - Introduce new DCB table to control DSCP rewrite on egress. - Support configuration of Physical Layer Collision Avoidance (PLCA) Reconciliation Sublayer (RS) (802.3cg-2019). Modern version of shared medium Ethernet. - Support for MAC Merge layer (IEEE 802.3-2018 clause 99). Allowing preemption of low priority frames by high priority frames. - Add support for controlling MACSec offload using netlink SET. - Rework devlink instance refcounts to allow registration and de-registration under the instance lock. Split the code into multiple files, drop some of the unnecessarily granular locks and factor out common parts of netlink operation handling. - Add TX frame aggregation parameters (for USB drivers). - Add a new attr TCA_EXT_WARN_MSG to report TC (offload) warning messages with notifications for debug. - Allow offloading of UDP NEW connections via act_ct. - Add support for per action HW stats in TC. - Support hardware miss to TC action (continue processing in SW from a specific point in the action chain). - Warn if old Wireless Extension user space interface is used with modern cfg80211/mac80211 drivers. Do not support Wireless Extensions for Wi-Fi 7 devices at all. Everyone should switch to using nl80211 interface instead. - Improve the CAN bit timing configuration. Use extack to return error messages directly to user space, update the SJW handling, including the definition of a new default value that will benefit CAN-FD controllers, by increasing their oscillator tolerance. New hardware / drivers: - Ethernet: - nVidia BlueField-3 support (control traffic driver) - Ethernet support for imx93 SoCs - Motorcomm yt8531 gigabit Ethernet PHY - onsemi NCN26000 10BASE-T1S PHY (with support for PLCA) - Microchip LAN8841 PHY (incl. cable diagnostics and PTP) - Amlogic gxl MDIO mux - WiFi: - RealTek RTL8188EU (rtl8xxxu) - Qualcomm Wi-Fi 7 devices (ath12k) - CAN: - Renesas R-Car V4H Drivers: - Bluetooth: - Set Per Platform Antenna Gain (PPAG) for Intel controllers. - Ethernet NICs: - Intel (1G, igc): - support TSN / Qbv / packet scheduling features of i226 model - Intel (100G, ice): - use GNSS subsystem instead of TTY - multi-buffer XDP support - extend support for GPIO pins to E823 devices - nVidia/Mellanox: - update the shared buffer configuration on PFC commands - implement PTP adjphase function for HW offset control - TC support for Geneve and GRE with VF tunnel offload - more efficient crypto key management method - multi-port eswitch support - Netronome/Corigine: - add DCB IEEE support - support IPsec offloading for NFP3800 - Freescale/NXP (enetc): - support XDP_REDIRECT for XDP non-linear buffers - improve reconfig, avoid link flap and waiting for idle - support MAC Merge layer - Other NICs: - sfc/ef100: add basic devlink support for ef100 - ionic: rx_push mode operation (writing descriptors via MMIO) - bnxt: use the auxiliary bus abstraction for RDMA - r8169: disable ASPM and reset bus in case of tx timeout - cpsw: support QSGMII mode for J721e CPSW9G - cpts: support pulse-per-second output - ngbe: add an mdio bus driver - usbnet: optimize usbnet_bh() by avoiding unnecessary queuing - r8152: handle devices with FW with NCM support - amd-xgbe: support 10Mbps, 2.5GbE speeds and rx-adaptation - virtio-net: support multi buffer XDP - virtio/vsock: replace virtio_vsock_pkt with sk_buff - tsnep: XDP support - Ethernet high-speed switches: - nVidia/Mellanox (mlxsw): - add support for latency TLV (in FW control messages) - Microchip (sparx5): - separate explicit and implicit traffic forwarding rules, make the implicit rules always active - add support for egress DSCP rewrite - IS0 VCAP support (Ingress Classification) - IS2 VCAP filters (protos, L3 addrs, L4 ports, flags, ToS etc.) - ES2 VCAP support (Egress Access Control) - support for Per-Stream Filtering and Policing (802.1Q, 8.6.5.1) - Ethernet embedded switches: - Marvell (mv88e6xxx): - add MAB (port auth) offload support - enable PTP receive for mv88e6390 - NXP (ocelot): - support MAC Merge layer - support for the the vsc7512 internal copper phys - Microchip: - lan9303: convert to PHYLINK - lan966x: support TC flower filter statistics - lan937x: PTP support for KSZ9563/KSZ8563 and LAN937x - lan937x: support Credit Based Shaper configuration - ksz9477: support Energy Efficient Ethernet - other: - qca8k: convert to regmap read/write API, use bulk operations - rswitch: Improve TX timestamp accuracy - Intel WiFi (iwlwifi): - EHT (Wi-Fi 7) rate reporting - STEP equalizer support: transfer some STEP (connection to radio on platforms with integrated wifi) related parameters from the BIOS to the firmware. - Qualcomm 802.11ax WiFi (ath11k): - IPQ5018 support - Fine Timing Measurement (FTM) responder role support - channel 177 support - MediaTek WiFi (mt76): - per-PHY LED support - mt7996: EHT (Wi-Fi 7) support - Wireless Ethernet Dispatch (WED) reset support - switch to using page pool allocator - RealTek WiFi (rtw89): - support new version of Bluetooth co-existance - Mobile: - rmnet: support TX aggregation" * tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1872 commits) page_pool: add a comment explaining the fragment counter usage net: ethtool: fix __ethtool_dev_mm_supported() implementation ethtool: pse-pd: Fix double word in comments xsk: add linux/vmalloc.h to xsk.c sefltests: netdevsim: wait for devlink instance after netns removal selftest: fib_tests: Always cleanup before exit net/mlx5e: Align IPsec ASO result memory to be as required by hardware net/mlx5e: TC, Set CT miss to the specific ct action instance net/mlx5e: Rename CHAIN_TO_REG to MAPPED_OBJ_TO_REG net/mlx5: Refactor tc miss handling to a single function net/mlx5: Kconfig: Make tc offload depend on tc skb extension net/sched: flower: Support hardware miss to tc action net/sched: flower: Move filter handle initialization earlier net/sched: cls_api: Support hardware miss to tc action net/sched: Rename user cookie and act cookie sfc: fix builds without CONFIG_RTC_LIB sfc: clean up some inconsistent indentings net/mlx4_en: Introduce flexible array to silence overflow warning net: lan966x: Fix possible deadlock inside PTP net/ulp: Remove redundant ->clone() test in inet_clone_ulp(). ... --- drivers/i2c/busses/i2c-iop3xx.c | 544 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 544 insertions(+) create mode 100644 drivers/i2c/busses/i2c-iop3xx.c (limited to 'drivers/i2c/busses/i2c-iop3xx.c') diff --git a/drivers/i2c/busses/i2c-iop3xx.c b/drivers/i2c/busses/i2c-iop3xx.c new file mode 100644 index 000000000..4a6ff54d8 --- /dev/null +++ b/drivers/i2c/busses/i2c-iop3xx.c @@ -0,0 +1,544 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* ------------------------------------------------------------------------- */ +/* i2c-iop3xx.c i2c driver algorithms for Intel XScale IOP3xx & IXP46x */ +/* ------------------------------------------------------------------------- */ +/* Copyright (C) 2003 Peter Milne, D-TACQ Solutions Ltd + * + * + * With acknowledgements to i2c-algo-ibm_ocp.c by + * Ian DaSilva, MontaVista Software, Inc. idasilva@mvista.com + * + * And i2c-algo-pcf.c, which was created by Simon G. Vogl and Hans Berglund: + * + * Copyright (C) 1995-1997 Simon G. Vogl, 1998-2000 Hans Berglund + * + * And which acknowledged Kyösti Mälkki , + * Frodo Looijaard , Martin Bailey + * + * Major cleanup by Deepak Saxena , 01/2005: + * + * - Use driver model to pass per-chip info instead of hardcoding and #ifdefs + * - Use ioremap/__raw_readl/__raw_writel instead of direct dereference + * - Make it work with IXP46x chips + * - Cleanup function names, coding style, etc + * + * - writing to slave address causes latchup on iop331. + * fix: driver refuses to address self. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "i2c-iop3xx.h" + +/* global unit counter */ +static int i2c_id; + +static inline unsigned char +iic_cook_addr(struct i2c_msg *msg) +{ + unsigned char addr; + + addr = i2c_8bit_addr_from_msg(msg); + + return addr; +} + +static void +iop3xx_i2c_reset(struct i2c_algo_iop3xx_data *iop3xx_adap) +{ + /* Follows devman 9.3 */ + __raw_writel(IOP3XX_ICR_UNIT_RESET, iop3xx_adap->ioaddr + CR_OFFSET); + __raw_writel(IOP3XX_ISR_CLEARBITS, iop3xx_adap->ioaddr + SR_OFFSET); + __raw_writel(0, iop3xx_adap->ioaddr + CR_OFFSET); +} + +static void +iop3xx_i2c_enable(struct i2c_algo_iop3xx_data *iop3xx_adap) +{ + u32 cr = IOP3XX_ICR_GCD | IOP3XX_ICR_SCLEN | IOP3XX_ICR_UE; + + /* + * Every time unit enable is asserted, GPOD needs to be cleared + * on IOP3XX to avoid data corruption on the bus. We use the + * gpiod_set_raw_value() to make sure the 0 hits the hardware + * GPOD register. These descriptors are only passed along to + * the device if this is necessary. + */ + if (iop3xx_adap->gpio_scl) + gpiod_set_raw_value(iop3xx_adap->gpio_scl, 0); + if (iop3xx_adap->gpio_sda) + gpiod_set_raw_value(iop3xx_adap->gpio_sda, 0); + + /* NB SR bits not same position as CR IE bits :-( */ + iop3xx_adap->SR_enabled = + IOP3XX_ISR_ALD | IOP3XX_ISR_BERRD | + IOP3XX_ISR_RXFULL | IOP3XX_ISR_TXEMPTY; + + cr |= IOP3XX_ICR_ALD_IE | IOP3XX_ICR_BERR_IE | + IOP3XX_ICR_RXFULL_IE | IOP3XX_ICR_TXEMPTY_IE; + + __raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); +} + +static void +iop3xx_i2c_transaction_cleanup(struct i2c_algo_iop3xx_data *iop3xx_adap) +{ + unsigned long cr = __raw_readl(iop3xx_adap->ioaddr + CR_OFFSET); + + cr &= ~(IOP3XX_ICR_MSTART | IOP3XX_ICR_TBYTE | + IOP3XX_ICR_MSTOP | IOP3XX_ICR_SCLEN); + + __raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); +} + +/* + * NB: the handler has to clear the source of the interrupt! + * Then it passes the SR flags of interest to BH via adap data + */ +static irqreturn_t +iop3xx_i2c_irq_handler(int this_irq, void *dev_id) +{ + struct i2c_algo_iop3xx_data *iop3xx_adap = dev_id; + u32 sr = __raw_readl(iop3xx_adap->ioaddr + SR_OFFSET); + + if ((sr &= iop3xx_adap->SR_enabled)) { + __raw_writel(sr, iop3xx_adap->ioaddr + SR_OFFSET); + iop3xx_adap->SR_received |= sr; + wake_up_interruptible(&iop3xx_adap->waitq); + } + return IRQ_HANDLED; +} + +/* check all error conditions, clear them , report most important */ +static int +iop3xx_i2c_error(u32 sr) +{ + int rc = 0; + + if ((sr & IOP3XX_ISR_BERRD)) { + if (!rc) + rc = -I2C_ERR_BERR; + } + if ((sr & IOP3XX_ISR_ALD)) { + if (!rc) + rc = -I2C_ERR_ALD; + } + return rc; +} + +static inline u32 +iop3xx_i2c_get_srstat(struct i2c_algo_iop3xx_data *iop3xx_adap) +{ + unsigned long flags; + u32 sr; + + spin_lock_irqsave(&iop3xx_adap->lock, flags); + sr = iop3xx_adap->SR_received; + iop3xx_adap->SR_received = 0; + spin_unlock_irqrestore(&iop3xx_adap->lock, flags); + + return sr; +} + +/* + * sleep until interrupted, then recover and analyse the SR + * saved by handler + */ +typedef int (*compare_func)(unsigned test, unsigned mask); +/* returns 1 on correct comparison */ + +static int +iop3xx_i2c_wait_event(struct i2c_algo_iop3xx_data *iop3xx_adap, + unsigned flags, unsigned *status, + compare_func compare) +{ + unsigned sr = 0; + int interrupted; + int done; + int rc = 0; + + do { + interrupted = wait_event_interruptible_timeout ( + iop3xx_adap->waitq, + (done = compare(sr = iop3xx_i2c_get_srstat(iop3xx_adap), flags)), + 1 * HZ + ); + if ((rc = iop3xx_i2c_error(sr)) < 0) { + *status = sr; + return rc; + } else if (!interrupted) { + *status = sr; + return -ETIMEDOUT; + } + } while (!done); + + *status = sr; + + return 0; +} + +/* + * Concrete compare_funcs + */ +static int +all_bits_clear(unsigned test, unsigned mask) +{ + return (test & mask) == 0; +} + +static int +any_bits_set(unsigned test, unsigned mask) +{ + return (test & mask) != 0; +} + +static int +iop3xx_i2c_wait_tx_done(struct i2c_algo_iop3xx_data *iop3xx_adap, int *status) +{ + return iop3xx_i2c_wait_event( + iop3xx_adap, + IOP3XX_ISR_TXEMPTY | IOP3XX_ISR_ALD | IOP3XX_ISR_BERRD, + status, any_bits_set); +} + +static int +iop3xx_i2c_wait_rx_done(struct i2c_algo_iop3xx_data *iop3xx_adap, int *status) +{ + return iop3xx_i2c_wait_event( + iop3xx_adap, + IOP3XX_ISR_RXFULL | IOP3XX_ISR_ALD | IOP3XX_ISR_BERRD, + status, any_bits_set); +} + +static int +iop3xx_i2c_wait_idle(struct i2c_algo_iop3xx_data *iop3xx_adap, int *status) +{ + return iop3xx_i2c_wait_event( + iop3xx_adap, IOP3XX_ISR_UNITBUSY, status, all_bits_clear); +} + +static int +iop3xx_i2c_send_target_addr(struct i2c_algo_iop3xx_data *iop3xx_adap, + struct i2c_msg *msg) +{ + unsigned long cr = __raw_readl(iop3xx_adap->ioaddr + CR_OFFSET); + int status; + int rc; + + /* avoid writing to my slave address (hangs on 80331), + * forbidden in Intel developer manual + */ + if (msg->addr == MYSAR) { + return -EBUSY; + } + + __raw_writel(iic_cook_addr(msg), iop3xx_adap->ioaddr + DBR_OFFSET); + + cr &= ~(IOP3XX_ICR_MSTOP | IOP3XX_ICR_NACK); + cr |= IOP3XX_ICR_MSTART | IOP3XX_ICR_TBYTE; + + __raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); + rc = iop3xx_i2c_wait_tx_done(iop3xx_adap, &status); + + return rc; +} + +static int +iop3xx_i2c_write_byte(struct i2c_algo_iop3xx_data *iop3xx_adap, char byte, + int stop) +{ + unsigned long cr = __raw_readl(iop3xx_adap->ioaddr + CR_OFFSET); + int status; + int rc = 0; + + __raw_writel(byte, iop3xx_adap->ioaddr + DBR_OFFSET); + cr &= ~IOP3XX_ICR_MSTART; + if (stop) { + cr |= IOP3XX_ICR_MSTOP; + } else { + cr &= ~IOP3XX_ICR_MSTOP; + } + cr |= IOP3XX_ICR_TBYTE; + __raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); + rc = iop3xx_i2c_wait_tx_done(iop3xx_adap, &status); + + return rc; +} + +static int +iop3xx_i2c_read_byte(struct i2c_algo_iop3xx_data *iop3xx_adap, char *byte, + int stop) +{ + unsigned long cr = __raw_readl(iop3xx_adap->ioaddr + CR_OFFSET); + int status; + int rc = 0; + + cr &= ~IOP3XX_ICR_MSTART; + + if (stop) { + cr |= IOP3XX_ICR_MSTOP | IOP3XX_ICR_NACK; + } else { + cr &= ~(IOP3XX_ICR_MSTOP | IOP3XX_ICR_NACK); + } + cr |= IOP3XX_ICR_TBYTE; + __raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); + + rc = iop3xx_i2c_wait_rx_done(iop3xx_adap, &status); + + *byte = __raw_readl(iop3xx_adap->ioaddr + DBR_OFFSET); + + return rc; +} + +static int +iop3xx_i2c_writebytes(struct i2c_adapter *i2c_adap, const char *buf, int count) +{ + struct i2c_algo_iop3xx_data *iop3xx_adap = i2c_adap->algo_data; + int ii; + int rc = 0; + + for (ii = 0; rc == 0 && ii != count; ++ii) + rc = iop3xx_i2c_write_byte(iop3xx_adap, buf[ii], ii == count-1); + return rc; +} + +static int +iop3xx_i2c_readbytes(struct i2c_adapter *i2c_adap, char *buf, int count) +{ + struct i2c_algo_iop3xx_data *iop3xx_adap = i2c_adap->algo_data; + int ii; + int rc = 0; + + for (ii = 0; rc == 0 && ii != count; ++ii) + rc = iop3xx_i2c_read_byte(iop3xx_adap, &buf[ii], ii == count-1); + + return rc; +} + +/* + * Description: This function implements combined transactions. Combined + * transactions consist of combinations of reading and writing blocks of data. + * FROM THE SAME ADDRESS + * Each transfer (i.e. a read or a write) is separated by a repeated start + * condition. + */ +static int +iop3xx_i2c_handle_msg(struct i2c_adapter *i2c_adap, struct i2c_msg *pmsg) +{ + struct i2c_algo_iop3xx_data *iop3xx_adap = i2c_adap->algo_data; + int rc; + + rc = iop3xx_i2c_send_target_addr(iop3xx_adap, pmsg); + if (rc < 0) { + return rc; + } + + if ((pmsg->flags&I2C_M_RD)) { + return iop3xx_i2c_readbytes(i2c_adap, pmsg->buf, pmsg->len); + } else { + return iop3xx_i2c_writebytes(i2c_adap, pmsg->buf, pmsg->len); + } +} + +/* + * master_xfer() - main read/write entry + */ +static int +iop3xx_i2c_master_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, + int num) +{ + struct i2c_algo_iop3xx_data *iop3xx_adap = i2c_adap->algo_data; + int im = 0; + int ret = 0; + int status; + + iop3xx_i2c_wait_idle(iop3xx_adap, &status); + iop3xx_i2c_reset(iop3xx_adap); + iop3xx_i2c_enable(iop3xx_adap); + + for (im = 0; ret == 0 && im != num; im++) { + ret = iop3xx_i2c_handle_msg(i2c_adap, &msgs[im]); + } + + iop3xx_i2c_transaction_cleanup(iop3xx_adap); + + if (ret) + return ret; + + return im; +} + +static u32 +iop3xx_i2c_func(struct i2c_adapter *adap) +{ + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; +} + +static const struct i2c_algorithm iop3xx_i2c_algo = { + .master_xfer = iop3xx_i2c_master_xfer, + .functionality = iop3xx_i2c_func, +}; + +static int +iop3xx_i2c_remove(struct platform_device *pdev) +{ + struct i2c_adapter *padapter = platform_get_drvdata(pdev); + struct i2c_algo_iop3xx_data *adapter_data = + (struct i2c_algo_iop3xx_data *)padapter->algo_data; + struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + unsigned long cr = __raw_readl(adapter_data->ioaddr + CR_OFFSET); + + /* + * Disable the actual HW unit + */ + cr &= ~(IOP3XX_ICR_ALD_IE | IOP3XX_ICR_BERR_IE | + IOP3XX_ICR_RXFULL_IE | IOP3XX_ICR_TXEMPTY_IE); + __raw_writel(cr, adapter_data->ioaddr + CR_OFFSET); + + iounmap(adapter_data->ioaddr); + release_mem_region(res->start, IOP3XX_I2C_IO_SIZE); + kfree(adapter_data); + kfree(padapter); + + return 0; +} + +static int +iop3xx_i2c_probe(struct platform_device *pdev) +{ + struct resource *res; + int ret, irq; + struct i2c_adapter *new_adapter; + struct i2c_algo_iop3xx_data *adapter_data; + + new_adapter = kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL); + if (!new_adapter) { + ret = -ENOMEM; + goto out; + } + + adapter_data = kzalloc(sizeof(struct i2c_algo_iop3xx_data), GFP_KERNEL); + if (!adapter_data) { + ret = -ENOMEM; + goto free_adapter; + } + + adapter_data->gpio_scl = devm_gpiod_get_optional(&pdev->dev, + "scl", + GPIOD_ASIS); + if (IS_ERR(adapter_data->gpio_scl)) { + ret = PTR_ERR(adapter_data->gpio_scl); + goto free_both; + } + adapter_data->gpio_sda = devm_gpiod_get_optional(&pdev->dev, + "sda", + GPIOD_ASIS); + if (IS_ERR(adapter_data->gpio_sda)) { + ret = PTR_ERR(adapter_data->gpio_sda); + goto free_both; + } + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + ret = -ENODEV; + goto free_both; + } + + if (!request_mem_region(res->start, IOP3XX_I2C_IO_SIZE, pdev->name)) { + ret = -EBUSY; + goto free_both; + } + + /* set the adapter enumeration # */ + adapter_data->id = i2c_id++; + + adapter_data->ioaddr = ioremap(res->start, IOP3XX_I2C_IO_SIZE); + if (!adapter_data->ioaddr) { + ret = -ENOMEM; + goto release_region; + } + + irq = platform_get_irq(pdev, 0); + if (irq < 0) { + ret = irq; + goto unmap; + } + ret = request_irq(irq, iop3xx_i2c_irq_handler, 0, + pdev->name, adapter_data); + + if (ret) + goto unmap; + + memcpy(new_adapter->name, pdev->name, strlen(pdev->name)); + new_adapter->owner = THIS_MODULE; + new_adapter->class = I2C_CLASS_HWMON | I2C_CLASS_SPD; + new_adapter->dev.parent = &pdev->dev; + new_adapter->dev.of_node = pdev->dev.of_node; + new_adapter->nr = pdev->id; + + /* + * Default values...should these come in from board code? + */ + new_adapter->timeout = HZ; + new_adapter->algo = &iop3xx_i2c_algo; + + init_waitqueue_head(&adapter_data->waitq); + spin_lock_init(&adapter_data->lock); + + iop3xx_i2c_reset(adapter_data); + iop3xx_i2c_enable(adapter_data); + + platform_set_drvdata(pdev, new_adapter); + new_adapter->algo_data = adapter_data; + + i2c_add_numbered_adapter(new_adapter); + + return 0; + +unmap: + iounmap(adapter_data->ioaddr); + +release_region: + release_mem_region(res->start, IOP3XX_I2C_IO_SIZE); + +free_both: + kfree(adapter_data); + +free_adapter: + kfree(new_adapter); + +out: + return ret; +} + +static const struct of_device_id i2c_iop3xx_match[] = { + { .compatible = "intel,iop3xx-i2c", }, + { .compatible = "intel,ixp4xx-i2c", }, + {}, +}; +MODULE_DEVICE_TABLE(of, i2c_iop3xx_match); + +static struct platform_driver iop3xx_i2c_driver = { + .probe = iop3xx_i2c_probe, + .remove = iop3xx_i2c_remove, + .driver = { + .name = "IOP3xx-I2C", + .of_match_table = i2c_iop3xx_match, + }, +}; + +module_platform_driver(iop3xx_i2c_driver); + +MODULE_AUTHOR("D-TACQ Solutions Ltd "); +MODULE_DESCRIPTION("IOP3xx iic algorithm and driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:IOP3xx-I2C"); -- cgit v1.2.3