From 5b7c4cabbb65f5c469464da6c5f614cbd7f730f2 Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Tue, 21 Feb 2023 18:24:12 -0800 Subject: Merge tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next Pull networking updates from Jakub Kicinski: "Core: - Add dedicated kmem_cache for typical/small skb->head, avoid having to access struct page at kfree time, and improve memory use. - Introduce sysctl to set default RPS configuration for new netdevs. - Define Netlink protocol specification format which can be used to describe messages used by each family and auto-generate parsers. Add tools for generating kernel data structures and uAPI headers. - Expose all net/core sysctls inside netns. - Remove 4s sleep in netpoll if carrier is instantly detected on boot. - Add configurable limit of MDB entries per port, and port-vlan. - Continue populating drop reasons throughout the stack. - Retire a handful of legacy Qdiscs and classifiers. Protocols: - Support IPv4 big TCP (TSO frames larger than 64kB). - Add IP_LOCAL_PORT_RANGE socket option, to control local port range on socket by socket basis. - Track and report in procfs number of MPTCP sockets used. - Support mixing IPv4 and IPv6 flows in the in-kernel MPTCP path manager. - IPv6: don't check net.ipv6.route.max_size and rely on garbage collection to free memory (similarly to IPv4). - Support Penultimate Segment Pop (PSP) flavor in SRv6 (RFC8986). - ICMP: add per-rate limit counters. - Add support for user scanning requests in ieee802154. - Remove static WEP support. - Support minimal Wi-Fi 7 Extremely High Throughput (EHT) rate reporting. - WiFi 7 EHT channel puncturing support (client & AP). BPF: - Add a rbtree data structure following the "next-gen data structure" precedent set by recently added linked list, that is, by using kfunc + kptr instead of adding a new BPF map type. - Expose XDP hints via kfuncs with initial support for RX hash and timestamp metadata. - Add BPF_F_NO_TUNNEL_KEY extension to bpf_skb_set_tunnel_key to better support decap on GRE tunnel devices not operating in collect metadata. - Improve x86 JIT's codegen for PROBE_MEM runtime error checks. - Remove the need for trace_printk_lock for bpf_trace_printk and bpf_trace_vprintk helpers. - Extend libbpf's bpf_tracing.h support for tracing arguments of kprobes/uprobes and syscall as a special case. - Significantly reduce the search time for module symbols by livepatch and BPF. - Enable cpumasks to be used as kptrs, which is useful for tracing programs tracking which tasks end up running on which CPUs in different time intervals. - Add support for BPF trampoline on s390x and riscv64. - Add capability to export the XDP features supported by the NIC. - Add __bpf_kfunc tag for marking kernel functions as kfuncs. - Add cgroup.memory=nobpf kernel parameter option to disable BPF memory accounting for container environments. Netfilter: - Remove the CLUSTERIP target. It has been marked as obsolete for years, and we still have WARN splats wrt races of the out-of-band /proc interface installed by this target. - Add 'destroy' commands to nf_tables. They are identical to the existing 'delete' commands, but do not return an error if the referenced object (set, chain, rule...) did not exist. Driver API: - Improve cpumask_local_spread() locality to help NICs set the right IRQ affinity on AMD platforms. - Separate C22 and C45 MDIO bus transactions more clearly. - Introduce new DCB table to control DSCP rewrite on egress. - Support configuration of Physical Layer Collision Avoidance (PLCA) Reconciliation Sublayer (RS) (802.3cg-2019). Modern version of shared medium Ethernet. - Support for MAC Merge layer (IEEE 802.3-2018 clause 99). Allowing preemption of low priority frames by high priority frames. - Add support for controlling MACSec offload using netlink SET. - Rework devlink instance refcounts to allow registration and de-registration under the instance lock. Split the code into multiple files, drop some of the unnecessarily granular locks and factor out common parts of netlink operation handling. - Add TX frame aggregation parameters (for USB drivers). - Add a new attr TCA_EXT_WARN_MSG to report TC (offload) warning messages with notifications for debug. - Allow offloading of UDP NEW connections via act_ct. - Add support for per action HW stats in TC. - Support hardware miss to TC action (continue processing in SW from a specific point in the action chain). - Warn if old Wireless Extension user space interface is used with modern cfg80211/mac80211 drivers. Do not support Wireless Extensions for Wi-Fi 7 devices at all. Everyone should switch to using nl80211 interface instead. - Improve the CAN bit timing configuration. Use extack to return error messages directly to user space, update the SJW handling, including the definition of a new default value that will benefit CAN-FD controllers, by increasing their oscillator tolerance. New hardware / drivers: - Ethernet: - nVidia BlueField-3 support (control traffic driver) - Ethernet support for imx93 SoCs - Motorcomm yt8531 gigabit Ethernet PHY - onsemi NCN26000 10BASE-T1S PHY (with support for PLCA) - Microchip LAN8841 PHY (incl. cable diagnostics and PTP) - Amlogic gxl MDIO mux - WiFi: - RealTek RTL8188EU (rtl8xxxu) - Qualcomm Wi-Fi 7 devices (ath12k) - CAN: - Renesas R-Car V4H Drivers: - Bluetooth: - Set Per Platform Antenna Gain (PPAG) for Intel controllers. - Ethernet NICs: - Intel (1G, igc): - support TSN / Qbv / packet scheduling features of i226 model - Intel (100G, ice): - use GNSS subsystem instead of TTY - multi-buffer XDP support - extend support for GPIO pins to E823 devices - nVidia/Mellanox: - update the shared buffer configuration on PFC commands - implement PTP adjphase function for HW offset control - TC support for Geneve and GRE with VF tunnel offload - more efficient crypto key management method - multi-port eswitch support - Netronome/Corigine: - add DCB IEEE support - support IPsec offloading for NFP3800 - Freescale/NXP (enetc): - support XDP_REDIRECT for XDP non-linear buffers - improve reconfig, avoid link flap and waiting for idle - support MAC Merge layer - Other NICs: - sfc/ef100: add basic devlink support for ef100 - ionic: rx_push mode operation (writing descriptors via MMIO) - bnxt: use the auxiliary bus abstraction for RDMA - r8169: disable ASPM and reset bus in case of tx timeout - cpsw: support QSGMII mode for J721e CPSW9G - cpts: support pulse-per-second output - ngbe: add an mdio bus driver - usbnet: optimize usbnet_bh() by avoiding unnecessary queuing - r8152: handle devices with FW with NCM support - amd-xgbe: support 10Mbps, 2.5GbE speeds and rx-adaptation - virtio-net: support multi buffer XDP - virtio/vsock: replace virtio_vsock_pkt with sk_buff - tsnep: XDP support - Ethernet high-speed switches: - nVidia/Mellanox (mlxsw): - add support for latency TLV (in FW control messages) - Microchip (sparx5): - separate explicit and implicit traffic forwarding rules, make the implicit rules always active - add support for egress DSCP rewrite - IS0 VCAP support (Ingress Classification) - IS2 VCAP filters (protos, L3 addrs, L4 ports, flags, ToS etc.) - ES2 VCAP support (Egress Access Control) - support for Per-Stream Filtering and Policing (802.1Q, 8.6.5.1) - Ethernet embedded switches: - Marvell (mv88e6xxx): - add MAB (port auth) offload support - enable PTP receive for mv88e6390 - NXP (ocelot): - support MAC Merge layer - support for the the vsc7512 internal copper phys - Microchip: - lan9303: convert to PHYLINK - lan966x: support TC flower filter statistics - lan937x: PTP support for KSZ9563/KSZ8563 and LAN937x - lan937x: support Credit Based Shaper configuration - ksz9477: support Energy Efficient Ethernet - other: - qca8k: convert to regmap read/write API, use bulk operations - rswitch: Improve TX timestamp accuracy - Intel WiFi (iwlwifi): - EHT (Wi-Fi 7) rate reporting - STEP equalizer support: transfer some STEP (connection to radio on platforms with integrated wifi) related parameters from the BIOS to the firmware. - Qualcomm 802.11ax WiFi (ath11k): - IPQ5018 support - Fine Timing Measurement (FTM) responder role support - channel 177 support - MediaTek WiFi (mt76): - per-PHY LED support - mt7996: EHT (Wi-Fi 7) support - Wireless Ethernet Dispatch (WED) reset support - switch to using page pool allocator - RealTek WiFi (rtw89): - support new version of Bluetooth co-existance - Mobile: - rmnet: support TX aggregation" * tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1872 commits) page_pool: add a comment explaining the fragment counter usage net: ethtool: fix __ethtool_dev_mm_supported() implementation ethtool: pse-pd: Fix double word in comments xsk: add linux/vmalloc.h to xsk.c sefltests: netdevsim: wait for devlink instance after netns removal selftest: fib_tests: Always cleanup before exit net/mlx5e: Align IPsec ASO result memory to be as required by hardware net/mlx5e: TC, Set CT miss to the specific ct action instance net/mlx5e: Rename CHAIN_TO_REG to MAPPED_OBJ_TO_REG net/mlx5: Refactor tc miss handling to a single function net/mlx5: Kconfig: Make tc offload depend on tc skb extension net/sched: flower: Support hardware miss to tc action net/sched: flower: Move filter handle initialization earlier net/sched: cls_api: Support hardware miss to tc action net/sched: Rename user cookie and act cookie sfc: fix builds without CONFIG_RTC_LIB sfc: clean up some inconsistent indentings net/mlx4_en: Introduce flexible array to silence overflow warning net: lan966x: Fix possible deadlock inside PTP net/ulp: Remove redundant ->clone() test in inet_clone_ulp(). ... --- drivers/i3c/master/mipi-i3c-hci/cmd_v1.c | 378 +++++++++++++++++++++++++++++++ 1 file changed, 378 insertions(+) create mode 100644 drivers/i3c/master/mipi-i3c-hci/cmd_v1.c (limited to 'drivers/i3c/master/mipi-i3c-hci/cmd_v1.c') diff --git a/drivers/i3c/master/mipi-i3c-hci/cmd_v1.c b/drivers/i3c/master/mipi-i3c-hci/cmd_v1.c new file mode 100644 index 000000000..d97c3175e --- /dev/null +++ b/drivers/i3c/master/mipi-i3c-hci/cmd_v1.c @@ -0,0 +1,378 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2020, MIPI Alliance, Inc. + * + * Author: Nicolas Pitre + * + * I3C HCI v1.0/v1.1 Command Descriptor Handling + */ + +#include +#include + +#include "hci.h" +#include "cmd.h" +#include "dat.h" +#include "dct.h" + + +/* + * Address Assignment Command + */ + +#define CMD_0_ATTR_A FIELD_PREP(CMD_0_ATTR, 0x2) + +#define CMD_A0_TOC W0_BIT_(31) +#define CMD_A0_ROC W0_BIT_(30) +#define CMD_A0_DEV_COUNT(v) FIELD_PREP(W0_MASK(29, 26), v) +#define CMD_A0_DEV_INDEX(v) FIELD_PREP(W0_MASK(20, 16), v) +#define CMD_A0_CMD(v) FIELD_PREP(W0_MASK(14, 7), v) +#define CMD_A0_TID(v) FIELD_PREP(W0_MASK( 6, 3), v) + +/* + * Immediate Data Transfer Command + */ + +#define CMD_0_ATTR_I FIELD_PREP(CMD_0_ATTR, 0x1) + +#define CMD_I1_DATA_BYTE_4(v) FIELD_PREP(W1_MASK(63, 56), v) +#define CMD_I1_DATA_BYTE_3(v) FIELD_PREP(W1_MASK(55, 48), v) +#define CMD_I1_DATA_BYTE_2(v) FIELD_PREP(W1_MASK(47, 40), v) +#define CMD_I1_DATA_BYTE_1(v) FIELD_PREP(W1_MASK(39, 32), v) +#define CMD_I1_DEF_BYTE(v) FIELD_PREP(W1_MASK(39, 32), v) +#define CMD_I0_TOC W0_BIT_(31) +#define CMD_I0_ROC W0_BIT_(30) +#define CMD_I0_RNW W0_BIT_(29) +#define CMD_I0_MODE(v) FIELD_PREP(W0_MASK(28, 26), v) +#define CMD_I0_DTT(v) FIELD_PREP(W0_MASK(25, 23), v) +#define CMD_I0_DEV_INDEX(v) FIELD_PREP(W0_MASK(20, 16), v) +#define CMD_I0_CP W0_BIT_(15) +#define CMD_I0_CMD(v) FIELD_PREP(W0_MASK(14, 7), v) +#define CMD_I0_TID(v) FIELD_PREP(W0_MASK( 6, 3), v) + +/* + * Regular Data Transfer Command + */ + +#define CMD_0_ATTR_R FIELD_PREP(CMD_0_ATTR, 0x0) + +#define CMD_R1_DATA_LENGTH(v) FIELD_PREP(W1_MASK(63, 48), v) +#define CMD_R1_DEF_BYTE(v) FIELD_PREP(W1_MASK(39, 32), v) +#define CMD_R0_TOC W0_BIT_(31) +#define CMD_R0_ROC W0_BIT_(30) +#define CMD_R0_RNW W0_BIT_(29) +#define CMD_R0_MODE(v) FIELD_PREP(W0_MASK(28, 26), v) +#define CMD_R0_DBP W0_BIT_(25) +#define CMD_R0_DEV_INDEX(v) FIELD_PREP(W0_MASK(20, 16), v) +#define CMD_R0_CP W0_BIT_(15) +#define CMD_R0_CMD(v) FIELD_PREP(W0_MASK(14, 7), v) +#define CMD_R0_TID(v) FIELD_PREP(W0_MASK( 6, 3), v) + +/* + * Combo Transfer (Write + Write/Read) Command + */ + +#define CMD_0_ATTR_C FIELD_PREP(CMD_0_ATTR, 0x3) + +#define CMD_C1_DATA_LENGTH(v) FIELD_PREP(W1_MASK(63, 48), v) +#define CMD_C1_OFFSET(v) FIELD_PREP(W1_MASK(47, 32), v) +#define CMD_C0_TOC W0_BIT_(31) +#define CMD_C0_ROC W0_BIT_(30) +#define CMD_C0_RNW W0_BIT_(29) +#define CMD_C0_MODE(v) FIELD_PREP(W0_MASK(28, 26), v) +#define CMD_C0_16_BIT_SUBOFFSET W0_BIT_(25) +#define CMD_C0_FIRST_PHASE_MODE W0_BIT_(24) +#define CMD_C0_DATA_LENGTH_POSITION(v) FIELD_PREP(W0_MASK(23, 22), v) +#define CMD_C0_DEV_INDEX(v) FIELD_PREP(W0_MASK(20, 16), v) +#define CMD_C0_CP W0_BIT_(15) +#define CMD_C0_CMD(v) FIELD_PREP(W0_MASK(14, 7), v) +#define CMD_C0_TID(v) FIELD_PREP(W0_MASK( 6, 3), v) + +/* + * Internal Control Command + */ + +#define CMD_0_ATTR_M FIELD_PREP(CMD_0_ATTR, 0x7) + +#define CMD_M1_VENDOR_SPECIFIC W1_MASK(63, 32) +#define CMD_M0_MIPI_RESERVED W0_MASK(31, 12) +#define CMD_M0_MIPI_CMD W0_MASK(11, 8) +#define CMD_M0_VENDOR_INFO_PRESENT W0_BIT_( 7) +#define CMD_M0_TID(v) FIELD_PREP(W0_MASK( 6, 3), v) + + +/* Data Transfer Speed and Mode */ +enum hci_cmd_mode { + MODE_I3C_SDR0 = 0x0, + MODE_I3C_SDR1 = 0x1, + MODE_I3C_SDR2 = 0x2, + MODE_I3C_SDR3 = 0x3, + MODE_I3C_SDR4 = 0x4, + MODE_I3C_HDR_TSx = 0x5, + MODE_I3C_HDR_DDR = 0x6, + MODE_I3C_HDR_BT = 0x7, + MODE_I3C_Fm_FmP = 0x8, + MODE_I2C_Fm = 0x0, + MODE_I2C_FmP = 0x1, + MODE_I2C_UD1 = 0x2, + MODE_I2C_UD2 = 0x3, + MODE_I2C_UD3 = 0x4, +}; + +static enum hci_cmd_mode get_i3c_mode(struct i3c_hci *hci) +{ + struct i3c_bus *bus = i3c_master_get_bus(&hci->master); + + if (bus->scl_rate.i3c >= 12500000) + return MODE_I3C_SDR0; + if (bus->scl_rate.i3c > 8000000) + return MODE_I3C_SDR1; + if (bus->scl_rate.i3c > 6000000) + return MODE_I3C_SDR2; + if (bus->scl_rate.i3c > 4000000) + return MODE_I3C_SDR3; + if (bus->scl_rate.i3c > 2000000) + return MODE_I3C_SDR4; + return MODE_I3C_Fm_FmP; +} + +static enum hci_cmd_mode get_i2c_mode(struct i3c_hci *hci) +{ + struct i3c_bus *bus = i3c_master_get_bus(&hci->master); + + if (bus->scl_rate.i2c >= 1000000) + return MODE_I2C_FmP; + return MODE_I2C_Fm; +} + +static void fill_data_bytes(struct hci_xfer *xfer, u8 *data, + unsigned int data_len) +{ + xfer->cmd_desc[1] = 0; + switch (data_len) { + case 4: + xfer->cmd_desc[1] |= CMD_I1_DATA_BYTE_4(data[3]); + fallthrough; + case 3: + xfer->cmd_desc[1] |= CMD_I1_DATA_BYTE_3(data[2]); + fallthrough; + case 2: + xfer->cmd_desc[1] |= CMD_I1_DATA_BYTE_2(data[1]); + fallthrough; + case 1: + xfer->cmd_desc[1] |= CMD_I1_DATA_BYTE_1(data[0]); + fallthrough; + case 0: + break; + } + /* we consumed all the data with the cmd descriptor */ + xfer->data = NULL; +} + +static int hci_cmd_v1_prep_ccc(struct i3c_hci *hci, + struct hci_xfer *xfer, + u8 ccc_addr, u8 ccc_cmd, bool raw) +{ + unsigned int dat_idx = 0; + enum hci_cmd_mode mode = get_i3c_mode(hci); + u8 *data = xfer->data; + unsigned int data_len = xfer->data_len; + bool rnw = xfer->rnw; + int ret; + + /* this should never happen */ + if (WARN_ON(raw)) + return -EINVAL; + + if (ccc_addr != I3C_BROADCAST_ADDR) { + ret = mipi_i3c_hci_dat_v1.get_index(hci, ccc_addr); + if (ret < 0) + return ret; + dat_idx = ret; + } + + xfer->cmd_tid = hci_get_tid(); + + if (!rnw && data_len <= 4) { + /* we use an Immediate Data Transfer Command */ + xfer->cmd_desc[0] = + CMD_0_ATTR_I | + CMD_I0_TID(xfer->cmd_tid) | + CMD_I0_CMD(ccc_cmd) | CMD_I0_CP | + CMD_I0_DEV_INDEX(dat_idx) | + CMD_I0_DTT(data_len) | + CMD_I0_MODE(mode); + fill_data_bytes(xfer, data, data_len); + } else { + /* we use a Regular Data Transfer Command */ + xfer->cmd_desc[0] = + CMD_0_ATTR_R | + CMD_R0_TID(xfer->cmd_tid) | + CMD_R0_CMD(ccc_cmd) | CMD_R0_CP | + CMD_R0_DEV_INDEX(dat_idx) | + CMD_R0_MODE(mode) | + (rnw ? CMD_R0_RNW : 0); + xfer->cmd_desc[1] = + CMD_R1_DATA_LENGTH(data_len); + } + + return 0; +} + +static void hci_cmd_v1_prep_i3c_xfer(struct i3c_hci *hci, + struct i3c_dev_desc *dev, + struct hci_xfer *xfer) +{ + struct i3c_hci_dev_data *dev_data = i3c_dev_get_master_data(dev); + unsigned int dat_idx = dev_data->dat_idx; + enum hci_cmd_mode mode = get_i3c_mode(hci); + u8 *data = xfer->data; + unsigned int data_len = xfer->data_len; + bool rnw = xfer->rnw; + + xfer->cmd_tid = hci_get_tid(); + + if (!rnw && data_len <= 4) { + /* we use an Immediate Data Transfer Command */ + xfer->cmd_desc[0] = + CMD_0_ATTR_I | + CMD_I0_TID(xfer->cmd_tid) | + CMD_I0_DEV_INDEX(dat_idx) | + CMD_I0_DTT(data_len) | + CMD_I0_MODE(mode); + fill_data_bytes(xfer, data, data_len); + } else { + /* we use a Regular Data Transfer Command */ + xfer->cmd_desc[0] = + CMD_0_ATTR_R | + CMD_R0_TID(xfer->cmd_tid) | + CMD_R0_DEV_INDEX(dat_idx) | + CMD_R0_MODE(mode) | + (rnw ? CMD_R0_RNW : 0); + xfer->cmd_desc[1] = + CMD_R1_DATA_LENGTH(data_len); + } +} + +static void hci_cmd_v1_prep_i2c_xfer(struct i3c_hci *hci, + struct i2c_dev_desc *dev, + struct hci_xfer *xfer) +{ + struct i3c_hci_dev_data *dev_data = i2c_dev_get_master_data(dev); + unsigned int dat_idx = dev_data->dat_idx; + enum hci_cmd_mode mode = get_i2c_mode(hci); + u8 *data = xfer->data; + unsigned int data_len = xfer->data_len; + bool rnw = xfer->rnw; + + xfer->cmd_tid = hci_get_tid(); + + if (!rnw && data_len <= 4) { + /* we use an Immediate Data Transfer Command */ + xfer->cmd_desc[0] = + CMD_0_ATTR_I | + CMD_I0_TID(xfer->cmd_tid) | + CMD_I0_DEV_INDEX(dat_idx) | + CMD_I0_DTT(data_len) | + CMD_I0_MODE(mode); + fill_data_bytes(xfer, data, data_len); + } else { + /* we use a Regular Data Transfer Command */ + xfer->cmd_desc[0] = + CMD_0_ATTR_R | + CMD_R0_TID(xfer->cmd_tid) | + CMD_R0_DEV_INDEX(dat_idx) | + CMD_R0_MODE(mode) | + (rnw ? CMD_R0_RNW : 0); + xfer->cmd_desc[1] = + CMD_R1_DATA_LENGTH(data_len); + } +} + +static int hci_cmd_v1_daa(struct i3c_hci *hci) +{ + struct hci_xfer *xfer; + int ret, dat_idx = -1; + u8 next_addr = 0; + u64 pid; + unsigned int dcr, bcr; + DECLARE_COMPLETION_ONSTACK(done); + + xfer = hci_alloc_xfer(2); + if (!xfer) + return -ENOMEM; + + /* + * Simple for now: we allocate a temporary DAT entry, do a single + * DAA, register the device which will allocate its own DAT entry + * via the core callback, then free the temporary DAT entry. + * Loop until there is no more devices to assign an address to. + * Yes, there is room for improvements. + */ + for (;;) { + ret = mipi_i3c_hci_dat_v1.alloc_entry(hci); + if (ret < 0) + break; + dat_idx = ret; + ret = i3c_master_get_free_addr(&hci->master, next_addr); + if (ret < 0) + break; + next_addr = ret; + + DBG("next_addr = 0x%02x, DAA using DAT %d", next_addr, dat_idx); + mipi_i3c_hci_dat_v1.set_dynamic_addr(hci, dat_idx, next_addr); + mipi_i3c_hci_dct_index_reset(hci); + + xfer->cmd_tid = hci_get_tid(); + xfer->cmd_desc[0] = + CMD_0_ATTR_A | + CMD_A0_TID(xfer->cmd_tid) | + CMD_A0_CMD(I3C_CCC_ENTDAA) | + CMD_A0_DEV_INDEX(dat_idx) | + CMD_A0_DEV_COUNT(1) | + CMD_A0_ROC | CMD_A0_TOC; + xfer->cmd_desc[1] = 0; + hci->io->queue_xfer(hci, xfer, 1); + if (!wait_for_completion_timeout(&done, HZ) && + hci->io->dequeue_xfer(hci, xfer, 1)) { + ret = -ETIME; + break; + } + if (RESP_STATUS(xfer[0].response) == RESP_ERR_NACK && + RESP_STATUS(xfer[0].response) == 1) { + ret = 0; /* no more devices to be assigned */ + break; + } + if (RESP_STATUS(xfer[0].response) != RESP_SUCCESS) { + ret = -EIO; + break; + } + + i3c_hci_dct_get_val(hci, 0, &pid, &dcr, &bcr); + DBG("assigned address %#x to device PID=0x%llx DCR=%#x BCR=%#x", + next_addr, pid, dcr, bcr); + + mipi_i3c_hci_dat_v1.free_entry(hci, dat_idx); + dat_idx = -1; + + /* + * TODO: Extend the subsystem layer to allow for registering + * new device and provide BCR/DCR/PID at the same time. + */ + ret = i3c_master_add_i3c_dev_locked(&hci->master, next_addr); + if (ret) + break; + } + + if (dat_idx >= 0) + mipi_i3c_hci_dat_v1.free_entry(hci, dat_idx); + hci_free_xfer(xfer, 1); + return ret; +} + +const struct hci_cmd_ops mipi_i3c_hci_cmd_v1 = { + .prep_ccc = hci_cmd_v1_prep_ccc, + .prep_i3c_xfer = hci_cmd_v1_prep_i3c_xfer, + .prep_i2c_xfer = hci_cmd_v1_prep_i2c_xfer, + .perform_daa = hci_cmd_v1_daa, +}; -- cgit v1.2.3