From 5b7c4cabbb65f5c469464da6c5f614cbd7f730f2 Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Tue, 21 Feb 2023 18:24:12 -0800 Subject: Merge tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next Pull networking updates from Jakub Kicinski: "Core: - Add dedicated kmem_cache for typical/small skb->head, avoid having to access struct page at kfree time, and improve memory use. - Introduce sysctl to set default RPS configuration for new netdevs. - Define Netlink protocol specification format which can be used to describe messages used by each family and auto-generate parsers. Add tools for generating kernel data structures and uAPI headers. - Expose all net/core sysctls inside netns. - Remove 4s sleep in netpoll if carrier is instantly detected on boot. - Add configurable limit of MDB entries per port, and port-vlan. - Continue populating drop reasons throughout the stack. - Retire a handful of legacy Qdiscs and classifiers. Protocols: - Support IPv4 big TCP (TSO frames larger than 64kB). - Add IP_LOCAL_PORT_RANGE socket option, to control local port range on socket by socket basis. - Track and report in procfs number of MPTCP sockets used. - Support mixing IPv4 and IPv6 flows in the in-kernel MPTCP path manager. - IPv6: don't check net.ipv6.route.max_size and rely on garbage collection to free memory (similarly to IPv4). - Support Penultimate Segment Pop (PSP) flavor in SRv6 (RFC8986). - ICMP: add per-rate limit counters. - Add support for user scanning requests in ieee802154. - Remove static WEP support. - Support minimal Wi-Fi 7 Extremely High Throughput (EHT) rate reporting. - WiFi 7 EHT channel puncturing support (client & AP). BPF: - Add a rbtree data structure following the "next-gen data structure" precedent set by recently added linked list, that is, by using kfunc + kptr instead of adding a new BPF map type. - Expose XDP hints via kfuncs with initial support for RX hash and timestamp metadata. - Add BPF_F_NO_TUNNEL_KEY extension to bpf_skb_set_tunnel_key to better support decap on GRE tunnel devices not operating in collect metadata. - Improve x86 JIT's codegen for PROBE_MEM runtime error checks. - Remove the need for trace_printk_lock for bpf_trace_printk and bpf_trace_vprintk helpers. - Extend libbpf's bpf_tracing.h support for tracing arguments of kprobes/uprobes and syscall as a special case. - Significantly reduce the search time for module symbols by livepatch and BPF. - Enable cpumasks to be used as kptrs, which is useful for tracing programs tracking which tasks end up running on which CPUs in different time intervals. - Add support for BPF trampoline on s390x and riscv64. - Add capability to export the XDP features supported by the NIC. - Add __bpf_kfunc tag for marking kernel functions as kfuncs. - Add cgroup.memory=nobpf kernel parameter option to disable BPF memory accounting for container environments. Netfilter: - Remove the CLUSTERIP target. It has been marked as obsolete for years, and we still have WARN splats wrt races of the out-of-band /proc interface installed by this target. - Add 'destroy' commands to nf_tables. They are identical to the existing 'delete' commands, but do not return an error if the referenced object (set, chain, rule...) did not exist. Driver API: - Improve cpumask_local_spread() locality to help NICs set the right IRQ affinity on AMD platforms. - Separate C22 and C45 MDIO bus transactions more clearly. - Introduce new DCB table to control DSCP rewrite on egress. - Support configuration of Physical Layer Collision Avoidance (PLCA) Reconciliation Sublayer (RS) (802.3cg-2019). Modern version of shared medium Ethernet. - Support for MAC Merge layer (IEEE 802.3-2018 clause 99). Allowing preemption of low priority frames by high priority frames. - Add support for controlling MACSec offload using netlink SET. - Rework devlink instance refcounts to allow registration and de-registration under the instance lock. Split the code into multiple files, drop some of the unnecessarily granular locks and factor out common parts of netlink operation handling. - Add TX frame aggregation parameters (for USB drivers). - Add a new attr TCA_EXT_WARN_MSG to report TC (offload) warning messages with notifications for debug. - Allow offloading of UDP NEW connections via act_ct. - Add support for per action HW stats in TC. - Support hardware miss to TC action (continue processing in SW from a specific point in the action chain). - Warn if old Wireless Extension user space interface is used with modern cfg80211/mac80211 drivers. Do not support Wireless Extensions for Wi-Fi 7 devices at all. Everyone should switch to using nl80211 interface instead. - Improve the CAN bit timing configuration. Use extack to return error messages directly to user space, update the SJW handling, including the definition of a new default value that will benefit CAN-FD controllers, by increasing their oscillator tolerance. New hardware / drivers: - Ethernet: - nVidia BlueField-3 support (control traffic driver) - Ethernet support for imx93 SoCs - Motorcomm yt8531 gigabit Ethernet PHY - onsemi NCN26000 10BASE-T1S PHY (with support for PLCA) - Microchip LAN8841 PHY (incl. cable diagnostics and PTP) - Amlogic gxl MDIO mux - WiFi: - RealTek RTL8188EU (rtl8xxxu) - Qualcomm Wi-Fi 7 devices (ath12k) - CAN: - Renesas R-Car V4H Drivers: - Bluetooth: - Set Per Platform Antenna Gain (PPAG) for Intel controllers. - Ethernet NICs: - Intel (1G, igc): - support TSN / Qbv / packet scheduling features of i226 model - Intel (100G, ice): - use GNSS subsystem instead of TTY - multi-buffer XDP support - extend support for GPIO pins to E823 devices - nVidia/Mellanox: - update the shared buffer configuration on PFC commands - implement PTP adjphase function for HW offset control - TC support for Geneve and GRE with VF tunnel offload - more efficient crypto key management method - multi-port eswitch support - Netronome/Corigine: - add DCB IEEE support - support IPsec offloading for NFP3800 - Freescale/NXP (enetc): - support XDP_REDIRECT for XDP non-linear buffers - improve reconfig, avoid link flap and waiting for idle - support MAC Merge layer - Other NICs: - sfc/ef100: add basic devlink support for ef100 - ionic: rx_push mode operation (writing descriptors via MMIO) - bnxt: use the auxiliary bus abstraction for RDMA - r8169: disable ASPM and reset bus in case of tx timeout - cpsw: support QSGMII mode for J721e CPSW9G - cpts: support pulse-per-second output - ngbe: add an mdio bus driver - usbnet: optimize usbnet_bh() by avoiding unnecessary queuing - r8152: handle devices with FW with NCM support - amd-xgbe: support 10Mbps, 2.5GbE speeds and rx-adaptation - virtio-net: support multi buffer XDP - virtio/vsock: replace virtio_vsock_pkt with sk_buff - tsnep: XDP support - Ethernet high-speed switches: - nVidia/Mellanox (mlxsw): - add support for latency TLV (in FW control messages) - Microchip (sparx5): - separate explicit and implicit traffic forwarding rules, make the implicit rules always active - add support for egress DSCP rewrite - IS0 VCAP support (Ingress Classification) - IS2 VCAP filters (protos, L3 addrs, L4 ports, flags, ToS etc.) - ES2 VCAP support (Egress Access Control) - support for Per-Stream Filtering and Policing (802.1Q, 8.6.5.1) - Ethernet embedded switches: - Marvell (mv88e6xxx): - add MAB (port auth) offload support - enable PTP receive for mv88e6390 - NXP (ocelot): - support MAC Merge layer - support for the the vsc7512 internal copper phys - Microchip: - lan9303: convert to PHYLINK - lan966x: support TC flower filter statistics - lan937x: PTP support for KSZ9563/KSZ8563 and LAN937x - lan937x: support Credit Based Shaper configuration - ksz9477: support Energy Efficient Ethernet - other: - qca8k: convert to regmap read/write API, use bulk operations - rswitch: Improve TX timestamp accuracy - Intel WiFi (iwlwifi): - EHT (Wi-Fi 7) rate reporting - STEP equalizer support: transfer some STEP (connection to radio on platforms with integrated wifi) related parameters from the BIOS to the firmware. - Qualcomm 802.11ax WiFi (ath11k): - IPQ5018 support - Fine Timing Measurement (FTM) responder role support - channel 177 support - MediaTek WiFi (mt76): - per-PHY LED support - mt7996: EHT (Wi-Fi 7) support - Wireless Ethernet Dispatch (WED) reset support - switch to using page pool allocator - RealTek WiFi (rtw89): - support new version of Bluetooth co-existance - Mobile: - rmnet: support TX aggregation" * tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1872 commits) page_pool: add a comment explaining the fragment counter usage net: ethtool: fix __ethtool_dev_mm_supported() implementation ethtool: pse-pd: Fix double word in comments xsk: add linux/vmalloc.h to xsk.c sefltests: netdevsim: wait for devlink instance after netns removal selftest: fib_tests: Always cleanup before exit net/mlx5e: Align IPsec ASO result memory to be as required by hardware net/mlx5e: TC, Set CT miss to the specific ct action instance net/mlx5e: Rename CHAIN_TO_REG to MAPPED_OBJ_TO_REG net/mlx5: Refactor tc miss handling to a single function net/mlx5: Kconfig: Make tc offload depend on tc skb extension net/sched: flower: Support hardware miss to tc action net/sched: flower: Move filter handle initialization earlier net/sched: cls_api: Support hardware miss to tc action net/sched: Rename user cookie and act cookie sfc: fix builds without CONFIG_RTC_LIB sfc: clean up some inconsistent indentings net/mlx4_en: Introduce flexible array to silence overflow warning net: lan966x: Fix possible deadlock inside PTP net/ulp: Remove redundant ->clone() test in inet_clone_ulp(). ... --- drivers/i3c/master/mipi-i3c-hci/ext_caps.c | 308 +++++++++++++++++++++++++++++ 1 file changed, 308 insertions(+) create mode 100644 drivers/i3c/master/mipi-i3c-hci/ext_caps.c (limited to 'drivers/i3c/master/mipi-i3c-hci/ext_caps.c') diff --git a/drivers/i3c/master/mipi-i3c-hci/ext_caps.c b/drivers/i3c/master/mipi-i3c-hci/ext_caps.c new file mode 100644 index 000000000..2e9b23efd --- /dev/null +++ b/drivers/i3c/master/mipi-i3c-hci/ext_caps.c @@ -0,0 +1,308 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2020, MIPI Alliance, Inc. + * + * Author: Nicolas Pitre + */ + +#include +#include +#include +#include +#include +#include + +#include "hci.h" +#include "ext_caps.h" +#include "xfer_mode_rate.h" + + +/* Extended Capability Header */ +#define CAP_HEADER_LENGTH GENMASK(23, 8) +#define CAP_HEADER_ID GENMASK(7, 0) + +static int hci_extcap_hardware_id(struct i3c_hci *hci, void __iomem *base) +{ + hci->vendor_mipi_id = readl(base + 0x04); + hci->vendor_version_id = readl(base + 0x08); + hci->vendor_product_id = readl(base + 0x0c); + + dev_info(&hci->master.dev, "vendor MIPI ID: %#x\n", hci->vendor_mipi_id); + dev_info(&hci->master.dev, "vendor version ID: %#x\n", hci->vendor_version_id); + dev_info(&hci->master.dev, "vendor product ID: %#x\n", hci->vendor_product_id); + + /* ought to go in a table if this grows too much */ + switch (hci->vendor_mipi_id) { + case MIPI_VENDOR_NXP: + hci->quirks |= HCI_QUIRK_RAW_CCC; + DBG("raw CCC quirks set"); + break; + } + + return 0; +} + +static int hci_extcap_master_config(struct i3c_hci *hci, void __iomem *base) +{ + u32 master_config = readl(base + 0x04); + unsigned int operation_mode = FIELD_GET(GENMASK(5, 4), master_config); + static const char * const functionality[] = { + "(unknown)", "master only", "target only", + "primary/secondary master" }; + dev_info(&hci->master.dev, "operation mode: %s\n", functionality[operation_mode]); + if (operation_mode & 0x1) + return 0; + dev_err(&hci->master.dev, "only master mode is currently supported\n"); + return -EOPNOTSUPP; +} + +static int hci_extcap_multi_bus(struct i3c_hci *hci, void __iomem *base) +{ + u32 bus_instance = readl(base + 0x04); + unsigned int count = FIELD_GET(GENMASK(3, 0), bus_instance); + + dev_info(&hci->master.dev, "%d bus instances\n", count); + return 0; +} + +static int hci_extcap_xfer_modes(struct i3c_hci *hci, void __iomem *base) +{ + u32 header = readl(base); + u32 entries = FIELD_GET(CAP_HEADER_LENGTH, header) - 1; + unsigned int index; + + dev_info(&hci->master.dev, "transfer mode table has %d entries\n", + entries); + base += 4; /* skip header */ + for (index = 0; index < entries; index++) { + u32 mode_entry = readl(base); + + DBG("mode %d: 0x%08x", index, mode_entry); + /* TODO: will be needed when I3C core does more than SDR */ + base += 4; + } + + return 0; +} + +static int hci_extcap_xfer_rates(struct i3c_hci *hci, void __iomem *base) +{ + u32 header = readl(base); + u32 entries = FIELD_GET(CAP_HEADER_LENGTH, header) - 1; + u32 rate_entry; + unsigned int index, rate, rate_id, mode_id; + + base += 4; /* skip header */ + + dev_info(&hci->master.dev, "available data rates:\n"); + for (index = 0; index < entries; index++) { + rate_entry = readl(base); + DBG("entry %d: 0x%08x", index, rate_entry); + rate = FIELD_GET(XFERRATE_ACTUAL_RATE_KHZ, rate_entry); + rate_id = FIELD_GET(XFERRATE_RATE_ID, rate_entry); + mode_id = FIELD_GET(XFERRATE_MODE_ID, rate_entry); + dev_info(&hci->master.dev, "rate %d for %s = %d kHz\n", + rate_id, + mode_id == XFERRATE_MODE_I3C ? "I3C" : + mode_id == XFERRATE_MODE_I2C ? "I2C" : + "unknown mode", + rate); + base += 4; + } + + return 0; +} + +static int hci_extcap_auto_command(struct i3c_hci *hci, void __iomem *base) +{ + u32 autocmd_ext_caps = readl(base + 0x04); + unsigned int max_count = FIELD_GET(GENMASK(3, 0), autocmd_ext_caps); + u32 autocmd_ext_config = readl(base + 0x08); + unsigned int count = FIELD_GET(GENMASK(3, 0), autocmd_ext_config); + + dev_info(&hci->master.dev, "%d/%d active auto-command entries\n", + count, max_count); + /* remember auto-command register location for later use */ + hci->AUTOCMD_regs = base; + return 0; +} + +static int hci_extcap_debug(struct i3c_hci *hci, void __iomem *base) +{ + dev_info(&hci->master.dev, "debug registers present\n"); + hci->DEBUG_regs = base; + return 0; +} + +static int hci_extcap_scheduled_cmd(struct i3c_hci *hci, void __iomem *base) +{ + dev_info(&hci->master.dev, "scheduled commands available\n"); + /* hci->schedcmd_regs = base; */ + return 0; +} + +static int hci_extcap_non_curr_master(struct i3c_hci *hci, void __iomem *base) +{ + dev_info(&hci->master.dev, "Non-Current Master support available\n"); + /* hci->NCM_regs = base; */ + return 0; +} + +static int hci_extcap_ccc_resp_conf(struct i3c_hci *hci, void __iomem *base) +{ + dev_info(&hci->master.dev, "CCC Response Configuration available\n"); + return 0; +} + +static int hci_extcap_global_DAT(struct i3c_hci *hci, void __iomem *base) +{ + dev_info(&hci->master.dev, "Global DAT available\n"); + return 0; +} + +static int hci_extcap_multilane(struct i3c_hci *hci, void __iomem *base) +{ + dev_info(&hci->master.dev, "Master Multi-Lane support available\n"); + return 0; +} + +static int hci_extcap_ncm_multilane(struct i3c_hci *hci, void __iomem *base) +{ + dev_info(&hci->master.dev, "NCM Multi-Lane support available\n"); + return 0; +} + +struct hci_ext_caps { + u8 id; + u16 min_length; + int (*parser)(struct i3c_hci *hci, void __iomem *base); +}; + +#define EXT_CAP(_id, _highest_mandatory_reg_offset, _parser) \ + { .id = (_id), .parser = (_parser), \ + .min_length = (_highest_mandatory_reg_offset)/4 + 1 } + +static const struct hci_ext_caps ext_capabilities[] = { + EXT_CAP(0x01, 0x0c, hci_extcap_hardware_id), + EXT_CAP(0x02, 0x04, hci_extcap_master_config), + EXT_CAP(0x03, 0x04, hci_extcap_multi_bus), + EXT_CAP(0x04, 0x24, hci_extcap_xfer_modes), + EXT_CAP(0x05, 0x08, hci_extcap_auto_command), + EXT_CAP(0x08, 0x40, hci_extcap_xfer_rates), + EXT_CAP(0x0c, 0x10, hci_extcap_debug), + EXT_CAP(0x0d, 0x0c, hci_extcap_scheduled_cmd), + EXT_CAP(0x0e, 0x80, hci_extcap_non_curr_master), /* TODO confirm size */ + EXT_CAP(0x0f, 0x04, hci_extcap_ccc_resp_conf), + EXT_CAP(0x10, 0x08, hci_extcap_global_DAT), + EXT_CAP(0x9d, 0x04, hci_extcap_multilane), + EXT_CAP(0x9e, 0x04, hci_extcap_ncm_multilane), +}; + +static int hci_extcap_vendor_NXP(struct i3c_hci *hci, void __iomem *base) +{ + hci->vendor_data = (__force void *)base; + dev_info(&hci->master.dev, "Build Date Info = %#x\n", readl(base + 1*4)); + /* reset the FPGA */ + writel(0xdeadbeef, base + 1*4); + return 0; +} + +struct hci_ext_cap_vendor_specific { + u32 vendor; + u8 cap; + u16 min_length; + int (*parser)(struct i3c_hci *hci, void __iomem *base); +}; + +#define EXT_CAP_VENDOR(_vendor, _cap, _highest_mandatory_reg_offset) \ + { .vendor = (MIPI_VENDOR_##_vendor), .cap = (_cap), \ + .parser = (hci_extcap_vendor_##_vendor), \ + .min_length = (_highest_mandatory_reg_offset)/4 + 1 } + +static const struct hci_ext_cap_vendor_specific vendor_ext_caps[] = { + EXT_CAP_VENDOR(NXP, 0xc0, 0x20), +}; + +static int hci_extcap_vendor_specific(struct i3c_hci *hci, void __iomem *base, + u32 cap_id, u32 cap_length) +{ + const struct hci_ext_cap_vendor_specific *vendor_cap_entry; + int i; + + vendor_cap_entry = NULL; + for (i = 0; i < ARRAY_SIZE(vendor_ext_caps); i++) { + if (vendor_ext_caps[i].vendor == hci->vendor_mipi_id && + vendor_ext_caps[i].cap == cap_id) { + vendor_cap_entry = &vendor_ext_caps[i]; + break; + } + } + + if (!vendor_cap_entry) { + dev_notice(&hci->master.dev, + "unknown ext_cap 0x%02x for vendor 0x%02x\n", + cap_id, hci->vendor_mipi_id); + return 0; + } + if (cap_length < vendor_cap_entry->min_length) { + dev_err(&hci->master.dev, + "ext_cap 0x%02x has size %d (expecting >= %d)\n", + cap_id, cap_length, vendor_cap_entry->min_length); + return -EINVAL; + } + return vendor_cap_entry->parser(hci, base); +} + +int i3c_hci_parse_ext_caps(struct i3c_hci *hci) +{ + void __iomem *curr_cap = hci->EXTCAPS_regs; + void __iomem *end = curr_cap + 0x1000; /* some arbitrary limit */ + u32 cap_header, cap_id, cap_length; + const struct hci_ext_caps *cap_entry; + int i, err = 0; + + if (!curr_cap) + return 0; + + for (; !err && curr_cap < end; curr_cap += cap_length * 4) { + cap_header = readl(curr_cap); + cap_id = FIELD_GET(CAP_HEADER_ID, cap_header); + cap_length = FIELD_GET(CAP_HEADER_LENGTH, cap_header); + DBG("id=0x%02x length=%d", cap_id, cap_length); + if (!cap_length) + break; + if (curr_cap + cap_length * 4 >= end) { + dev_err(&hci->master.dev, + "ext_cap 0x%02x has size %d (too big)\n", + cap_id, cap_length); + err = -EINVAL; + break; + } + + if (cap_id >= 0xc0 && cap_id <= 0xcf) { + err = hci_extcap_vendor_specific(hci, curr_cap, + cap_id, cap_length); + continue; + } + + cap_entry = NULL; + for (i = 0; i < ARRAY_SIZE(ext_capabilities); i++) { + if (ext_capabilities[i].id == cap_id) { + cap_entry = &ext_capabilities[i]; + break; + } + } + if (!cap_entry) { + dev_notice(&hci->master.dev, + "unknown ext_cap 0x%02x\n", cap_id); + } else if (cap_length < cap_entry->min_length) { + dev_err(&hci->master.dev, + "ext_cap 0x%02x has size %d (expecting >= %d)\n", + cap_id, cap_length, cap_entry->min_length); + err = -EINVAL; + } else { + err = cap_entry->parser(hci, curr_cap); + } + } + return err; +} -- cgit v1.2.3