From 5b7c4cabbb65f5c469464da6c5f614cbd7f730f2 Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Tue, 21 Feb 2023 18:24:12 -0800 Subject: Merge tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next Pull networking updates from Jakub Kicinski: "Core: - Add dedicated kmem_cache for typical/small skb->head, avoid having to access struct page at kfree time, and improve memory use. - Introduce sysctl to set default RPS configuration for new netdevs. - Define Netlink protocol specification format which can be used to describe messages used by each family and auto-generate parsers. Add tools for generating kernel data structures and uAPI headers. - Expose all net/core sysctls inside netns. - Remove 4s sleep in netpoll if carrier is instantly detected on boot. - Add configurable limit of MDB entries per port, and port-vlan. - Continue populating drop reasons throughout the stack. - Retire a handful of legacy Qdiscs and classifiers. Protocols: - Support IPv4 big TCP (TSO frames larger than 64kB). - Add IP_LOCAL_PORT_RANGE socket option, to control local port range on socket by socket basis. - Track and report in procfs number of MPTCP sockets used. - Support mixing IPv4 and IPv6 flows in the in-kernel MPTCP path manager. - IPv6: don't check net.ipv6.route.max_size and rely on garbage collection to free memory (similarly to IPv4). - Support Penultimate Segment Pop (PSP) flavor in SRv6 (RFC8986). - ICMP: add per-rate limit counters. - Add support for user scanning requests in ieee802154. - Remove static WEP support. - Support minimal Wi-Fi 7 Extremely High Throughput (EHT) rate reporting. - WiFi 7 EHT channel puncturing support (client & AP). BPF: - Add a rbtree data structure following the "next-gen data structure" precedent set by recently added linked list, that is, by using kfunc + kptr instead of adding a new BPF map type. - Expose XDP hints via kfuncs with initial support for RX hash and timestamp metadata. - Add BPF_F_NO_TUNNEL_KEY extension to bpf_skb_set_tunnel_key to better support decap on GRE tunnel devices not operating in collect metadata. - Improve x86 JIT's codegen for PROBE_MEM runtime error checks. - Remove the need for trace_printk_lock for bpf_trace_printk and bpf_trace_vprintk helpers. - Extend libbpf's bpf_tracing.h support for tracing arguments of kprobes/uprobes and syscall as a special case. - Significantly reduce the search time for module symbols by livepatch and BPF. - Enable cpumasks to be used as kptrs, which is useful for tracing programs tracking which tasks end up running on which CPUs in different time intervals. - Add support for BPF trampoline on s390x and riscv64. - Add capability to export the XDP features supported by the NIC. - Add __bpf_kfunc tag for marking kernel functions as kfuncs. - Add cgroup.memory=nobpf kernel parameter option to disable BPF memory accounting for container environments. Netfilter: - Remove the CLUSTERIP target. It has been marked as obsolete for years, and we still have WARN splats wrt races of the out-of-band /proc interface installed by this target. - Add 'destroy' commands to nf_tables. They are identical to the existing 'delete' commands, but do not return an error if the referenced object (set, chain, rule...) did not exist. Driver API: - Improve cpumask_local_spread() locality to help NICs set the right IRQ affinity on AMD platforms. - Separate C22 and C45 MDIO bus transactions more clearly. - Introduce new DCB table to control DSCP rewrite on egress. - Support configuration of Physical Layer Collision Avoidance (PLCA) Reconciliation Sublayer (RS) (802.3cg-2019). Modern version of shared medium Ethernet. - Support for MAC Merge layer (IEEE 802.3-2018 clause 99). Allowing preemption of low priority frames by high priority frames. - Add support for controlling MACSec offload using netlink SET. - Rework devlink instance refcounts to allow registration and de-registration under the instance lock. Split the code into multiple files, drop some of the unnecessarily granular locks and factor out common parts of netlink operation handling. - Add TX frame aggregation parameters (for USB drivers). - Add a new attr TCA_EXT_WARN_MSG to report TC (offload) warning messages with notifications for debug. - Allow offloading of UDP NEW connections via act_ct. - Add support for per action HW stats in TC. - Support hardware miss to TC action (continue processing in SW from a specific point in the action chain). - Warn if old Wireless Extension user space interface is used with modern cfg80211/mac80211 drivers. Do not support Wireless Extensions for Wi-Fi 7 devices at all. Everyone should switch to using nl80211 interface instead. - Improve the CAN bit timing configuration. Use extack to return error messages directly to user space, update the SJW handling, including the definition of a new default value that will benefit CAN-FD controllers, by increasing their oscillator tolerance. New hardware / drivers: - Ethernet: - nVidia BlueField-3 support (control traffic driver) - Ethernet support for imx93 SoCs - Motorcomm yt8531 gigabit Ethernet PHY - onsemi NCN26000 10BASE-T1S PHY (with support for PLCA) - Microchip LAN8841 PHY (incl. cable diagnostics and PTP) - Amlogic gxl MDIO mux - WiFi: - RealTek RTL8188EU (rtl8xxxu) - Qualcomm Wi-Fi 7 devices (ath12k) - CAN: - Renesas R-Car V4H Drivers: - Bluetooth: - Set Per Platform Antenna Gain (PPAG) for Intel controllers. - Ethernet NICs: - Intel (1G, igc): - support TSN / Qbv / packet scheduling features of i226 model - Intel (100G, ice): - use GNSS subsystem instead of TTY - multi-buffer XDP support - extend support for GPIO pins to E823 devices - nVidia/Mellanox: - update the shared buffer configuration on PFC commands - implement PTP adjphase function for HW offset control - TC support for Geneve and GRE with VF tunnel offload - more efficient crypto key management method - multi-port eswitch support - Netronome/Corigine: - add DCB IEEE support - support IPsec offloading for NFP3800 - Freescale/NXP (enetc): - support XDP_REDIRECT for XDP non-linear buffers - improve reconfig, avoid link flap and waiting for idle - support MAC Merge layer - Other NICs: - sfc/ef100: add basic devlink support for ef100 - ionic: rx_push mode operation (writing descriptors via MMIO) - bnxt: use the auxiliary bus abstraction for RDMA - r8169: disable ASPM and reset bus in case of tx timeout - cpsw: support QSGMII mode for J721e CPSW9G - cpts: support pulse-per-second output - ngbe: add an mdio bus driver - usbnet: optimize usbnet_bh() by avoiding unnecessary queuing - r8152: handle devices with FW with NCM support - amd-xgbe: support 10Mbps, 2.5GbE speeds and rx-adaptation - virtio-net: support multi buffer XDP - virtio/vsock: replace virtio_vsock_pkt with sk_buff - tsnep: XDP support - Ethernet high-speed switches: - nVidia/Mellanox (mlxsw): - add support for latency TLV (in FW control messages) - Microchip (sparx5): - separate explicit and implicit traffic forwarding rules, make the implicit rules always active - add support for egress DSCP rewrite - IS0 VCAP support (Ingress Classification) - IS2 VCAP filters (protos, L3 addrs, L4 ports, flags, ToS etc.) - ES2 VCAP support (Egress Access Control) - support for Per-Stream Filtering and Policing (802.1Q, 8.6.5.1) - Ethernet embedded switches: - Marvell (mv88e6xxx): - add MAB (port auth) offload support - enable PTP receive for mv88e6390 - NXP (ocelot): - support MAC Merge layer - support for the the vsc7512 internal copper phys - Microchip: - lan9303: convert to PHYLINK - lan966x: support TC flower filter statistics - lan937x: PTP support for KSZ9563/KSZ8563 and LAN937x - lan937x: support Credit Based Shaper configuration - ksz9477: support Energy Efficient Ethernet - other: - qca8k: convert to regmap read/write API, use bulk operations - rswitch: Improve TX timestamp accuracy - Intel WiFi (iwlwifi): - EHT (Wi-Fi 7) rate reporting - STEP equalizer support: transfer some STEP (connection to radio on platforms with integrated wifi) related parameters from the BIOS to the firmware. - Qualcomm 802.11ax WiFi (ath11k): - IPQ5018 support - Fine Timing Measurement (FTM) responder role support - channel 177 support - MediaTek WiFi (mt76): - per-PHY LED support - mt7996: EHT (Wi-Fi 7) support - Wireless Ethernet Dispatch (WED) reset support - switch to using page pool allocator - RealTek WiFi (rtw89): - support new version of Bluetooth co-existance - Mobile: - rmnet: support TX aggregation" * tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1872 commits) page_pool: add a comment explaining the fragment counter usage net: ethtool: fix __ethtool_dev_mm_supported() implementation ethtool: pse-pd: Fix double word in comments xsk: add linux/vmalloc.h to xsk.c sefltests: netdevsim: wait for devlink instance after netns removal selftest: fib_tests: Always cleanup before exit net/mlx5e: Align IPsec ASO result memory to be as required by hardware net/mlx5e: TC, Set CT miss to the specific ct action instance net/mlx5e: Rename CHAIN_TO_REG to MAPPED_OBJ_TO_REG net/mlx5: Refactor tc miss handling to a single function net/mlx5: Kconfig: Make tc offload depend on tc skb extension net/sched: flower: Support hardware miss to tc action net/sched: flower: Move filter handle initialization earlier net/sched: cls_api: Support hardware miss to tc action net/sched: Rename user cookie and act cookie sfc: fix builds without CONFIG_RTC_LIB sfc: clean up some inconsistent indentings net/mlx4_en: Introduce flexible array to silence overflow warning net: lan966x: Fix possible deadlock inside PTP net/ulp: Remove redundant ->clone() test in inet_clone_ulp(). ... --- drivers/pinctrl/freescale/pinctrl-imx8ulp.c | 278 ++++++++++++++++++++++++++++ 1 file changed, 278 insertions(+) create mode 100644 drivers/pinctrl/freescale/pinctrl-imx8ulp.c (limited to 'drivers/pinctrl/freescale/pinctrl-imx8ulp.c') diff --git a/drivers/pinctrl/freescale/pinctrl-imx8ulp.c b/drivers/pinctrl/freescale/pinctrl-imx8ulp.c new file mode 100644 index 000000000..f8572597a --- /dev/null +++ b/drivers/pinctrl/freescale/pinctrl-imx8ulp.c @@ -0,0 +1,278 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2021 NXP + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "pinctrl-imx.h" + +enum imx8ulp_pads { + IMX8ULP_PAD_PTD0 = 0, + IMX8ULP_PAD_PTD1, + IMX8ULP_PAD_PTD2, + IMX8ULP_PAD_PTD3, + IMX8ULP_PAD_PTD4, + IMX8ULP_PAD_PTD5, + IMX8ULP_PAD_PTD6, + IMX8ULP_PAD_PTD7, + IMX8ULP_PAD_PTD8, + IMX8ULP_PAD_PTD9, + IMX8ULP_PAD_PTD10, + IMX8ULP_PAD_PTD11, + IMX8ULP_PAD_PTD12, + IMX8ULP_PAD_PTD13, + IMX8ULP_PAD_PTD14, + IMX8ULP_PAD_PTD15, + IMX8ULP_PAD_PTD16, + IMX8ULP_PAD_PTD17, + IMX8ULP_PAD_PTD18, + IMX8ULP_PAD_PTD19, + IMX8ULP_PAD_PTD20, + IMX8ULP_PAD_PTD21, + IMX8ULP_PAD_PTD22, + IMX8ULP_PAD_PTD23, + IMX8ULP_PAD_RESERVE0, + IMX8ULP_PAD_RESERVE1, + IMX8ULP_PAD_RESERVE2, + IMX8ULP_PAD_RESERVE3, + IMX8ULP_PAD_RESERVE4, + IMX8ULP_PAD_RESERVE5, + IMX8ULP_PAD_RESERVE6, + IMX8ULP_PAD_RESERVE7, + IMX8ULP_PAD_PTE0, + IMX8ULP_PAD_PTE1, + IMX8ULP_PAD_PTE2, + IMX8ULP_PAD_PTE3, + IMX8ULP_PAD_PTE4, + IMX8ULP_PAD_PTE5, + IMX8ULP_PAD_PTE6, + IMX8ULP_PAD_PTE7, + IMX8ULP_PAD_PTE8, + IMX8ULP_PAD_PTE9, + IMX8ULP_PAD_PTE10, + IMX8ULP_PAD_PTE11, + IMX8ULP_PAD_PTE12, + IMX8ULP_PAD_PTE13, + IMX8ULP_PAD_PTE14, + IMX8ULP_PAD_PTE15, + IMX8ULP_PAD_PTE16, + IMX8ULP_PAD_PTE17, + IMX8ULP_PAD_PTE18, + IMX8ULP_PAD_PTE19, + IMX8ULP_PAD_PTE20, + IMX8ULP_PAD_PTE21, + IMX8ULP_PAD_PTE22, + IMX8ULP_PAD_PTE23, + IMX8ULP_PAD_RESERVE8, + IMX8ULP_PAD_RESERVE9, + IMX8ULP_PAD_RESERVE10, + IMX8ULP_PAD_RESERVE11, + IMX8ULP_PAD_RESERVE12, + IMX8ULP_PAD_RESERVE13, + IMX8ULP_PAD_RESERVE14, + IMX8ULP_PAD_RESERVE15, + IMX8ULP_PAD_PTF0, + IMX8ULP_PAD_PTF1, + IMX8ULP_PAD_PTF2, + IMX8ULP_PAD_PTF3, + IMX8ULP_PAD_PTF4, + IMX8ULP_PAD_PTF5, + IMX8ULP_PAD_PTF6, + IMX8ULP_PAD_PTF7, + IMX8ULP_PAD_PTF8, + IMX8ULP_PAD_PTF9, + IMX8ULP_PAD_PTF10, + IMX8ULP_PAD_PTF11, + IMX8ULP_PAD_PTF12, + IMX8ULP_PAD_PTF13, + IMX8ULP_PAD_PTF14, + IMX8ULP_PAD_PTF15, + IMX8ULP_PAD_PTF16, + IMX8ULP_PAD_PTF17, + IMX8ULP_PAD_PTF18, + IMX8ULP_PAD_PTF19, + IMX8ULP_PAD_PTF20, + IMX8ULP_PAD_PTF21, + IMX8ULP_PAD_PTF22, + IMX8ULP_PAD_PTF23, + IMX8ULP_PAD_PTF24, + IMX8ULP_PAD_PTF25, + IMX8ULP_PAD_PTF26, + IMX8ULP_PAD_PTF27, + IMX8ULP_PAD_PTF28, + IMX8ULP_PAD_PTF29, + IMX8ULP_PAD_PTF30, + IMX8ULP_PAD_PTF31, +}; + +/* Pad names for the pinmux subsystem */ +static const struct pinctrl_pin_desc imx8ulp_pinctrl_pads[] = { + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTD0), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTD1), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTD2), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTD3), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTD4), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTD5), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTD6), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTD7), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTD8), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTD9), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTD10), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTD11), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTD12), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTD13), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTD14), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTD15), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTD16), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTD17), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTD18), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTD19), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTD20), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTD21), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTD22), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTD23), + IMX_PINCTRL_PIN(IMX8ULP_PAD_RESERVE0), + IMX_PINCTRL_PIN(IMX8ULP_PAD_RESERVE1), + IMX_PINCTRL_PIN(IMX8ULP_PAD_RESERVE2), + IMX_PINCTRL_PIN(IMX8ULP_PAD_RESERVE3), + IMX_PINCTRL_PIN(IMX8ULP_PAD_RESERVE4), + IMX_PINCTRL_PIN(IMX8ULP_PAD_RESERVE5), + IMX_PINCTRL_PIN(IMX8ULP_PAD_RESERVE6), + IMX_PINCTRL_PIN(IMX8ULP_PAD_RESERVE7), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTE0), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTE1), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTE2), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTE3), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTE4), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTE5), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTE6), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTE7), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTE8), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTE9), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTE10), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTE11), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTE12), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTE13), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTE14), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTE15), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTE16), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTE17), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTE18), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTE19), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTE20), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTE21), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTE22), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTE23), + IMX_PINCTRL_PIN(IMX8ULP_PAD_RESERVE8), + IMX_PINCTRL_PIN(IMX8ULP_PAD_RESERVE9), + IMX_PINCTRL_PIN(IMX8ULP_PAD_RESERVE10), + IMX_PINCTRL_PIN(IMX8ULP_PAD_RESERVE11), + IMX_PINCTRL_PIN(IMX8ULP_PAD_RESERVE12), + IMX_PINCTRL_PIN(IMX8ULP_PAD_RESERVE13), + IMX_PINCTRL_PIN(IMX8ULP_PAD_RESERVE14), + IMX_PINCTRL_PIN(IMX8ULP_PAD_RESERVE15), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF0), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF1), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF2), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF3), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF4), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF5), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF6), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF7), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF8), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF9), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF10), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF11), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF12), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF13), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF14), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF15), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF16), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF17), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF18), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF19), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF20), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF21), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF22), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF23), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF24), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF25), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF26), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF27), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF28), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF29), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF30), + IMX_PINCTRL_PIN(IMX8ULP_PAD_PTF31), +}; + +#define BM_OBE_ENABLED BIT(17) +#define BM_IBE_ENABLED BIT(16) +#define BM_MUX_MODE 0xf00 +#define BP_MUX_MODE 8 + +static int imx8ulp_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned offset, bool input) +{ + struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev); + const struct imx_pin_reg *pin_reg; + u32 reg; + + pin_reg = &ipctl->pin_regs[offset]; + if (pin_reg->mux_reg == -1) + return -EINVAL; + + reg = readl(ipctl->base + pin_reg->mux_reg); + if (input) + reg = (reg & ~BM_OBE_ENABLED) | BM_IBE_ENABLED; + else + reg = (reg & ~BM_IBE_ENABLED) | BM_OBE_ENABLED; + writel(reg, ipctl->base + pin_reg->mux_reg); + + return 0; +} + +static const struct imx_pinctrl_soc_info imx8ulp_pinctrl_info = { + .pins = imx8ulp_pinctrl_pads, + .npins = ARRAY_SIZE(imx8ulp_pinctrl_pads), + .flags = ZERO_OFFSET_VALID | SHARE_MUX_CONF_REG, + .gpio_set_direction = imx8ulp_pmx_gpio_set_direction, + .mux_mask = BM_MUX_MODE, + .mux_shift = BP_MUX_MODE, +}; + +static const struct of_device_id imx8ulp_pinctrl_of_match[] = { + { .compatible = "fsl,imx8ulp-iomuxc1", }, + { /* sentinel */ } +}; + +static int imx8ulp_pinctrl_probe(struct platform_device *pdev) +{ + return imx_pinctrl_probe(pdev, &imx8ulp_pinctrl_info); +} + +static struct platform_driver imx8ulp_pinctrl_driver = { + .driver = { + .name = "imx8ulp-pinctrl", + .of_match_table = imx8ulp_pinctrl_of_match, + .suppress_bind_attrs = true, + }, + .probe = imx8ulp_pinctrl_probe, +}; + +static int __init imx8ulp_pinctrl_init(void) +{ + return platform_driver_register(&imx8ulp_pinctrl_driver); +} +arch_initcall(imx8ulp_pinctrl_init); + +MODULE_AUTHOR("Jacky Bai "); +MODULE_DESCRIPTION("NXP i.MX8ULP pinctrl driver"); +MODULE_LICENSE("GPL v2"); -- cgit v1.2.3