From 5b7c4cabbb65f5c469464da6c5f614cbd7f730f2 Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Tue, 21 Feb 2023 18:24:12 -0800 Subject: Merge tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next Pull networking updates from Jakub Kicinski: "Core: - Add dedicated kmem_cache for typical/small skb->head, avoid having to access struct page at kfree time, and improve memory use. - Introduce sysctl to set default RPS configuration for new netdevs. - Define Netlink protocol specification format which can be used to describe messages used by each family and auto-generate parsers. Add tools for generating kernel data structures and uAPI headers. - Expose all net/core sysctls inside netns. - Remove 4s sleep in netpoll if carrier is instantly detected on boot. - Add configurable limit of MDB entries per port, and port-vlan. - Continue populating drop reasons throughout the stack. - Retire a handful of legacy Qdiscs and classifiers. Protocols: - Support IPv4 big TCP (TSO frames larger than 64kB). - Add IP_LOCAL_PORT_RANGE socket option, to control local port range on socket by socket basis. - Track and report in procfs number of MPTCP sockets used. - Support mixing IPv4 and IPv6 flows in the in-kernel MPTCP path manager. - IPv6: don't check net.ipv6.route.max_size and rely on garbage collection to free memory (similarly to IPv4). - Support Penultimate Segment Pop (PSP) flavor in SRv6 (RFC8986). - ICMP: add per-rate limit counters. - Add support for user scanning requests in ieee802154. - Remove static WEP support. - Support minimal Wi-Fi 7 Extremely High Throughput (EHT) rate reporting. - WiFi 7 EHT channel puncturing support (client & AP). BPF: - Add a rbtree data structure following the "next-gen data structure" precedent set by recently added linked list, that is, by using kfunc + kptr instead of adding a new BPF map type. - Expose XDP hints via kfuncs with initial support for RX hash and timestamp metadata. - Add BPF_F_NO_TUNNEL_KEY extension to bpf_skb_set_tunnel_key to better support decap on GRE tunnel devices not operating in collect metadata. - Improve x86 JIT's codegen for PROBE_MEM runtime error checks. - Remove the need for trace_printk_lock for bpf_trace_printk and bpf_trace_vprintk helpers. - Extend libbpf's bpf_tracing.h support for tracing arguments of kprobes/uprobes and syscall as a special case. - Significantly reduce the search time for module symbols by livepatch and BPF. - Enable cpumasks to be used as kptrs, which is useful for tracing programs tracking which tasks end up running on which CPUs in different time intervals. - Add support for BPF trampoline on s390x and riscv64. - Add capability to export the XDP features supported by the NIC. - Add __bpf_kfunc tag for marking kernel functions as kfuncs. - Add cgroup.memory=nobpf kernel parameter option to disable BPF memory accounting for container environments. Netfilter: - Remove the CLUSTERIP target. It has been marked as obsolete for years, and we still have WARN splats wrt races of the out-of-band /proc interface installed by this target. - Add 'destroy' commands to nf_tables. They are identical to the existing 'delete' commands, but do not return an error if the referenced object (set, chain, rule...) did not exist. Driver API: - Improve cpumask_local_spread() locality to help NICs set the right IRQ affinity on AMD platforms. - Separate C22 and C45 MDIO bus transactions more clearly. - Introduce new DCB table to control DSCP rewrite on egress. - Support configuration of Physical Layer Collision Avoidance (PLCA) Reconciliation Sublayer (RS) (802.3cg-2019). Modern version of shared medium Ethernet. - Support for MAC Merge layer (IEEE 802.3-2018 clause 99). Allowing preemption of low priority frames by high priority frames. - Add support for controlling MACSec offload using netlink SET. - Rework devlink instance refcounts to allow registration and de-registration under the instance lock. Split the code into multiple files, drop some of the unnecessarily granular locks and factor out common parts of netlink operation handling. - Add TX frame aggregation parameters (for USB drivers). - Add a new attr TCA_EXT_WARN_MSG to report TC (offload) warning messages with notifications for debug. - Allow offloading of UDP NEW connections via act_ct. - Add support for per action HW stats in TC. - Support hardware miss to TC action (continue processing in SW from a specific point in the action chain). - Warn if old Wireless Extension user space interface is used with modern cfg80211/mac80211 drivers. Do not support Wireless Extensions for Wi-Fi 7 devices at all. Everyone should switch to using nl80211 interface instead. - Improve the CAN bit timing configuration. Use extack to return error messages directly to user space, update the SJW handling, including the definition of a new default value that will benefit CAN-FD controllers, by increasing their oscillator tolerance. New hardware / drivers: - Ethernet: - nVidia BlueField-3 support (control traffic driver) - Ethernet support for imx93 SoCs - Motorcomm yt8531 gigabit Ethernet PHY - onsemi NCN26000 10BASE-T1S PHY (with support for PLCA) - Microchip LAN8841 PHY (incl. cable diagnostics and PTP) - Amlogic gxl MDIO mux - WiFi: - RealTek RTL8188EU (rtl8xxxu) - Qualcomm Wi-Fi 7 devices (ath12k) - CAN: - Renesas R-Car V4H Drivers: - Bluetooth: - Set Per Platform Antenna Gain (PPAG) for Intel controllers. - Ethernet NICs: - Intel (1G, igc): - support TSN / Qbv / packet scheduling features of i226 model - Intel (100G, ice): - use GNSS subsystem instead of TTY - multi-buffer XDP support - extend support for GPIO pins to E823 devices - nVidia/Mellanox: - update the shared buffer configuration on PFC commands - implement PTP adjphase function for HW offset control - TC support for Geneve and GRE with VF tunnel offload - more efficient crypto key management method - multi-port eswitch support - Netronome/Corigine: - add DCB IEEE support - support IPsec offloading for NFP3800 - Freescale/NXP (enetc): - support XDP_REDIRECT for XDP non-linear buffers - improve reconfig, avoid link flap and waiting for idle - support MAC Merge layer - Other NICs: - sfc/ef100: add basic devlink support for ef100 - ionic: rx_push mode operation (writing descriptors via MMIO) - bnxt: use the auxiliary bus abstraction for RDMA - r8169: disable ASPM and reset bus in case of tx timeout - cpsw: support QSGMII mode for J721e CPSW9G - cpts: support pulse-per-second output - ngbe: add an mdio bus driver - usbnet: optimize usbnet_bh() by avoiding unnecessary queuing - r8152: handle devices with FW with NCM support - amd-xgbe: support 10Mbps, 2.5GbE speeds and rx-adaptation - virtio-net: support multi buffer XDP - virtio/vsock: replace virtio_vsock_pkt with sk_buff - tsnep: XDP support - Ethernet high-speed switches: - nVidia/Mellanox (mlxsw): - add support for latency TLV (in FW control messages) - Microchip (sparx5): - separate explicit and implicit traffic forwarding rules, make the implicit rules always active - add support for egress DSCP rewrite - IS0 VCAP support (Ingress Classification) - IS2 VCAP filters (protos, L3 addrs, L4 ports, flags, ToS etc.) - ES2 VCAP support (Egress Access Control) - support for Per-Stream Filtering and Policing (802.1Q, 8.6.5.1) - Ethernet embedded switches: - Marvell (mv88e6xxx): - add MAB (port auth) offload support - enable PTP receive for mv88e6390 - NXP (ocelot): - support MAC Merge layer - support for the the vsc7512 internal copper phys - Microchip: - lan9303: convert to PHYLINK - lan966x: support TC flower filter statistics - lan937x: PTP support for KSZ9563/KSZ8563 and LAN937x - lan937x: support Credit Based Shaper configuration - ksz9477: support Energy Efficient Ethernet - other: - qca8k: convert to regmap read/write API, use bulk operations - rswitch: Improve TX timestamp accuracy - Intel WiFi (iwlwifi): - EHT (Wi-Fi 7) rate reporting - STEP equalizer support: transfer some STEP (connection to radio on platforms with integrated wifi) related parameters from the BIOS to the firmware. - Qualcomm 802.11ax WiFi (ath11k): - IPQ5018 support - Fine Timing Measurement (FTM) responder role support - channel 177 support - MediaTek WiFi (mt76): - per-PHY LED support - mt7996: EHT (Wi-Fi 7) support - Wireless Ethernet Dispatch (WED) reset support - switch to using page pool allocator - RealTek WiFi (rtw89): - support new version of Bluetooth co-existance - Mobile: - rmnet: support TX aggregation" * tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1872 commits) page_pool: add a comment explaining the fragment counter usage net: ethtool: fix __ethtool_dev_mm_supported() implementation ethtool: pse-pd: Fix double word in comments xsk: add linux/vmalloc.h to xsk.c sefltests: netdevsim: wait for devlink instance after netns removal selftest: fib_tests: Always cleanup before exit net/mlx5e: Align IPsec ASO result memory to be as required by hardware net/mlx5e: TC, Set CT miss to the specific ct action instance net/mlx5e: Rename CHAIN_TO_REG to MAPPED_OBJ_TO_REG net/mlx5: Refactor tc miss handling to a single function net/mlx5: Kconfig: Make tc offload depend on tc skb extension net/sched: flower: Support hardware miss to tc action net/sched: flower: Move filter handle initialization earlier net/sched: cls_api: Support hardware miss to tc action net/sched: Rename user cookie and act cookie sfc: fix builds without CONFIG_RTC_LIB sfc: clean up some inconsistent indentings net/mlx4_en: Introduce flexible array to silence overflow warning net: lan966x: Fix possible deadlock inside PTP net/ulp: Remove redundant ->clone() test in inet_clone_ulp(). ... --- drivers/spi/spi-npcm-pspi.c | 464 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 464 insertions(+) create mode 100644 drivers/spi/spi-npcm-pspi.c (limited to 'drivers/spi/spi-npcm-pspi.c') diff --git a/drivers/spi/spi-npcm-pspi.c b/drivers/spi/spi-npcm-pspi.c new file mode 100644 index 000000000..7f2e4d1b0 --- /dev/null +++ b/drivers/spi/spi-npcm-pspi.c @@ -0,0 +1,464 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2018 Nuvoton Technology corporation. + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include + +struct npcm_pspi { + struct completion xfer_done; + struct reset_control *reset; + struct spi_master *master; + unsigned int tx_bytes; + unsigned int rx_bytes; + void __iomem *base; + bool is_save_param; + u8 bits_per_word; + const u8 *tx_buf; + struct clk *clk; + u32 speed_hz; + u8 *rx_buf; + u16 mode; + u32 id; +}; + +#define DRIVER_NAME "npcm-pspi" + +#define NPCM_PSPI_DATA 0x00 +#define NPCM_PSPI_CTL1 0x02 +#define NPCM_PSPI_STAT 0x04 + +/* definitions for control and status register */ +#define NPCM_PSPI_CTL1_SPIEN BIT(0) +#define NPCM_PSPI_CTL1_MOD BIT(2) +#define NPCM_PSPI_CTL1_EIR BIT(5) +#define NPCM_PSPI_CTL1_EIW BIT(6) +#define NPCM_PSPI_CTL1_SCM BIT(7) +#define NPCM_PSPI_CTL1_SCIDL BIT(8) +#define NPCM_PSPI_CTL1_SCDV6_0 GENMASK(15, 9) + +#define NPCM_PSPI_STAT_BSY BIT(0) +#define NPCM_PSPI_STAT_RBF BIT(1) + +/* general definitions */ +#define NPCM_PSPI_TIMEOUT_MS 2000 +#define NPCM_PSPI_MAX_CLK_DIVIDER 256 +#define NPCM_PSPI_MIN_CLK_DIVIDER 4 +#define NPCM_PSPI_DEFAULT_CLK 25000000 + +static inline unsigned int bytes_per_word(unsigned int bits) +{ + return bits <= 8 ? 1 : 2; +} + +static inline void npcm_pspi_irq_enable(struct npcm_pspi *priv, u16 mask) +{ + u16 val; + + val = ioread16(priv->base + NPCM_PSPI_CTL1); + val |= mask; + iowrite16(val, priv->base + NPCM_PSPI_CTL1); +} + +static inline void npcm_pspi_irq_disable(struct npcm_pspi *priv, u16 mask) +{ + u16 val; + + val = ioread16(priv->base + NPCM_PSPI_CTL1); + val &= ~mask; + iowrite16(val, priv->base + NPCM_PSPI_CTL1); +} + +static inline void npcm_pspi_enable(struct npcm_pspi *priv) +{ + u16 val; + + val = ioread16(priv->base + NPCM_PSPI_CTL1); + val |= NPCM_PSPI_CTL1_SPIEN; + iowrite16(val, priv->base + NPCM_PSPI_CTL1); +} + +static inline void npcm_pspi_disable(struct npcm_pspi *priv) +{ + u16 val; + + val = ioread16(priv->base + NPCM_PSPI_CTL1); + val &= ~NPCM_PSPI_CTL1_SPIEN; + iowrite16(val, priv->base + NPCM_PSPI_CTL1); +} + +static void npcm_pspi_set_mode(struct spi_device *spi) +{ + struct npcm_pspi *priv = spi_master_get_devdata(spi->master); + u16 regtemp; + u16 mode_val; + + switch (spi->mode & SPI_MODE_X_MASK) { + case SPI_MODE_0: + mode_val = 0; + break; + case SPI_MODE_1: + mode_val = NPCM_PSPI_CTL1_SCIDL; + break; + case SPI_MODE_2: + mode_val = NPCM_PSPI_CTL1_SCM; + break; + case SPI_MODE_3: + mode_val = NPCM_PSPI_CTL1_SCIDL | NPCM_PSPI_CTL1_SCM; + break; + } + + regtemp = ioread16(priv->base + NPCM_PSPI_CTL1); + regtemp &= ~(NPCM_PSPI_CTL1_SCM | NPCM_PSPI_CTL1_SCIDL); + iowrite16(regtemp | mode_val, priv->base + NPCM_PSPI_CTL1); +} + +static void npcm_pspi_set_transfer_size(struct npcm_pspi *priv, int size) +{ + u16 regtemp; + + regtemp = ioread16(NPCM_PSPI_CTL1 + priv->base); + + switch (size) { + case 8: + regtemp &= ~NPCM_PSPI_CTL1_MOD; + break; + case 16: + regtemp |= NPCM_PSPI_CTL1_MOD; + break; + } + + iowrite16(regtemp, NPCM_PSPI_CTL1 + priv->base); +} + +static void npcm_pspi_set_baudrate(struct npcm_pspi *priv, unsigned int speed) +{ + u32 ckdiv; + u16 regtemp; + + /* the supported rates are numbers from 4 to 256. */ + ckdiv = DIV_ROUND_CLOSEST(clk_get_rate(priv->clk), (2 * speed)) - 1; + + regtemp = ioread16(NPCM_PSPI_CTL1 + priv->base); + regtemp &= ~NPCM_PSPI_CTL1_SCDV6_0; + iowrite16(regtemp | (ckdiv << 9), NPCM_PSPI_CTL1 + priv->base); +} + +static void npcm_pspi_setup_transfer(struct spi_device *spi, + struct spi_transfer *t) +{ + struct npcm_pspi *priv = spi_master_get_devdata(spi->master); + + priv->tx_buf = t->tx_buf; + priv->rx_buf = t->rx_buf; + priv->tx_bytes = t->len; + priv->rx_bytes = t->len; + + if (!priv->is_save_param || priv->mode != spi->mode) { + npcm_pspi_set_mode(spi); + priv->mode = spi->mode; + } + + /* + * If transfer is even length, and 8 bits per word transfer, + * then implement 16 bits-per-word transfer. + */ + if (priv->bits_per_word == 8 && !(t->len & 0x1)) + t->bits_per_word = 16; + + if (!priv->is_save_param || priv->bits_per_word != t->bits_per_word) { + npcm_pspi_set_transfer_size(priv, t->bits_per_word); + priv->bits_per_word = t->bits_per_word; + } + + if (!priv->is_save_param || priv->speed_hz != t->speed_hz) { + npcm_pspi_set_baudrate(priv, t->speed_hz); + priv->speed_hz = t->speed_hz; + } + + if (!priv->is_save_param) + priv->is_save_param = true; +} + +static void npcm_pspi_send(struct npcm_pspi *priv) +{ + int wsize; + u16 val; + + wsize = min(bytes_per_word(priv->bits_per_word), priv->tx_bytes); + priv->tx_bytes -= wsize; + + if (!priv->tx_buf) + return; + + switch (wsize) { + case 1: + val = *priv->tx_buf++; + iowrite8(val, NPCM_PSPI_DATA + priv->base); + break; + case 2: + val = *priv->tx_buf++; + val = *priv->tx_buf++ | (val << 8); + iowrite16(val, NPCM_PSPI_DATA + priv->base); + break; + default: + WARN_ON_ONCE(1); + return; + } +} + +static void npcm_pspi_recv(struct npcm_pspi *priv) +{ + int rsize; + u16 val; + + rsize = min(bytes_per_word(priv->bits_per_word), priv->rx_bytes); + priv->rx_bytes -= rsize; + + if (!priv->rx_buf) + return; + + switch (rsize) { + case 1: + *priv->rx_buf++ = ioread8(priv->base + NPCM_PSPI_DATA); + break; + case 2: + val = ioread16(priv->base + NPCM_PSPI_DATA); + *priv->rx_buf++ = (val >> 8); + *priv->rx_buf++ = val & 0xff; + break; + default: + WARN_ON_ONCE(1); + return; + } +} + +static int npcm_pspi_transfer_one(struct spi_master *master, + struct spi_device *spi, + struct spi_transfer *t) +{ + struct npcm_pspi *priv = spi_master_get_devdata(master); + int status; + + npcm_pspi_setup_transfer(spi, t); + reinit_completion(&priv->xfer_done); + npcm_pspi_enable(priv); + status = wait_for_completion_timeout(&priv->xfer_done, + msecs_to_jiffies + (NPCM_PSPI_TIMEOUT_MS)); + if (status == 0) { + npcm_pspi_disable(priv); + return -ETIMEDOUT; + } + + return 0; +} + +static int npcm_pspi_prepare_transfer_hardware(struct spi_master *master) +{ + struct npcm_pspi *priv = spi_master_get_devdata(master); + + npcm_pspi_irq_enable(priv, NPCM_PSPI_CTL1_EIR | NPCM_PSPI_CTL1_EIW); + + return 0; +} + +static int npcm_pspi_unprepare_transfer_hardware(struct spi_master *master) +{ + struct npcm_pspi *priv = spi_master_get_devdata(master); + + npcm_pspi_irq_disable(priv, NPCM_PSPI_CTL1_EIR | NPCM_PSPI_CTL1_EIW); + + return 0; +} + +static void npcm_pspi_reset_hw(struct npcm_pspi *priv) +{ + reset_control_assert(priv->reset); + udelay(5); + reset_control_deassert(priv->reset); +} + +static irqreturn_t npcm_pspi_handler(int irq, void *dev_id) +{ + struct npcm_pspi *priv = dev_id; + u8 stat; + + stat = ioread8(priv->base + NPCM_PSPI_STAT); + + if (!priv->tx_buf && !priv->rx_buf) + return IRQ_NONE; + + if (priv->tx_buf) { + if (stat & NPCM_PSPI_STAT_RBF) { + ioread8(NPCM_PSPI_DATA + priv->base); + if (priv->tx_bytes == 0) { + npcm_pspi_disable(priv); + complete(&priv->xfer_done); + return IRQ_HANDLED; + } + } + + if ((stat & NPCM_PSPI_STAT_BSY) == 0) + if (priv->tx_bytes) + npcm_pspi_send(priv); + } + + if (priv->rx_buf) { + if (stat & NPCM_PSPI_STAT_RBF) { + if (!priv->rx_bytes) + return IRQ_NONE; + + npcm_pspi_recv(priv); + + if (!priv->rx_bytes) { + npcm_pspi_disable(priv); + complete(&priv->xfer_done); + return IRQ_HANDLED; + } + } + + if (((stat & NPCM_PSPI_STAT_BSY) == 0) && !priv->tx_buf) + iowrite8(0x0, NPCM_PSPI_DATA + priv->base); + } + + return IRQ_HANDLED; +} + +static int npcm_pspi_probe(struct platform_device *pdev) +{ + struct npcm_pspi *priv; + struct spi_master *master; + unsigned long clk_hz; + int irq; + int ret; + + master = spi_alloc_master(&pdev->dev, sizeof(*priv)); + if (!master) + return -ENOMEM; + + platform_set_drvdata(pdev, master); + + priv = spi_master_get_devdata(master); + priv->master = master; + priv->is_save_param = false; + + priv->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(priv->base)) { + ret = PTR_ERR(priv->base); + goto out_master_put; + } + + priv->clk = devm_clk_get(&pdev->dev, NULL); + if (IS_ERR(priv->clk)) { + dev_err(&pdev->dev, "failed to get clock\n"); + ret = PTR_ERR(priv->clk); + goto out_master_put; + } + + ret = clk_prepare_enable(priv->clk); + if (ret) + goto out_master_put; + + irq = platform_get_irq(pdev, 0); + if (irq < 0) { + ret = irq; + goto out_disable_clk; + } + + priv->reset = devm_reset_control_get(&pdev->dev, NULL); + if (IS_ERR(priv->reset)) { + ret = PTR_ERR(priv->reset); + goto out_disable_clk; + } + + /* reset SPI-HW block */ + npcm_pspi_reset_hw(priv); + + ret = devm_request_irq(&pdev->dev, irq, npcm_pspi_handler, 0, + "npcm-pspi", priv); + if (ret) { + dev_err(&pdev->dev, "failed to request IRQ\n"); + goto out_disable_clk; + } + + init_completion(&priv->xfer_done); + + clk_hz = clk_get_rate(priv->clk); + + master->max_speed_hz = DIV_ROUND_UP(clk_hz, NPCM_PSPI_MIN_CLK_DIVIDER); + master->min_speed_hz = DIV_ROUND_UP(clk_hz, NPCM_PSPI_MAX_CLK_DIVIDER); + master->mode_bits = SPI_CPHA | SPI_CPOL; + master->dev.of_node = pdev->dev.of_node; + master->bus_num = -1; + master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16); + master->transfer_one = npcm_pspi_transfer_one; + master->prepare_transfer_hardware = + npcm_pspi_prepare_transfer_hardware; + master->unprepare_transfer_hardware = + npcm_pspi_unprepare_transfer_hardware; + master->use_gpio_descriptors = true; + + /* set to default clock rate */ + npcm_pspi_set_baudrate(priv, NPCM_PSPI_DEFAULT_CLK); + + ret = devm_spi_register_master(&pdev->dev, master); + if (ret) + goto out_disable_clk; + + pr_info("NPCM Peripheral SPI %d probed\n", master->bus_num); + + return 0; + +out_disable_clk: + clk_disable_unprepare(priv->clk); + +out_master_put: + spi_master_put(master); + return ret; +} + +static int npcm_pspi_remove(struct platform_device *pdev) +{ + struct spi_master *master = platform_get_drvdata(pdev); + struct npcm_pspi *priv = spi_master_get_devdata(master); + + npcm_pspi_reset_hw(priv); + clk_disable_unprepare(priv->clk); + + return 0; +} + +static const struct of_device_id npcm_pspi_match[] = { + { .compatible = "nuvoton,npcm750-pspi", .data = NULL }, + { .compatible = "nuvoton,npcm845-pspi", .data = NULL }, + {} +}; +MODULE_DEVICE_TABLE(of, npcm_pspi_match); + +static struct platform_driver npcm_pspi_driver = { + .driver = { + .name = DRIVER_NAME, + .of_match_table = npcm_pspi_match, + }, + .probe = npcm_pspi_probe, + .remove = npcm_pspi_remove, +}; +module_platform_driver(npcm_pspi_driver); + +MODULE_DESCRIPTION("NPCM peripheral SPI Controller driver"); +MODULE_AUTHOR("Tomer Maimon "); +MODULE_LICENSE("GPL v2"); + -- cgit v1.2.3