From 5b7c4cabbb65f5c469464da6c5f614cbd7f730f2 Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Tue, 21 Feb 2023 18:24:12 -0800 Subject: Merge tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next Pull networking updates from Jakub Kicinski: "Core: - Add dedicated kmem_cache for typical/small skb->head, avoid having to access struct page at kfree time, and improve memory use. - Introduce sysctl to set default RPS configuration for new netdevs. - Define Netlink protocol specification format which can be used to describe messages used by each family and auto-generate parsers. Add tools for generating kernel data structures and uAPI headers. - Expose all net/core sysctls inside netns. - Remove 4s sleep in netpoll if carrier is instantly detected on boot. - Add configurable limit of MDB entries per port, and port-vlan. - Continue populating drop reasons throughout the stack. - Retire a handful of legacy Qdiscs and classifiers. Protocols: - Support IPv4 big TCP (TSO frames larger than 64kB). - Add IP_LOCAL_PORT_RANGE socket option, to control local port range on socket by socket basis. - Track and report in procfs number of MPTCP sockets used. - Support mixing IPv4 and IPv6 flows in the in-kernel MPTCP path manager. - IPv6: don't check net.ipv6.route.max_size and rely on garbage collection to free memory (similarly to IPv4). - Support Penultimate Segment Pop (PSP) flavor in SRv6 (RFC8986). - ICMP: add per-rate limit counters. - Add support for user scanning requests in ieee802154. - Remove static WEP support. - Support minimal Wi-Fi 7 Extremely High Throughput (EHT) rate reporting. - WiFi 7 EHT channel puncturing support (client & AP). BPF: - Add a rbtree data structure following the "next-gen data structure" precedent set by recently added linked list, that is, by using kfunc + kptr instead of adding a new BPF map type. - Expose XDP hints via kfuncs with initial support for RX hash and timestamp metadata. - Add BPF_F_NO_TUNNEL_KEY extension to bpf_skb_set_tunnel_key to better support decap on GRE tunnel devices not operating in collect metadata. - Improve x86 JIT's codegen for PROBE_MEM runtime error checks. - Remove the need for trace_printk_lock for bpf_trace_printk and bpf_trace_vprintk helpers. - Extend libbpf's bpf_tracing.h support for tracing arguments of kprobes/uprobes and syscall as a special case. - Significantly reduce the search time for module symbols by livepatch and BPF. - Enable cpumasks to be used as kptrs, which is useful for tracing programs tracking which tasks end up running on which CPUs in different time intervals. - Add support for BPF trampoline on s390x and riscv64. - Add capability to export the XDP features supported by the NIC. - Add __bpf_kfunc tag for marking kernel functions as kfuncs. - Add cgroup.memory=nobpf kernel parameter option to disable BPF memory accounting for container environments. Netfilter: - Remove the CLUSTERIP target. It has been marked as obsolete for years, and we still have WARN splats wrt races of the out-of-band /proc interface installed by this target. - Add 'destroy' commands to nf_tables. They are identical to the existing 'delete' commands, but do not return an error if the referenced object (set, chain, rule...) did not exist. Driver API: - Improve cpumask_local_spread() locality to help NICs set the right IRQ affinity on AMD platforms. - Separate C22 and C45 MDIO bus transactions more clearly. - Introduce new DCB table to control DSCP rewrite on egress. - Support configuration of Physical Layer Collision Avoidance (PLCA) Reconciliation Sublayer (RS) (802.3cg-2019). Modern version of shared medium Ethernet. - Support for MAC Merge layer (IEEE 802.3-2018 clause 99). Allowing preemption of low priority frames by high priority frames. - Add support for controlling MACSec offload using netlink SET. - Rework devlink instance refcounts to allow registration and de-registration under the instance lock. Split the code into multiple files, drop some of the unnecessarily granular locks and factor out common parts of netlink operation handling. - Add TX frame aggregation parameters (for USB drivers). - Add a new attr TCA_EXT_WARN_MSG to report TC (offload) warning messages with notifications for debug. - Allow offloading of UDP NEW connections via act_ct. - Add support for per action HW stats in TC. - Support hardware miss to TC action (continue processing in SW from a specific point in the action chain). - Warn if old Wireless Extension user space interface is used with modern cfg80211/mac80211 drivers. Do not support Wireless Extensions for Wi-Fi 7 devices at all. Everyone should switch to using nl80211 interface instead. - Improve the CAN bit timing configuration. Use extack to return error messages directly to user space, update the SJW handling, including the definition of a new default value that will benefit CAN-FD controllers, by increasing their oscillator tolerance. New hardware / drivers: - Ethernet: - nVidia BlueField-3 support (control traffic driver) - Ethernet support for imx93 SoCs - Motorcomm yt8531 gigabit Ethernet PHY - onsemi NCN26000 10BASE-T1S PHY (with support for PLCA) - Microchip LAN8841 PHY (incl. cable diagnostics and PTP) - Amlogic gxl MDIO mux - WiFi: - RealTek RTL8188EU (rtl8xxxu) - Qualcomm Wi-Fi 7 devices (ath12k) - CAN: - Renesas R-Car V4H Drivers: - Bluetooth: - Set Per Platform Antenna Gain (PPAG) for Intel controllers. - Ethernet NICs: - Intel (1G, igc): - support TSN / Qbv / packet scheduling features of i226 model - Intel (100G, ice): - use GNSS subsystem instead of TTY - multi-buffer XDP support - extend support for GPIO pins to E823 devices - nVidia/Mellanox: - update the shared buffer configuration on PFC commands - implement PTP adjphase function for HW offset control - TC support for Geneve and GRE with VF tunnel offload - more efficient crypto key management method - multi-port eswitch support - Netronome/Corigine: - add DCB IEEE support - support IPsec offloading for NFP3800 - Freescale/NXP (enetc): - support XDP_REDIRECT for XDP non-linear buffers - improve reconfig, avoid link flap and waiting for idle - support MAC Merge layer - Other NICs: - sfc/ef100: add basic devlink support for ef100 - ionic: rx_push mode operation (writing descriptors via MMIO) - bnxt: use the auxiliary bus abstraction for RDMA - r8169: disable ASPM and reset bus in case of tx timeout - cpsw: support QSGMII mode for J721e CPSW9G - cpts: support pulse-per-second output - ngbe: add an mdio bus driver - usbnet: optimize usbnet_bh() by avoiding unnecessary queuing - r8152: handle devices with FW with NCM support - amd-xgbe: support 10Mbps, 2.5GbE speeds and rx-adaptation - virtio-net: support multi buffer XDP - virtio/vsock: replace virtio_vsock_pkt with sk_buff - tsnep: XDP support - Ethernet high-speed switches: - nVidia/Mellanox (mlxsw): - add support for latency TLV (in FW control messages) - Microchip (sparx5): - separate explicit and implicit traffic forwarding rules, make the implicit rules always active - add support for egress DSCP rewrite - IS0 VCAP support (Ingress Classification) - IS2 VCAP filters (protos, L3 addrs, L4 ports, flags, ToS etc.) - ES2 VCAP support (Egress Access Control) - support for Per-Stream Filtering and Policing (802.1Q, 8.6.5.1) - Ethernet embedded switches: - Marvell (mv88e6xxx): - add MAB (port auth) offload support - enable PTP receive for mv88e6390 - NXP (ocelot): - support MAC Merge layer - support for the the vsc7512 internal copper phys - Microchip: - lan9303: convert to PHYLINK - lan966x: support TC flower filter statistics - lan937x: PTP support for KSZ9563/KSZ8563 and LAN937x - lan937x: support Credit Based Shaper configuration - ksz9477: support Energy Efficient Ethernet - other: - qca8k: convert to regmap read/write API, use bulk operations - rswitch: Improve TX timestamp accuracy - Intel WiFi (iwlwifi): - EHT (Wi-Fi 7) rate reporting - STEP equalizer support: transfer some STEP (connection to radio on platforms with integrated wifi) related parameters from the BIOS to the firmware. - Qualcomm 802.11ax WiFi (ath11k): - IPQ5018 support - Fine Timing Measurement (FTM) responder role support - channel 177 support - MediaTek WiFi (mt76): - per-PHY LED support - mt7996: EHT (Wi-Fi 7) support - Wireless Ethernet Dispatch (WED) reset support - switch to using page pool allocator - RealTek WiFi (rtw89): - support new version of Bluetooth co-existance - Mobile: - rmnet: support TX aggregation" * tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1872 commits) page_pool: add a comment explaining the fragment counter usage net: ethtool: fix __ethtool_dev_mm_supported() implementation ethtool: pse-pd: Fix double word in comments xsk: add linux/vmalloc.h to xsk.c sefltests: netdevsim: wait for devlink instance after netns removal selftest: fib_tests: Always cleanup before exit net/mlx5e: Align IPsec ASO result memory to be as required by hardware net/mlx5e: TC, Set CT miss to the specific ct action instance net/mlx5e: Rename CHAIN_TO_REG to MAPPED_OBJ_TO_REG net/mlx5: Refactor tc miss handling to a single function net/mlx5: Kconfig: Make tc offload depend on tc skb extension net/sched: flower: Support hardware miss to tc action net/sched: flower: Move filter handle initialization earlier net/sched: cls_api: Support hardware miss to tc action net/sched: Rename user cookie and act cookie sfc: fix builds without CONFIG_RTC_LIB sfc: clean up some inconsistent indentings net/mlx4_en: Introduce flexible array to silence overflow warning net: lan966x: Fix possible deadlock inside PTP net/ulp: Remove redundant ->clone() test in inet_clone_ulp(). ... --- drivers/video/fbdev/sunxvr500.c | 441 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 441 insertions(+) create mode 100644 drivers/video/fbdev/sunxvr500.c (limited to 'drivers/video/fbdev/sunxvr500.c') diff --git a/drivers/video/fbdev/sunxvr500.c b/drivers/video/fbdev/sunxvr500.c new file mode 100644 index 000000000..6ec358af1 --- /dev/null +++ b/drivers/video/fbdev/sunxvr500.c @@ -0,0 +1,441 @@ +/* sunxvr500.c: Sun 3DLABS XVR-500 Expert3D fb driver for sparc64 systems + * + * License: GPL + * + * Copyright (C) 2007 David S. Miller (davem@davemloft.net) + */ + +#include +#include +#include +#include +#include +#include + +#include + +/* XXX This device has a 'dev-comm' property which apparently is + * XXX a pointer into the openfirmware's address space which is + * XXX a shared area the kernel driver can use to keep OBP + * XXX informed about the current resolution setting. The idea + * XXX is that the kernel can change resolutions, and as long + * XXX as the values in the 'dev-comm' area are accurate then + * XXX OBP can still render text properly to the console. + * XXX + * XXX I'm still working out the layout of this and whether there + * XXX are any signatures we need to look for etc. + */ +struct e3d_info { + struct fb_info *info; + struct pci_dev *pdev; + + spinlock_t lock; + + char __iomem *fb_base; + unsigned long fb_base_phys; + + unsigned long fb8_buf_diff; + unsigned long regs_base_phys; + + void __iomem *ramdac; + + struct device_node *of_node; + + unsigned int width; + unsigned int height; + unsigned int depth; + unsigned int fb_size; + + u32 fb_base_reg; + u32 fb8_0_off; + u32 fb8_1_off; + + u32 pseudo_palette[16]; +}; + +static int e3d_get_props(struct e3d_info *ep) +{ + ep->width = of_getintprop_default(ep->of_node, "width", 0); + ep->height = of_getintprop_default(ep->of_node, "height", 0); + ep->depth = of_getintprop_default(ep->of_node, "depth", 8); + + if (!ep->width || !ep->height) { + printk(KERN_ERR "e3d: Critical properties missing for %s\n", + pci_name(ep->pdev)); + return -EINVAL; + } + + return 0; +} + +/* My XVR-500 comes up, at 1280x768 and a FB base register value of + * 0x04000000, the following video layout register values: + * + * RAMDAC_VID_WH 0x03ff04ff + * RAMDAC_VID_CFG 0x1a0b0088 + * RAMDAC_VID_32FB_0 0x04000000 + * RAMDAC_VID_32FB_1 0x04800000 + * RAMDAC_VID_8FB_0 0x05000000 + * RAMDAC_VID_8FB_1 0x05200000 + * RAMDAC_VID_XXXFB 0x05400000 + * RAMDAC_VID_YYYFB 0x05c00000 + * RAMDAC_VID_ZZZFB 0x05e00000 + */ +/* Video layout registers */ +#define RAMDAC_VID_WH 0x00000070UL /* (height-1)<<16 | (width-1) */ +#define RAMDAC_VID_CFG 0x00000074UL /* 0x1a000088|(linesz_log2<<16) */ +#define RAMDAC_VID_32FB_0 0x00000078UL /* PCI base 32bpp FB buffer 0 */ +#define RAMDAC_VID_32FB_1 0x0000007cUL /* PCI base 32bpp FB buffer 1 */ +#define RAMDAC_VID_8FB_0 0x00000080UL /* PCI base 8bpp FB buffer 0 */ +#define RAMDAC_VID_8FB_1 0x00000084UL /* PCI base 8bpp FB buffer 1 */ +#define RAMDAC_VID_XXXFB 0x00000088UL /* PCI base of XXX FB */ +#define RAMDAC_VID_YYYFB 0x0000008cUL /* PCI base of YYY FB */ +#define RAMDAC_VID_ZZZFB 0x00000090UL /* PCI base of ZZZ FB */ + +/* CLUT registers */ +#define RAMDAC_INDEX 0x000000bcUL +#define RAMDAC_DATA 0x000000c0UL + +static void e3d_clut_write(struct e3d_info *ep, int index, u32 val) +{ + void __iomem *ramdac = ep->ramdac; + unsigned long flags; + + spin_lock_irqsave(&ep->lock, flags); + + writel(index, ramdac + RAMDAC_INDEX); + writel(val, ramdac + RAMDAC_DATA); + + spin_unlock_irqrestore(&ep->lock, flags); +} + +static int e3d_setcolreg(unsigned regno, + unsigned red, unsigned green, unsigned blue, + unsigned transp, struct fb_info *info) +{ + struct e3d_info *ep = info->par; + u32 red_8, green_8, blue_8; + u32 red_10, green_10, blue_10; + u32 value; + + if (regno >= 256) + return 1; + + red_8 = red >> 8; + green_8 = green >> 8; + blue_8 = blue >> 8; + + value = (blue_8 << 24) | (green_8 << 16) | (red_8 << 8); + + if (info->fix.visual == FB_VISUAL_TRUECOLOR && regno < 16) + ((u32 *)info->pseudo_palette)[regno] = value; + + + red_10 = red >> 6; + green_10 = green >> 6; + blue_10 = blue >> 6; + + value = (blue_10 << 20) | (green_10 << 10) | (red_10 << 0); + e3d_clut_write(ep, regno, value); + + return 0; +} + +/* XXX This is a bit of a hack. I can't figure out exactly how the + * XXX two 8bpp areas of the framebuffer work. I imagine there is + * XXX a WID attribute somewhere else in the framebuffer which tells + * XXX the ramdac which of the two 8bpp framebuffer regions to take + * XXX the pixel from. So, for now, render into both regions to make + * XXX sure the pixel shows up. + */ +static void e3d_imageblit(struct fb_info *info, const struct fb_image *image) +{ + struct e3d_info *ep = info->par; + unsigned long flags; + + spin_lock_irqsave(&ep->lock, flags); + cfb_imageblit(info, image); + info->screen_base += ep->fb8_buf_diff; + cfb_imageblit(info, image); + info->screen_base -= ep->fb8_buf_diff; + spin_unlock_irqrestore(&ep->lock, flags); +} + +static void e3d_fillrect(struct fb_info *info, const struct fb_fillrect *rect) +{ + struct e3d_info *ep = info->par; + unsigned long flags; + + spin_lock_irqsave(&ep->lock, flags); + cfb_fillrect(info, rect); + info->screen_base += ep->fb8_buf_diff; + cfb_fillrect(info, rect); + info->screen_base -= ep->fb8_buf_diff; + spin_unlock_irqrestore(&ep->lock, flags); +} + +static void e3d_copyarea(struct fb_info *info, const struct fb_copyarea *area) +{ + struct e3d_info *ep = info->par; + unsigned long flags; + + spin_lock_irqsave(&ep->lock, flags); + cfb_copyarea(info, area); + info->screen_base += ep->fb8_buf_diff; + cfb_copyarea(info, area); + info->screen_base -= ep->fb8_buf_diff; + spin_unlock_irqrestore(&ep->lock, flags); +} + +static const struct fb_ops e3d_ops = { + .owner = THIS_MODULE, + .fb_setcolreg = e3d_setcolreg, + .fb_fillrect = e3d_fillrect, + .fb_copyarea = e3d_copyarea, + .fb_imageblit = e3d_imageblit, +}; + +static int e3d_set_fbinfo(struct e3d_info *ep) +{ + struct fb_info *info = ep->info; + struct fb_var_screeninfo *var = &info->var; + + info->flags = FBINFO_DEFAULT; + info->fbops = &e3d_ops; + info->screen_base = ep->fb_base; + info->screen_size = ep->fb_size; + + info->pseudo_palette = ep->pseudo_palette; + + /* Fill fix common fields */ + strscpy(info->fix.id, "e3d", sizeof(info->fix.id)); + info->fix.smem_start = ep->fb_base_phys; + info->fix.smem_len = ep->fb_size; + info->fix.type = FB_TYPE_PACKED_PIXELS; + if (ep->depth == 32 || ep->depth == 24) + info->fix.visual = FB_VISUAL_TRUECOLOR; + else + info->fix.visual = FB_VISUAL_PSEUDOCOLOR; + + var->xres = ep->width; + var->yres = ep->height; + var->xres_virtual = var->xres; + var->yres_virtual = var->yres; + var->bits_per_pixel = ep->depth; + + var->red.offset = 8; + var->red.length = 8; + var->green.offset = 16; + var->green.length = 8; + var->blue.offset = 24; + var->blue.length = 8; + var->transp.offset = 0; + var->transp.length = 0; + + if (fb_alloc_cmap(&info->cmap, 256, 0)) { + printk(KERN_ERR "e3d: Cannot allocate color map.\n"); + return -ENOMEM; + } + + return 0; +} + +static int e3d_pci_register(struct pci_dev *pdev, + const struct pci_device_id *ent) +{ + struct device_node *of_node; + const char *device_type; + struct fb_info *info; + struct e3d_info *ep; + unsigned int line_length; + int err; + + err = aperture_remove_conflicting_pci_devices(pdev, "e3dfb"); + if (err) + return err; + + of_node = pci_device_to_OF_node(pdev); + if (!of_node) { + printk(KERN_ERR "e3d: Cannot find OF node of %s\n", + pci_name(pdev)); + return -ENODEV; + } + + device_type = of_get_property(of_node, "device_type", NULL); + if (!device_type) { + printk(KERN_INFO "e3d: Ignoring secondary output device " + "at %s\n", pci_name(pdev)); + return -ENODEV; + } + + err = pci_enable_device(pdev); + if (err < 0) { + printk(KERN_ERR "e3d: Cannot enable PCI device %s\n", + pci_name(pdev)); + goto err_out; + } + + info = framebuffer_alloc(sizeof(struct e3d_info), &pdev->dev); + if (!info) { + err = -ENOMEM; + goto err_disable; + } + + ep = info->par; + ep->info = info; + ep->pdev = pdev; + spin_lock_init(&ep->lock); + ep->of_node = of_node; + + /* Read the PCI base register of the frame buffer, which we + * need in order to interpret the RAMDAC_VID_*FB* values in + * the ramdac correctly. + */ + pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, + &ep->fb_base_reg); + ep->fb_base_reg &= PCI_BASE_ADDRESS_MEM_MASK; + + ep->regs_base_phys = pci_resource_start (pdev, 1); + err = pci_request_region(pdev, 1, "e3d regs"); + if (err < 0) { + printk("e3d: Cannot request region 1 for %s\n", + pci_name(pdev)); + goto err_release_fb; + } + ep->ramdac = ioremap(ep->regs_base_phys + 0x8000, 0x1000); + if (!ep->ramdac) { + err = -ENOMEM; + goto err_release_pci1; + } + + ep->fb8_0_off = readl(ep->ramdac + RAMDAC_VID_8FB_0); + ep->fb8_0_off -= ep->fb_base_reg; + + ep->fb8_1_off = readl(ep->ramdac + RAMDAC_VID_8FB_1); + ep->fb8_1_off -= ep->fb_base_reg; + + ep->fb8_buf_diff = ep->fb8_1_off - ep->fb8_0_off; + + ep->fb_base_phys = pci_resource_start (pdev, 0); + ep->fb_base_phys += ep->fb8_0_off; + + err = pci_request_region(pdev, 0, "e3d framebuffer"); + if (err < 0) { + printk("e3d: Cannot request region 0 for %s\n", + pci_name(pdev)); + goto err_unmap_ramdac; + } + + err = e3d_get_props(ep); + if (err) + goto err_release_pci0; + + line_length = (readl(ep->ramdac + RAMDAC_VID_CFG) >> 16) & 0xff; + line_length = 1 << line_length; + + switch (ep->depth) { + case 8: + info->fix.line_length = line_length; + break; + case 16: + info->fix.line_length = line_length * 2; + break; + case 24: + info->fix.line_length = line_length * 3; + break; + case 32: + info->fix.line_length = line_length * 4; + break; + } + ep->fb_size = info->fix.line_length * ep->height; + + ep->fb_base = ioremap(ep->fb_base_phys, ep->fb_size); + if (!ep->fb_base) { + err = -ENOMEM; + goto err_release_pci0; + } + + err = e3d_set_fbinfo(ep); + if (err) + goto err_unmap_fb; + + pci_set_drvdata(pdev, info); + + printk("e3d: Found device at %s\n", pci_name(pdev)); + + err = register_framebuffer(info); + if (err < 0) { + printk(KERN_ERR "e3d: Could not register framebuffer %s\n", + pci_name(pdev)); + goto err_free_cmap; + } + + return 0; + +err_free_cmap: + fb_dealloc_cmap(&info->cmap); + +err_unmap_fb: + iounmap(ep->fb_base); + +err_release_pci0: + pci_release_region(pdev, 0); + +err_unmap_ramdac: + iounmap(ep->ramdac); + +err_release_pci1: + pci_release_region(pdev, 1); + +err_release_fb: + framebuffer_release(info); + +err_disable: + pci_disable_device(pdev); + +err_out: + return err; +} + +static const struct pci_device_id e3d_pci_table[] = { + { PCI_DEVICE(PCI_VENDOR_ID_3DLABS, 0x7a0), }, + { PCI_DEVICE(0x1091, 0x7a0), }, + { PCI_DEVICE(PCI_VENDOR_ID_3DLABS, 0x7a2), }, + { .vendor = PCI_VENDOR_ID_3DLABS, + .device = PCI_ANY_ID, + .subvendor = PCI_VENDOR_ID_3DLABS, + .subdevice = 0x0108, + }, + { .vendor = PCI_VENDOR_ID_3DLABS, + .device = PCI_ANY_ID, + .subvendor = PCI_VENDOR_ID_3DLABS, + .subdevice = 0x0140, + }, + { .vendor = PCI_VENDOR_ID_3DLABS, + .device = PCI_ANY_ID, + .subvendor = PCI_VENDOR_ID_3DLABS, + .subdevice = 0x1024, + }, + { 0, } +}; + +static struct pci_driver e3d_driver = { + .driver = { + .suppress_bind_attrs = true, + }, + .name = "e3d", + .id_table = e3d_pci_table, + .probe = e3d_pci_register, +}; + +static int __init e3d_init(void) +{ + if (fb_modesetting_disabled("e3d")) + return -ENODEV; + + if (fb_get_options("e3d", NULL)) + return -ENODEV; + + return pci_register_driver(&e3d_driver); +} +device_initcall(e3d_init); -- cgit v1.2.3