Merge tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-nextgrafted

Pull networking updates from Jakub Kicinski:
 "Core:

   - Add dedicated kmem_cache for typical/small skb->head, avoid having
     to access struct page at kfree time, and improve memory use.

   - Introduce sysctl to set default RPS configuration for new netdevs.

   - Define Netlink protocol specification format which can be used to
     describe messages used by each family and auto-generate parsers.
     Add tools for generating kernel data structures and uAPI headers.

   - Expose all net/core sysctls inside netns.

   - Remove 4s sleep in netpoll if carrier is instantly detected on
     boot.

   - Add configurable limit of MDB entries per port, and port-vlan.

   - Continue populating drop reasons throughout the stack.

   - Retire a handful of legacy Qdiscs and classifiers.

  Protocols:

   - Support IPv4 big TCP (TSO frames larger than 64kB).

   - Add IP_LOCAL_PORT_RANGE socket option, to control local port range
     on socket by socket basis.

   - Track and report in procfs number of MPTCP sockets used.

   - Support mixing IPv4 and IPv6 flows in the in-kernel MPTCP path
     manager.

   - IPv6: don't check net.ipv6.route.max_size and rely on garbage
     collection to free memory (similarly to IPv4).

   - Support Penultimate Segment Pop (PSP) flavor in SRv6 (RFC8986).

   - ICMP: add per-rate limit counters.

   - Add support for user scanning requests in ieee802154.

   - Remove static WEP support.

   - Support minimal Wi-Fi 7 Extremely High Throughput (EHT) rate
     reporting.

   - WiFi 7 EHT channel puncturing support (client & AP).

  BPF:

   - Add a rbtree data structure following the "next-gen data structure"
     precedent set by recently added linked list, that is, by using
     kfunc + kptr instead of adding a new BPF map type.

   - Expose XDP hints via kfuncs with initial support for RX hash and
     timestamp metadata.

   - Add BPF_F_NO_TUNNEL_KEY extension to bpf_skb_set_tunnel_key to
     better support decap on GRE tunnel devices not operating in collect
     metadata.

   - Improve x86 JIT's codegen for PROBE_MEM runtime error checks.

   - Remove the need for trace_printk_lock for bpf_trace_printk and
     bpf_trace_vprintk helpers.

   - Extend libbpf's bpf_tracing.h support for tracing arguments of
     kprobes/uprobes and syscall as a special case.

   - Significantly reduce the search time for module symbols by
     livepatch and BPF.

   - Enable cpumasks to be used as kptrs, which is useful for tracing
     programs tracking which tasks end up running on which CPUs in
     different time intervals.

   - Add support for BPF trampoline on s390x and riscv64.

   - Add capability to export the XDP features supported by the NIC.

   - Add __bpf_kfunc tag for marking kernel functions as kfuncs.

   - Add cgroup.memory=nobpf kernel parameter option to disable BPF
     memory accounting for container environments.

  Netfilter:

   - Remove the CLUSTERIP target. It has been marked as obsolete for
     years, and we still have WARN splats wrt races of the out-of-band
     /proc interface installed by this target.

   - Add 'destroy' commands to nf_tables. They are identical to the
     existing 'delete' commands, but do not return an error if the
     referenced object (set, chain, rule...) did not exist.

  Driver API:

   - Improve cpumask_local_spread() locality to help NICs set the right
     IRQ affinity on AMD platforms.

   - Separate C22 and C45 MDIO bus transactions more clearly.

   - Introduce new DCB table to control DSCP rewrite on egress.

   - Support configuration of Physical Layer Collision Avoidance (PLCA)
     Reconciliation Sublayer (RS) (802.3cg-2019). Modern version of
     shared medium Ethernet.

   - Support for MAC Merge layer (IEEE 802.3-2018 clause 99). Allowing
     preemption of low priority frames by high priority frames.

   - Add support for controlling MACSec offload using netlink SET.

   - Rework devlink instance refcounts to allow registration and
     de-registration under the instance lock. Split the code into
     multiple files, drop some of the unnecessarily granular locks and
     factor out common parts of netlink operation handling.

   - Add TX frame aggregation parameters (for USB drivers).

   - Add a new attr TCA_EXT_WARN_MSG to report TC (offload) warning
     messages with notifications for debug.

   - Allow offloading of UDP NEW connections via act_ct.

   - Add support for per action HW stats in TC.

   - Support hardware miss to TC action (continue processing in SW from
     a specific point in the action chain).

   - Warn if old Wireless Extension user space interface is used with
     modern cfg80211/mac80211 drivers. Do not support Wireless
     Extensions for Wi-Fi 7 devices at all. Everyone should switch to
     using nl80211 interface instead.

   - Improve the CAN bit timing configuration. Use extack to return
     error messages directly to user space, update the SJW handling,
     including the definition of a new default value that will benefit
     CAN-FD controllers, by increasing their oscillator tolerance.

  New hardware / drivers:

   - Ethernet:
      - nVidia BlueField-3 support (control traffic driver)
      - Ethernet support for imx93 SoCs
      - Motorcomm yt8531 gigabit Ethernet PHY
      - onsemi NCN26000 10BASE-T1S PHY (with support for PLCA)
      - Microchip LAN8841 PHY (incl. cable diagnostics and PTP)
      - Amlogic gxl MDIO mux

   - WiFi:
      - RealTek RTL8188EU (rtl8xxxu)
      - Qualcomm Wi-Fi 7 devices (ath12k)

   - CAN:
      - Renesas R-Car V4H

  Drivers:

   - Bluetooth:
      - Set Per Platform Antenna Gain (PPAG) for Intel controllers.

   - Ethernet NICs:
      - Intel (1G, igc):
         - support TSN / Qbv / packet scheduling features of i226 model
      - Intel (100G, ice):
         - use GNSS subsystem instead of TTY
         - multi-buffer XDP support
         - extend support for GPIO pins to E823 devices
      - nVidia/Mellanox:
         - update the shared buffer configuration on PFC commands
         - implement PTP adjphase function for HW offset control
         - TC support for Geneve and GRE with VF tunnel offload
         - more efficient crypto key management method
         - multi-port eswitch support
      - Netronome/Corigine:
         - add DCB IEEE support
         - support IPsec offloading for NFP3800
      - Freescale/NXP (enetc):
         - support XDP_REDIRECT for XDP non-linear buffers
         - improve reconfig, avoid link flap and waiting for idle
         - support MAC Merge layer
      - Other NICs:
         - sfc/ef100: add basic devlink support for ef100
         - ionic: rx_push mode operation (writing descriptors via MMIO)
         - bnxt: use the auxiliary bus abstraction for RDMA
         - r8169: disable ASPM and reset bus in case of tx timeout
         - cpsw: support QSGMII mode for J721e CPSW9G
         - cpts: support pulse-per-second output
         - ngbe: add an mdio bus driver
         - usbnet: optimize usbnet_bh() by avoiding unnecessary queuing
         - r8152: handle devices with FW with NCM support
         - amd-xgbe: support 10Mbps, 2.5GbE speeds and rx-adaptation
         - virtio-net: support multi buffer XDP
         - virtio/vsock: replace virtio_vsock_pkt with sk_buff
         - tsnep: XDP support

   - Ethernet high-speed switches:
      - nVidia/Mellanox (mlxsw):
         - add support for latency TLV (in FW control messages)
      - Microchip (sparx5):
         - separate explicit and implicit traffic forwarding rules, make
           the implicit rules always active
         - add support for egress DSCP rewrite
         - IS0 VCAP support (Ingress Classification)
         - IS2 VCAP filters (protos, L3 addrs, L4 ports, flags, ToS
           etc.)
         - ES2 VCAP support (Egress Access Control)
         - support for Per-Stream Filtering and Policing (802.1Q,
           8.6.5.1)

   - Ethernet embedded switches:
      - Marvell (mv88e6xxx):
         - add MAB (port auth) offload support
         - enable PTP receive for mv88e6390
      - NXP (ocelot):
         - support MAC Merge layer
         - support for the the vsc7512 internal copper phys
      - Microchip:
         - lan9303: convert to PHYLINK
         - lan966x: support TC flower filter statistics
         - lan937x: PTP support for KSZ9563/KSZ8563 and LAN937x
         - lan937x: support Credit Based Shaper configuration
         - ksz9477: support Energy Efficient Ethernet
      - other:
         - qca8k: convert to regmap read/write API, use bulk operations
         - rswitch: Improve TX timestamp accuracy

   - Intel WiFi (iwlwifi):
      - EHT (Wi-Fi 7) rate reporting
      - STEP equalizer support: transfer some STEP (connection to radio
        on platforms with integrated wifi) related parameters from the
        BIOS to the firmware.

   - Qualcomm 802.11ax WiFi (ath11k):
      - IPQ5018 support
      - Fine Timing Measurement (FTM) responder role support
      - channel 177 support

   - MediaTek WiFi (mt76):
      - per-PHY LED support
      - mt7996: EHT (Wi-Fi 7) support
      - Wireless Ethernet Dispatch (WED) reset support
      - switch to using page pool allocator

   - RealTek WiFi (rtw89):
      - support new version of Bluetooth co-existance

   - Mobile:
      - rmnet: support TX aggregation"

* tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1872 commits)
  page_pool: add a comment explaining the fragment counter usage
  net: ethtool: fix __ethtool_dev_mm_supported() implementation
  ethtool: pse-pd: Fix double word in comments
  xsk: add linux/vmalloc.h to xsk.c
  sefltests: netdevsim: wait for devlink instance after netns removal
  selftest: fib_tests: Always cleanup before exit
  net/mlx5e: Align IPsec ASO result memory to be as required by hardware
  net/mlx5e: TC, Set CT miss to the specific ct action instance
  net/mlx5e: Rename CHAIN_TO_REG to MAPPED_OBJ_TO_REG
  net/mlx5: Refactor tc miss handling to a single function
  net/mlx5: Kconfig: Make tc offload depend on tc skb extension
  net/sched: flower: Support hardware miss to tc action
  net/sched: flower: Move filter handle initialization earlier
  net/sched: cls_api: Support hardware miss to tc action
  net/sched: Rename user cookie and act cookie
  sfc: fix builds without CONFIG_RTC_LIB
  sfc: clean up some inconsistent indentings
  net/mlx4_en: Introduce flexible array to silence overflow warning
  net: lan966x: Fix possible deadlock inside PTP
  net/ulp: Remove redundant ->clone() test in inet_clone_ulp().
  ...

1 files changed, 779 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/am33xx-clocks.dtsi b/arch/arm/boot/dts/am33xx-clocks.dtsi
new file mode 100644
index 000000000..d34483ae1
--- /dev/null
+++ b/arch/arm/boot/dts/am33xx-clocks.dtsi
@@ -0,0 +1,779 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Device Tree Source for AM33xx clock data
+ *
+ * Copyright (C) 2013 Texas Instruments, Inc.
+ */
+&scm_clocks {
+	sys_clkin_ck: clock-sys-clkin-22@40 {
+		#clock-cells = <0>;
+		compatible = "ti,mux-clock";
+		clock-output-names = "sys_clkin_ck";
+		clocks = <&virt_19200000_ck>, <&virt_24000000_ck>, <&virt_25000000_ck>, <&virt_26000000_ck>;
+		ti,bit-shift = <22>;
+		reg = <0x0040>;
+	};
+
+	adc_tsc_fck: clock-adc-tsc-fck {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-output-names = "adc_tsc_fck";
+		clocks = <&sys_clkin_ck>;
+		clock-mult = <1>;
+		clock-div = <1>;
+	};
+
+	dcan0_fck: clock-dcan0-fck {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-output-names = "dcan0_fck";
+		clocks = <&sys_clkin_ck>;
+		clock-mult = <1>;
+		clock-div = <1>;
+	};
+
+	dcan1_fck: clock-dcan1-fck {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-output-names = "dcan1_fck";
+		clocks = <&sys_clkin_ck>;
+		clock-mult = <1>;
+		clock-div = <1>;
+	};
+
+	mcasp0_fck: clock-mcasp0-fck {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-output-names = "mcasp0_fck";
+		clocks = <&sys_clkin_ck>;
+		clock-mult = <1>;
+		clock-div = <1>;
+	};
+
+	mcasp1_fck: clock-mcasp1-fck {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-output-names = "mcasp1_fck";
+		clocks = <&sys_clkin_ck>;
+		clock-mult = <1>;
+		clock-div = <1>;
+	};
+
+	smartreflex0_fck: clock-smartreflex0-fck {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-output-names = "smartreflex0_fck";
+		clocks = <&sys_clkin_ck>;
+		clock-mult = <1>;
+		clock-div = <1>;
+	};
+
+	smartreflex1_fck: clock-smartreflex1-fck {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-output-names = "smartreflex1_fck";
+		clocks = <&sys_clkin_ck>;
+		clock-mult = <1>;
+		clock-div = <1>;
+	};
+
+	sha0_fck: clock-sha0-fck {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-output-names = "sha0_fck";
+		clocks = <&sys_clkin_ck>;
+		clock-mult = <1>;
+		clock-div = <1>;
+	};
+
+	aes0_fck: clock-aes0-fck {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-output-names = "aes0_fck";
+		clocks = <&sys_clkin_ck>;
+		clock-mult = <1>;
+		clock-div = <1>;
+	};
+
+	rng_fck: clock-rng-fck {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-output-names = "rng_fck";
+		clocks = <&sys_clkin_ck>;
+		clock-mult = <1>;
+		clock-div = <1>;
+	};
+
+	clock@664 {
+		compatible = "ti,clksel";
+		reg = <0x664>;
+		#clock-cells = <2>;
+		#address-cells = <0>;
+
+		ehrpwm0_tbclk: clock-ehrpwm0-tbclk {
+			#clock-cells = <0>;
+			compatible = "ti,gate-clock";
+			clock-output-names = "ehrpwm0_tbclk";
+			clocks = <&l4ls_gclk>;
+			ti,bit-shift = <0>;
+		};
+
+		ehrpwm1_tbclk: clock-ehrpwm1-tbclk {
+			#clock-cells = <0>;
+			compatible = "ti,gate-clock";
+			clock-output-names = "ehrpwm1_tbclk";
+			clocks = <&l4ls_gclk>;
+			ti,bit-shift = <1>;
+		};
+
+		ehrpwm2_tbclk: clock-ehrpwm2-tbclk {
+			#clock-cells = <0>;
+			compatible = "ti,gate-clock";
+			clock-output-names = "ehrpwm2_tbclk";
+			clocks = <&l4ls_gclk>;
+			ti,bit-shift = <2>;
+		};
+	};
+};
+&prcm_clocks {
+	clk_32768_ck: clock-clk-32768 {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-output-names = "clk_32768_ck";
+		clock-frequency = <32768>;
+	};
+
+	clk_rc32k_ck: clock-clk-rc32k {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-output-names = "clk_rc32k_ck";
+		clock-frequency = <32000>;
+	};
+
+	virt_19200000_ck: clock-virt-19200000 {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-output-names = "virt_19200000_ck";
+		clock-frequency = <19200000>;
+	};
+
+	virt_24000000_ck: clock-virt-24000000 {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-output-names = "virt_24000000_ck";
+		clock-frequency = <24000000>;
+	};
+
+	virt_25000000_ck: clock-virt-25000000 {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-output-names = "virt_25000000_ck";
+		clock-frequency = <25000000>;
+	};
+
+	virt_26000000_ck: clock-virt-26000000 {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-output-names = "virt_26000000_ck";
+		clock-frequency = <26000000>;
+	};
+
+	tclkin_ck: clock-tclkin {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-output-names = "tclkin_ck";
+		clock-frequency = <12000000>;
+	};
+
+	dpll_core_ck: clock@490 {
+		#clock-cells = <0>;
+		compatible = "ti,am3-dpll-core-clock";
+		clock-output-names = "dpll_core_ck";
+		clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
+		reg = <0x0490>, <0x045c>, <0x0468>, <0x0460>, <0x0464>;
+	};
+
+	dpll_core_x2_ck: clock-dpll-core-x2 {
+		#clock-cells = <0>;
+		compatible = "ti,am3-dpll-x2-clock";
+		clock-output-names = "dpll_core_x2_ck";
+		clocks = <&dpll_core_ck>;
+	};
+
+	dpll_core_m4_ck: clock-dpll-core-m4@480 {
+		#clock-cells = <0>;
+		compatible = "ti,divider-clock";
+		clock-output-names = "dpll_core_m4_ck";
+		clocks = <&dpll_core_x2_ck>;
+		ti,max-div = <31>;
+		reg = <0x0480>;
+		ti,index-starts-at-one;
+	};
+
+	dpll_core_m5_ck: clock-dpll-core-m5@484 {
+		#clock-cells = <0>;
+		compatible = "ti,divider-clock";
+		clock-output-names = "dpll_core_m5_ck";
+		clocks = <&dpll_core_x2_ck>;
+		ti,max-div = <31>;
+		reg = <0x0484>;
+		ti,index-starts-at-one;
+	};
+
+	dpll_core_m6_ck: clock-dpll-core-m6@4d8 {
+		#clock-cells = <0>;
+		compatible = "ti,divider-clock";
+		clock-output-names = "dpll_core_m6_ck";
+		clocks = <&dpll_core_x2_ck>;
+		ti,max-div = <31>;
+		reg = <0x04d8>;
+		ti,index-starts-at-one;
+	};
+
+	dpll_mpu_ck: clock@488 {
+		#clock-cells = <0>;
+		compatible = "ti,am3-dpll-clock";
+		clock-output-names = "dpll_mpu_ck";
+		clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
+		reg = <0x0488>, <0x0420>, <0x042c>, <0x0424>, <0x0428>;
+	};
+
+	dpll_mpu_m2_ck: clock-dpll-mpu-m2@4a8 {
+		#clock-cells = <0>;
+		compatible = "ti,divider-clock";
+		clock-output-names = "dpll_mpu_m2_ck";
+		clocks = <&dpll_mpu_ck>;
+		ti,max-div = <31>;
+		reg = <0x04a8>;
+		ti,index-starts-at-one;
+	};
+
+	dpll_ddr_ck: clock@494 {
+		#clock-cells = <0>;
+		compatible = "ti,am3-dpll-no-gate-clock";
+		clock-output-names = "dpll_ddr_ck";
+		clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
+		reg = <0x0494>, <0x0434>, <0x0440>, <0x0438>, <0x043c>;
+	};
+
+	dpll_ddr_m2_ck: clock-dpll-ddr-m2@4a0 {
+		#clock-cells = <0>;
+		compatible = "ti,divider-clock";
+		clock-output-names = "dpll_ddr_m2_ck";
+		clocks = <&dpll_ddr_ck>;
+		ti,max-div = <31>;
+		reg = <0x04a0>;
+		ti,index-starts-at-one;
+	};
+
+	dpll_ddr_m2_div2_ck: clock-dpll-ddr-m2-div2 {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-output-names = "dpll_ddr_m2_div2_ck";
+		clocks = <&dpll_ddr_m2_ck>;
+		clock-mult = <1>;
+		clock-div = <2>;
+	};
+
+	dpll_disp_ck: clock@498 {
+		#clock-cells = <0>;
+		compatible = "ti,am3-dpll-no-gate-clock";
+		clock-output-names = "dpll_disp_ck";
+		clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
+		reg = <0x0498>, <0x0448>, <0x0454>, <0x044c>, <0x0450>;
+	};
+
+	dpll_disp_m2_ck: clock-dpll-disp-m2@4a4 {
+		#clock-cells = <0>;
+		compatible = "ti,divider-clock";
+		clock-output-names = "dpll_disp_m2_ck";
+		clocks = <&dpll_disp_ck>;
+		ti,max-div = <31>;
+		reg = <0x04a4>;
+		ti,index-starts-at-one;
+		ti,set-rate-parent;
+	};
+
+	dpll_per_ck: clock@48c {
+		#clock-cells = <0>;
+		compatible = "ti,am3-dpll-no-gate-j-type-clock";
+		clock-output-names = "dpll_per_ck";
+		clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
+		reg = <0x048c>, <0x0470>, <0x049c>, <0x0474>, <0x0478>;
+	};
+
+	dpll_per_m2_ck: clock-dpll-per-m2@4ac {
+		#clock-cells = <0>;
+		compatible = "ti,divider-clock";
+		clock-output-names = "dpll_per_m2_ck";
+		clocks = <&dpll_per_ck>;
+		ti,max-div = <31>;
+		reg = <0x04ac>;
+		ti,index-starts-at-one;
+	};
+
+	dpll_per_m2_div4_wkupdm_ck: clock-dpll-per-m2-div4-wkupdm {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-output-names = "dpll_per_m2_div4_wkupdm_ck";
+		clocks = <&dpll_per_m2_ck>;
+		clock-mult = <1>;
+		clock-div = <4>;
+	};
+
+	dpll_per_m2_div4_ck: clock-dpll-per-m2-div4 {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-output-names = "dpll_per_m2_div4_ck";
+		clocks = <&dpll_per_m2_ck>;
+		clock-mult = <1>;
+		clock-div = <4>;
+	};
+
+	clk_24mhz: clock-clk-24mhz {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-output-names = "clk_24mhz";
+		clocks = <&dpll_per_m2_ck>;
+		clock-mult = <1>;
+		clock-div = <8>;
+	};
+
+	clkdiv32k_ck: clock-clkdiv32k {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-output-names = "clkdiv32k_ck";
+		clocks = <&clk_24mhz>;
+		clock-mult = <1>;
+		clock-div = <732>;
+	};
+
+	l3_gclk: clock-l3-gclk {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-output-names = "l3_gclk";
+		clocks = <&dpll_core_m4_ck>;
+		clock-mult = <1>;
+		clock-div = <1>;
+	};
+
+	pruss_ocp_gclk: clock-pruss-ocp-gclk@530 {
+		#clock-cells = <0>;
+		compatible = "ti,mux-clock";
+		clock-output-names = "pruss_ocp_gclk";
+		clocks = <&l3_gclk>, <&dpll_disp_m2_ck>;
+		reg = <0x0530>;
+	};
+
+	mmu_fck: clock-mmu-fck-1@914 {
+		#clock-cells = <0>;
+		compatible = "ti,gate-clock";
+		clock-output-names = "mmu_fck";
+		clocks = <&dpll_core_m4_ck>;
+		ti,bit-shift = <1>;
+		reg = <0x0914>;
+	};
+
+	timer1_fck: clock-timer1-fck@528 {
+		#clock-cells = <0>;
+		compatible = "ti,mux-clock";
+		clock-output-names = "timer1_fck";
+		clocks = <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>, <&tclkin_ck>, <&clk_rc32k_ck>, <&clk_32768_ck>;
+		reg = <0x0528>;
+	};
+
+	timer2_fck: clock-timer2-fck@508 {
+		#clock-cells = <0>;
+		compatible = "ti,mux-clock";
+		clock-output-names = "timer2_fck";
+		clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
+		reg = <0x0508>;
+	};
+
+	timer3_fck: clock-timer3-fck@50c {
+		#clock-cells = <0>;
+		compatible = "ti,mux-clock";
+		clock-output-names = "timer3_fck";
+		clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
+		reg = <0x050c>;
+	};
+
+	timer4_fck: clock-timer4-fck@510 {
+		#clock-cells = <0>;
+		compatible = "ti,mux-clock";
+		clock-output-names = "timer4_fck";
+		clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
+		reg = <0x0510>;
+	};
+
+	timer5_fck: clock-timer5-fck@518 {
+		#clock-cells = <0>;
+		compatible = "ti,mux-clock";
+		clock-output-names = "timer5_fck";
+		clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
+		reg = <0x0518>;
+	};
+
+	timer6_fck: clock-timer6-fck@51c {
+		#clock-cells = <0>;
+		compatible = "ti,mux-clock";
+		clock-output-names = "timer6_fck";
+		clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
+		reg = <0x051c>;
+	};
+
+	timer7_fck: clock-timer7-fck@504 {
+		#clock-cells = <0>;
+		compatible = "ti,mux-clock";
+		clock-output-names = "timer7_fck";
+		clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
+		reg = <0x0504>;
+	};
+
+	usbotg_fck: clock-usbotg-fck-8@47c {
+		#clock-cells = <0>;
+		compatible = "ti,gate-clock";
+		clock-output-names = "usbotg_fck";
+		clocks = <&dpll_per_ck>;
+		ti,bit-shift = <8>;
+		reg = <0x047c>;
+	};
+
+	dpll_core_m4_div2_ck: clock-dpll-core-m4-div2 {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-output-names = "dpll_core_m4_div2_ck";
+		clocks = <&dpll_core_m4_ck>;
+		clock-mult = <1>;
+		clock-div = <2>;
+	};
+
+	ieee5000_fck: clock-ieee5000-fck-1@e4 {
+		#clock-cells = <0>;
+		compatible = "ti,gate-clock";
+		clock-output-names = "ieee5000_fck";
+		clocks = <&dpll_core_m4_div2_ck>;
+		ti,bit-shift = <1>;
+		reg = <0x00e4>;
+	};
+
+	wdt1_fck: clock-wdt1-fck@538 {
+		#clock-cells = <0>;
+		compatible = "ti,mux-clock";
+		clock-output-names = "wdt1_fck";
+		clocks = <&clk_rc32k_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
+		reg = <0x0538>;
+	};
+
+	l4_rtc_gclk: clock-l4-rtc-gclk {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-output-names = "l4_rtc_gclk";
+		clocks = <&dpll_core_m4_ck>;
+		clock-mult = <1>;
+		clock-div = <2>;
+	};
+
+	l4hs_gclk: clock-l4hs-gclk {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-output-names = "l4hs_gclk";
+		clocks = <&dpll_core_m4_ck>;
+		clock-mult = <1>;
+		clock-div = <1>;
+	};
+
+	l3s_gclk: clock-l3s-gclk {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-output-names = "l3s_gclk";
+		clocks = <&dpll_core_m4_div2_ck>;
+		clock-mult = <1>;
+		clock-div = <1>;
+	};
+
+	l4fw_gclk: clock-l4fw-gclk {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-output-names = "l4fw_gclk";
+		clocks = <&dpll_core_m4_div2_ck>;
+		clock-mult = <1>;
+		clock-div = <1>;
+	};
+
+	l4ls_gclk: clock-l4ls-gclk {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-output-names = "l4ls_gclk";
+		clocks = <&dpll_core_m4_div2_ck>;
+		clock-mult = <1>;
+		clock-div = <1>;
+	};
+
+	sysclk_div_ck: clock-sysclk-div {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-output-names = "sysclk_div_ck";
+		clocks = <&dpll_core_m4_ck>;
+		clock-mult = <1>;
+		clock-div = <1>;
+	};
+
+	cpsw_125mhz_gclk: clock-cpsw-125mhz-gclk {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-output-names = "cpsw_125mhz_gclk";
+		clocks = <&dpll_core_m5_ck>;
+		clock-mult = <1>;
+		clock-div = <2>;
+	};
+
+	cpsw_cpts_rft_clk: clock-cpsw-cpts-rft@520 {
+		#clock-cells = <0>;
+		compatible = "ti,mux-clock";
+		clock-output-names = "cpsw_cpts_rft_clk";
+		clocks = <&dpll_core_m5_ck>, <&dpll_core_m4_ck>;
+		reg = <0x0520>;
+	};
+
+	gpio0_dbclk_mux_ck: clock-gpio0-dbclk-mux@53c {
+		#clock-cells = <0>;
+		compatible = "ti,mux-clock";
+		clock-output-names = "gpio0_dbclk_mux_ck";
+		clocks = <&clk_rc32k_ck>, <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
+		reg = <0x053c>;
+	};
+
+	lcd_gclk: clock-lcd-gclk@534 {
+		#clock-cells = <0>;
+		compatible = "ti,mux-clock";
+		clock-output-names = "lcd_gclk";
+		clocks = <&dpll_disp_m2_ck>, <&dpll_core_m5_ck>, <&dpll_per_m2_ck>;
+		reg = <0x0534>;
+		ti,set-rate-parent;
+	};
+
+	mmc_clk: clock-mmc {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-output-names = "mmc_clk";
+		clocks = <&dpll_per_m2_ck>;
+		clock-mult = <1>;
+		clock-div = <2>;
+	};
+
+	clock@52c {
+		compatible = "ti,clksel";
+		reg = <0x52c>;
+		#clock-cells = <2>;
+		#address-cells = <0>;
+
+		gfx_fclk_clksel_ck: clock-gfx-fclk-clksel {
+			#clock-cells = <0>;
+			compatible = "ti,mux-clock";
+			clock-output-names = "gfx_fclk_clksel_ck";
+			clocks = <&dpll_core_m4_ck>, <&dpll_per_m2_ck>;
+			ti,bit-shift = <1>;
+		};
+
+		gfx_fck_div_ck: clock-gfx-fck-div {
+			#clock-cells = <0>;
+			compatible = "ti,divider-clock";
+			clock-output-names = "gfx_fck_div_ck";
+			clocks = <&gfx_fclk_clksel_ck>;
+			ti,max-div = <2>;
+		};
+	};
+
+	clock@700 {
+		compatible = "ti,clksel";
+		reg = <0x700>;
+		#clock-cells = <2>;
+		#address-cells = <0>;
+
+		sysclkout_pre_ck: clock-sysclkout-pre {
+			#clock-cells = <0>;
+			compatible = "ti,mux-clock";
+			clock-output-names = "sysclkout_pre_ck";
+			clocks = <&clk_32768_ck>, <&l3_gclk>, <&dpll_ddr_m2_ck>, <&dpll_per_m2_ck>, <&lcd_gclk>;
+		};
+
+		clkout2_div_ck: clock-clkout2-div {
+			#clock-cells = <0>;
+			compatible = "ti,divider-clock";
+			clock-output-names = "clkout2_div_ck";
+			clocks = <&sysclkout_pre_ck>;
+			ti,bit-shift = <3>;
+			ti,max-div = <8>;
+		};
+
+		clkout2_ck: clock-clkout2 {
+			#clock-cells = <0>;
+			compatible = "ti,gate-clock";
+			clock-output-names = "clkout2_ck";
+			clocks = <&clkout2_div_ck>;
+			ti,bit-shift = <7>;
+		};
+	};
+};
+
+&prcm {
+	per_cm: clock@0 {
+		compatible = "ti,omap4-cm";
+		clock-output-names = "per_cm";
+		reg = <0x0 0x400>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x0 0x400>;
+
+		l4ls_clkctrl: clock@38 {
+			compatible = "ti,clkctrl";
+			clock-output-names = "l4ls_clkctrl";
+			reg = <0x38 0x2c>, <0x6c 0x28>, <0xac 0xc>, <0xc0 0x1c>, <0xec 0xc>, <0x10c 0x8>, <0x130 0x4>;
+			#clock-cells = <2>;
+		};
+
+		l3s_clkctrl: clock@1c {
+			compatible = "ti,clkctrl";
+			clock-output-names = "l3s_clkctrl";
+			reg = <0x1c 0x4>, <0x30 0x8>, <0x68 0x4>, <0xf8 0x4>;
+			#clock-cells = <2>;
+		};
+
+		l3_clkctrl: clock@24 {
+			compatible = "ti,clkctrl";
+			clock-output-names = "l3_clkctrl";
+			reg = <0x24 0xc>, <0x94 0x10>, <0xbc 0x4>, <0xdc 0x8>, <0xfc 0x8>;
+			#clock-cells = <2>;
+		};
+
+		l4hs_clkctrl: clock@120 {
+			compatible = "ti,clkctrl";
+			clock-output-names = "l4hs_clkctrl";
+			reg = <0x120 0x4>;
+			#clock-cells = <2>;
+		};
+
+		pruss_ocp_clkctrl: clock@e8 {
+			compatible = "ti,clkctrl";
+			clock-output-names = "pruss_ocp_clkctrl";
+			reg = <0xe8 0x4>;
+			#clock-cells = <2>;
+		};
+
+		cpsw_125mhz_clkctrl: clock@0 {
+			compatible = "ti,clkctrl";
+			clock-output-names = "cpsw_125mhz_clkctrl";
+			reg = <0x0 0x18>;
+			#clock-cells = <2>;
+		};
+
+		lcdc_clkctrl: clock@18 {
+			compatible = "ti,clkctrl";
+			clock-output-names = "lcdc_clkctrl";
+			reg = <0x18 0x4>;
+			#clock-cells = <2>;
+		};
+
+		clk_24mhz_clkctrl: clock@14c {
+			compatible = "ti,clkctrl";
+			clock-output-names = "clk_24mhz_clkctrl";
+			reg = <0x14c 0x4>;
+			#clock-cells = <2>;
+		};
+	};
+
+	wkup_cm: clock@400 {
+		compatible = "ti,omap4-cm";
+		clock-output-names = "wkup_cm";
+		reg = <0x400 0x100>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x400 0x100>;
+
+		l4_wkup_clkctrl: clock@0 {
+			compatible = "ti,clkctrl";
+			clock-output-names = "l4_wkup_clkctrl";
+			reg = <0x0 0x10>, <0xb4 0x24>;
+			#clock-cells = <2>;
+		};
+
+		l3_aon_clkctrl: clock@14 {
+			compatible = "ti,clkctrl";
+			clock-output-names = "l3_aon_clkctrl";
+			reg = <0x14 0x4>;
+			#clock-cells = <2>;
+		};
+
+		l4_wkup_aon_clkctrl: clock@b0 {
+			compatible = "ti,clkctrl";
+			clock-output-names = "l4_wkup_aon_clkctrl";
+			reg = <0xb0 0x4>;
+			#clock-cells = <2>;
+		};
+	};
+
+	mpu_cm: clock@600 {
+		compatible = "ti,omap4-cm";
+		clock-output-names = "mpu_cm";
+		reg = <0x600 0x100>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x600 0x100>;
+
+		mpu_clkctrl: clock@0 {
+			compatible = "ti,clkctrl";
+			clock-output-names = "mpu_clkctrl";
+			reg = <0x0 0x8>;
+			#clock-cells = <2>;
+		};
+	};
+
+	l4_rtc_cm: clock@800 {
+		compatible = "ti,omap4-cm";
+		clock-output-names = "l4_rtc_cm";
+		reg = <0x800 0x100>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x800 0x100>;
+
+		l4_rtc_clkctrl: clock@0 {
+			compatible = "ti,clkctrl";
+			clock-output-names = "l4_rtc_clkctrl";
+			reg = <0x0 0x4>;
+			#clock-cells = <2>;
+		};
+	};
+
+	gfx_l3_cm: clock@900 {
+		compatible = "ti,omap4-cm";
+		clock-output-names = "gfx_l3_cm";
+		reg = <0x900 0x100>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x900 0x100>;
+
+		gfx_l3_clkctrl: clock@0 {
+			compatible = "ti,clkctrl";
+			clock-output-names = "gfx_l3_clkctrl";
+			reg = <0x0 0x8>;
+			#clock-cells = <2>;
+		};
+	};
+
+	l4_cefuse_cm: clock@a00 {
+		compatible = "ti,omap4-cm";
+		clock-output-names = "l4_cefuse_cm";
+		reg = <0xa00 0x100>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0xa00 0x100>;
+
+		l4_cefuse_clkctrl: clock@0 {
+			compatible = "ti,clkctrl";
+			clock-output-names = "l4_cefuse_clkctrl";
+			reg = <0x0 0x24>;
+			#clock-cells = <2>;
+		};
+	};
+};