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authorLibravatar Linus Torvalds <torvalds@linux-foundation.org>2023-02-21 18:24:12 -0800
committerLibravatar Linus Torvalds <torvalds@linux-foundation.org>2023-02-21 18:24:12 -0800
commit5b7c4cabbb65f5c469464da6c5f614cbd7f730f2 (patch)
treecc5c2d0a898769fd59549594fedb3ee6f84e59a0 /arch/arm/boot/dts/nuvoton-npcm730-gbs.dts
downloadlinux-5b7c4cabbb65f5c469464da6c5f614cbd7f730f2.tar.gz
linux-5b7c4cabbb65f5c469464da6c5f614cbd7f730f2.zip
Merge tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-nextgrafted
Pull networking updates from Jakub Kicinski: "Core: - Add dedicated kmem_cache for typical/small skb->head, avoid having to access struct page at kfree time, and improve memory use. - Introduce sysctl to set default RPS configuration for new netdevs. - Define Netlink protocol specification format which can be used to describe messages used by each family and auto-generate parsers. Add tools for generating kernel data structures and uAPI headers. - Expose all net/core sysctls inside netns. - Remove 4s sleep in netpoll if carrier is instantly detected on boot. - Add configurable limit of MDB entries per port, and port-vlan. - Continue populating drop reasons throughout the stack. - Retire a handful of legacy Qdiscs and classifiers. Protocols: - Support IPv4 big TCP (TSO frames larger than 64kB). - Add IP_LOCAL_PORT_RANGE socket option, to control local port range on socket by socket basis. - Track and report in procfs number of MPTCP sockets used. - Support mixing IPv4 and IPv6 flows in the in-kernel MPTCP path manager. - IPv6: don't check net.ipv6.route.max_size and rely on garbage collection to free memory (similarly to IPv4). - Support Penultimate Segment Pop (PSP) flavor in SRv6 (RFC8986). - ICMP: add per-rate limit counters. - Add support for user scanning requests in ieee802154. - Remove static WEP support. - Support minimal Wi-Fi 7 Extremely High Throughput (EHT) rate reporting. - WiFi 7 EHT channel puncturing support (client & AP). BPF: - Add a rbtree data structure following the "next-gen data structure" precedent set by recently added linked list, that is, by using kfunc + kptr instead of adding a new BPF map type. - Expose XDP hints via kfuncs with initial support for RX hash and timestamp metadata. - Add BPF_F_NO_TUNNEL_KEY extension to bpf_skb_set_tunnel_key to better support decap on GRE tunnel devices not operating in collect metadata. - Improve x86 JIT's codegen for PROBE_MEM runtime error checks. - Remove the need for trace_printk_lock for bpf_trace_printk and bpf_trace_vprintk helpers. - Extend libbpf's bpf_tracing.h support for tracing arguments of kprobes/uprobes and syscall as a special case. - Significantly reduce the search time for module symbols by livepatch and BPF. - Enable cpumasks to be used as kptrs, which is useful for tracing programs tracking which tasks end up running on which CPUs in different time intervals. - Add support for BPF trampoline on s390x and riscv64. - Add capability to export the XDP features supported by the NIC. - Add __bpf_kfunc tag for marking kernel functions as kfuncs. - Add cgroup.memory=nobpf kernel parameter option to disable BPF memory accounting for container environments. Netfilter: - Remove the CLUSTERIP target. It has been marked as obsolete for years, and we still have WARN splats wrt races of the out-of-band /proc interface installed by this target. - Add 'destroy' commands to nf_tables. They are identical to the existing 'delete' commands, but do not return an error if the referenced object (set, chain, rule...) did not exist. Driver API: - Improve cpumask_local_spread() locality to help NICs set the right IRQ affinity on AMD platforms. - Separate C22 and C45 MDIO bus transactions more clearly. - Introduce new DCB table to control DSCP rewrite on egress. - Support configuration of Physical Layer Collision Avoidance (PLCA) Reconciliation Sublayer (RS) (802.3cg-2019). Modern version of shared medium Ethernet. - Support for MAC Merge layer (IEEE 802.3-2018 clause 99). Allowing preemption of low priority frames by high priority frames. - Add support for controlling MACSec offload using netlink SET. - Rework devlink instance refcounts to allow registration and de-registration under the instance lock. Split the code into multiple files, drop some of the unnecessarily granular locks and factor out common parts of netlink operation handling. - Add TX frame aggregation parameters (for USB drivers). - Add a new attr TCA_EXT_WARN_MSG to report TC (offload) warning messages with notifications for debug. - Allow offloading of UDP NEW connections via act_ct. - Add support for per action HW stats in TC. - Support hardware miss to TC action (continue processing in SW from a specific point in the action chain). - Warn if old Wireless Extension user space interface is used with modern cfg80211/mac80211 drivers. Do not support Wireless Extensions for Wi-Fi 7 devices at all. Everyone should switch to using nl80211 interface instead. - Improve the CAN bit timing configuration. Use extack to return error messages directly to user space, update the SJW handling, including the definition of a new default value that will benefit CAN-FD controllers, by increasing their oscillator tolerance. New hardware / drivers: - Ethernet: - nVidia BlueField-3 support (control traffic driver) - Ethernet support for imx93 SoCs - Motorcomm yt8531 gigabit Ethernet PHY - onsemi NCN26000 10BASE-T1S PHY (with support for PLCA) - Microchip LAN8841 PHY (incl. cable diagnostics and PTP) - Amlogic gxl MDIO mux - WiFi: - RealTek RTL8188EU (rtl8xxxu) - Qualcomm Wi-Fi 7 devices (ath12k) - CAN: - Renesas R-Car V4H Drivers: - Bluetooth: - Set Per Platform Antenna Gain (PPAG) for Intel controllers. - Ethernet NICs: - Intel (1G, igc): - support TSN / Qbv / packet scheduling features of i226 model - Intel (100G, ice): - use GNSS subsystem instead of TTY - multi-buffer XDP support - extend support for GPIO pins to E823 devices - nVidia/Mellanox: - update the shared buffer configuration on PFC commands - implement PTP adjphase function for HW offset control - TC support for Geneve and GRE with VF tunnel offload - more efficient crypto key management method - multi-port eswitch support - Netronome/Corigine: - add DCB IEEE support - support IPsec offloading for NFP3800 - Freescale/NXP (enetc): - support XDP_REDIRECT for XDP non-linear buffers - improve reconfig, avoid link flap and waiting for idle - support MAC Merge layer - Other NICs: - sfc/ef100: add basic devlink support for ef100 - ionic: rx_push mode operation (writing descriptors via MMIO) - bnxt: use the auxiliary bus abstraction for RDMA - r8169: disable ASPM and reset bus in case of tx timeout - cpsw: support QSGMII mode for J721e CPSW9G - cpts: support pulse-per-second output - ngbe: add an mdio bus driver - usbnet: optimize usbnet_bh() by avoiding unnecessary queuing - r8152: handle devices with FW with NCM support - amd-xgbe: support 10Mbps, 2.5GbE speeds and rx-adaptation - virtio-net: support multi buffer XDP - virtio/vsock: replace virtio_vsock_pkt with sk_buff - tsnep: XDP support - Ethernet high-speed switches: - nVidia/Mellanox (mlxsw): - add support for latency TLV (in FW control messages) - Microchip (sparx5): - separate explicit and implicit traffic forwarding rules, make the implicit rules always active - add support for egress DSCP rewrite - IS0 VCAP support (Ingress Classification) - IS2 VCAP filters (protos, L3 addrs, L4 ports, flags, ToS etc.) - ES2 VCAP support (Egress Access Control) - support for Per-Stream Filtering and Policing (802.1Q, 8.6.5.1) - Ethernet embedded switches: - Marvell (mv88e6xxx): - add MAB (port auth) offload support - enable PTP receive for mv88e6390 - NXP (ocelot): - support MAC Merge layer - support for the the vsc7512 internal copper phys - Microchip: - lan9303: convert to PHYLINK - lan966x: support TC flower filter statistics - lan937x: PTP support for KSZ9563/KSZ8563 and LAN937x - lan937x: support Credit Based Shaper configuration - ksz9477: support Energy Efficient Ethernet - other: - qca8k: convert to regmap read/write API, use bulk operations - rswitch: Improve TX timestamp accuracy - Intel WiFi (iwlwifi): - EHT (Wi-Fi 7) rate reporting - STEP equalizer support: transfer some STEP (connection to radio on platforms with integrated wifi) related parameters from the BIOS to the firmware. - Qualcomm 802.11ax WiFi (ath11k): - IPQ5018 support - Fine Timing Measurement (FTM) responder role support - channel 177 support - MediaTek WiFi (mt76): - per-PHY LED support - mt7996: EHT (Wi-Fi 7) support - Wireless Ethernet Dispatch (WED) reset support - switch to using page pool allocator - RealTek WiFi (rtw89): - support new version of Bluetooth co-existance - Mobile: - rmnet: support TX aggregation" * tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1872 commits) page_pool: add a comment explaining the fragment counter usage net: ethtool: fix __ethtool_dev_mm_supported() implementation ethtool: pse-pd: Fix double word in comments xsk: add linux/vmalloc.h to xsk.c sefltests: netdevsim: wait for devlink instance after netns removal selftest: fib_tests: Always cleanup before exit net/mlx5e: Align IPsec ASO result memory to be as required by hardware net/mlx5e: TC, Set CT miss to the specific ct action instance net/mlx5e: Rename CHAIN_TO_REG to MAPPED_OBJ_TO_REG net/mlx5: Refactor tc miss handling to a single function net/mlx5: Kconfig: Make tc offload depend on tc skb extension net/sched: flower: Support hardware miss to tc action net/sched: flower: Move filter handle initialization earlier net/sched: cls_api: Support hardware miss to tc action net/sched: Rename user cookie and act cookie sfc: fix builds without CONFIG_RTC_LIB sfc: clean up some inconsistent indentings net/mlx4_en: Introduce flexible array to silence overflow warning net: lan966x: Fix possible deadlock inside PTP net/ulp: Remove redundant ->clone() test in inet_clone_ulp(). ...
Diffstat (limited to 'arch/arm/boot/dts/nuvoton-npcm730-gbs.dts')
-rw-r--r--arch/arm/boot/dts/nuvoton-npcm730-gbs.dts1135
1 files changed, 1135 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/nuvoton-npcm730-gbs.dts b/arch/arm/boot/dts/nuvoton-npcm730-gbs.dts
new file mode 100644
index 000000000..9e9eba8ba
--- /dev/null
+++ b/arch/arm/boot/dts/nuvoton-npcm730-gbs.dts
@@ -0,0 +1,1135 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2020 Quanta Computer Inc. George.Hung@quantatw.com
+
+/dts-v1/;
+#include "nuvoton-npcm730.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Quanta GBS Board (Device Tree)";
+ compatible = "quanta,gbs-bmc","nuvoton,npcm730";
+
+ aliases {
+ ethernet1 = &gmac0;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ serial2 = &serial2;
+ serial3 = &serial3;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c4 = &i2c4;
+ i2c5 = &i2c5;
+ i2c6 = &i2c6;
+ i2c7 = &i2c7;
+ i2c8 = &i2c8;
+ i2c9 = &i2c9;
+ i2c10 = &i2c10;
+ i2c11 = &i2c11;
+ i2c12 = &i2c12;
+ i2c13 = &i2c13;
+ i2c14 = &i2c14;
+ i2c15 = &i2c15;
+ i2c16 = &i2c0_slotPE0_0;
+ i2c17 = &i2c0_slotPE1_1;
+ i2c18 = &i2c0_slotUSB_2;
+ i2c19 = &i2c0_3;
+ i2c20 = &i2c5_i2cool_0;
+ i2c21 = &i2c5_i2cool_1;
+ i2c22 = &i2c5_i2cool_2;
+ i2c23 = &i2c5_hsbp_fru_3;
+ i2c24 = &i2c6_u2_15_0;
+ i2c25 = &i2c6_u2_14_1;
+ i2c26 = &i2c6_u2_13_2;
+ i2c27 = &i2c6_u2_12_3;
+ i2c28 = &i2c7_u2_11_0;
+ i2c29 = &i2c7_u2_10_1;
+ i2c30 = &i2c7_u2_9_2;
+ i2c31 = &i2c7_u2_8_3;
+ i2c32 = &i2c9_vddcr_cpu;
+ i2c33 = &i2c9_vddcr_soc;
+ i2c34 = &i2c9_vddio_efgh;
+ i2c35 = &i2c9_vddio_abcd;
+ i2c36 = &i2c10_u2_7_0;
+ i2c37 = &i2c10_u2_6_1;
+ i2c38 = &i2c10_u2_5_2;
+ i2c39 = &i2c10_u2_4_3;
+ i2c40 = &i2c11_clk_buf0_0;
+ i2c41 = &i2c11_clk_buf1_1;
+ i2c42 = &i2c11_clk_buf2_2;
+ i2c43 = &i2c11_clk_buf3_3;
+ i2c44 = &i2c14_u2_3_0;
+ i2c45 = &i2c14_u2_2_1;
+ i2c46 = &i2c14_u2_1_2;
+ i2c47 = &i2c14_u2_0_3;
+ fiu0 = &fiu0;
+ fiu1 = &fiu3;
+ };
+
+ chosen {
+ stdout-path = &serial0;
+ };
+
+ memory {
+ reg = <0 0x40000000>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ sas-cable0 {
+ label = "sas-cable0";
+ gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
+ linux,code = <73>;
+ };
+
+ sas-cable1 {
+ label = "sas-cable1";
+ gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
+ linux,code = <72>;
+ };
+
+ sas-cable2 {
+ label = "sas-cable2";
+ gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
+ linux,code = <71>;
+ };
+
+ sas-cable3 {
+ label = "sas-cable3";
+ gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
+ linux,code = <70>;
+ };
+
+ sata0 {
+ label = "sata0";
+ gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
+ linux,code = <5>;
+ };
+
+ hsbp-cable {
+ label = "hsbp-cable";
+ gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
+ linux,code = <57>;
+ };
+
+ fanbd-cable {
+ label = "fanbd-cable";
+ gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
+ linux,code = <58>;
+ };
+
+ bp12v-cable {
+ label = "bp12v-cable";
+ gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
+ linux,code = <69>;
+ };
+
+ pe-slot0 {
+ label = "pe-slot0";
+ gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
+ linux,code = <120>;
+ };
+
+ pe-slot1 {
+ label = "pe-slot1";
+ gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
+ linux,code = <121>;
+ };
+ };
+
+ iio-hwmon {
+ compatible = "iio-hwmon";
+ io-channels = <&adc 1>, <&adc 2>;
+ };
+
+ iio-hwmon-battery {
+ compatible = "iio-hwmon";
+ io-channels = <&adc 0>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ heartbeat { /* gpio153 */
+ gpios = <&gpio4 25 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ attention { /* gpio215 */
+ gpios = <&gpio6 23 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ sys_boot_status { /* gpio216 */
+ gpios = <&gpio6 24 GPIO_ACTIVE_HIGH>;
+ default-state = "keep";
+ retain-state-shutdown;
+ };
+
+ bmc_fault { /* gpio217 */
+ gpios = <&gpio6 25 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ linux,default-trigger = "panic";
+ panic-indicator;
+ };
+
+ led_u2_0_locate {
+ gpios = <&pca9535_ledlocate 3 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_1_locate {
+ gpios = <&pca9535_ledlocate 2 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_2_locate {
+ gpios = <&pca9535_ledlocate 1 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_3_locate {
+ gpios = <&pca9535_ledlocate 0 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_4_locate {
+ gpios = <&pca9535_ledlocate 7 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_5_locate {
+ gpios = <&pca9535_ledlocate 6 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_6_locate {
+ gpios = <&pca9535_ledlocate 5 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_7_locate {
+ gpios = <&pca9535_ledlocate 4 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_8_locate {
+ gpios = <&pca9535_ledlocate 11 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_9_locate {
+ gpios = <&pca9535_ledlocate 10 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_10_locate {
+ gpios = <&pca9535_ledlocate 9 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_11_locate {
+ gpios = <&pca9535_ledlocate 8 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_12_locate {
+ gpios = <&pca9535_ledlocate 15 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_13_locate {
+ gpios = <&pca9535_ledlocate 14 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_14_locate {
+ gpios = <&pca9535_ledlocate 13 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_15_locate {
+ gpios = <&pca9535_ledlocate 12 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_0_fault {
+ gpios = <&pca9535_ledfault 3 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_1_fault {
+ gpios = <&pca9535_ledfault 2 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_2_fault {
+ gpios = <&pca9535_ledfault 1 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_3_fault {
+ gpios = <&pca9535_ledfault 0 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_4_fault {
+ gpios = <&pca9535_ledfault 7 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_5_fault {
+ gpios = <&pca9535_ledfault 6 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_6_fault {
+ gpios = <&pca9535_ledfault 5 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_7_fault {
+ gpios = <&pca9535_ledfault 4 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_8_fault {
+ gpios = <&pca9535_ledfault 11 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_9_fault {
+ gpios = <&pca9535_ledfault 10 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_10_fault {
+ gpios = <&pca9535_ledfault 9 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_11_fault {
+ gpios = <&pca9535_ledfault 8 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_12_fault {
+ gpios = <&pca9535_ledfault 15 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_13_fault {
+ gpios = <&pca9535_ledfault 14 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_14_fault {
+ gpios = <&pca9535_ledfault 13 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_u2_15_fault {
+ gpios = <&pca9535_ledfault 12 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ };
+
+ seven-seg-disp {
+ compatible = "seven-seg-gpio-dev";
+ refresh-interval-ms = /bits/ 16 <600>;
+ clock-gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+ data-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
+ clear-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
+ };
+
+ pcie-slot {
+ pcie1: pcie-slot@1 {
+ label = "PE0";
+ };
+ pcie2: pcie-slot@2 {
+ label = "PE1";
+ };
+ };
+};
+
+&fiu0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0cs1_pins>;
+ status = "okay";
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ spi-max-frequency = <20000000>;
+ spi-rx-bus-width = <2>;
+ label = "bmc";
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ u-boot@0 {
+ label = "u-boot";
+ reg = <0x0000000 0xf0000>;
+ };
+ image-descriptor@f0000 {
+ label = "image-descriptor";
+ reg = <0xf0000 0x10000>;
+ };
+ hoth-update@100000 {
+ label = "hoth-update";
+ reg = <0x100000 0x100000>;
+ };
+ kernel@200000 {
+ label = "kernel";
+ reg = <0x200000 0x500000>;
+ };
+ rofs@700000 {
+ label = "rofs";
+ reg = <0x700000 0x35f0000>;
+ };
+ rwfs@3cf0000 {
+ label = "rwfs";
+ reg = <0x3cf0000 0x300000>;
+ };
+ hoth-mailbox@3ff0000 {
+ label = "hoth-mailbox";
+ reg = <0x3ff0000 0x10000>;
+ };
+ };
+ };
+};
+
+&fiu3 {
+ pinctrl-0 = <&spi3_pins>, <&spi3cs1_pins>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ spi-rx-bus-width = <2>;
+ m25p,fast-read;
+ label = "pnor";
+ };
+ flash@1 {
+ compatible = "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <1>;
+ spi-max-frequency = <50000000>;
+ spi-rx-bus-width = <2>;
+ m25p,fast-read;
+ };
+};
+
+&gcr {
+ serial_port_mux: uart-mux-controller {
+ compatible = "mmio-mux";
+ #mux-control-cells = <1>;
+ mux-reg-masks = <0x38 0x07>;
+ idle-states = <2>; /* Serial port mode 3 (takeover) */
+ };
+
+ uart1_mode_mux: uart1-mode-mux-controller {
+ compatible = "mmio-mux";
+ #mux-control-cells = <1>;
+ mux-reg-masks = <0x64 0x01000000>;
+ idle-states = <0>; /* Set UART1 mode to normal (follow SPMOD) */
+ };
+};
+
+&gmac0 {
+ status = "okay";
+ phy-mode = "rgmii-id";
+ snps,eee-force-disable;
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&watchdog1 {
+ status = "okay";
+};
+
+&rng {
+ status = "okay";
+};
+
+&serial0 {
+ status = "okay";
+};
+
+&serial1 {
+ status = "okay";
+};
+
+&serial2 {
+ status = "okay";
+};
+
+&serial3 {
+ status = "okay";
+};
+
+&adc {
+ #io-channel-cells = <1>;
+ status = "okay";
+};
+
+&lpc_kcs {
+ kcs1: kcs1@0 {
+ status = "okay";
+ };
+
+ kcs2: kcs2@0 {
+ status = "okay";
+ };
+
+ kcs3: kcs3@0 {
+ status = "okay";
+ };
+};
+
+&spi1 {
+ cs-gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>; /* dummy - gpio147 */
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio224ol_pins &gpio227o_pins
+ &gpio228_pins>;
+ status = "okay";
+
+ jtag_master@0 {
+ compatible = "nuvoton,npcm750-jtag-master";
+ spi-max-frequency = <25000000>;
+ reg = <0>;
+ status = "okay";
+
+ pinctrl-names = "pspi", "gpio";
+ pinctrl-0 = <&pspi2_pins>;
+ pinctrl-1 = <&gpio224ol_pins &gpio227o_pins
+ &gpio228_pins>;
+
+ tck-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
+ tdi-gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
+ tdo-gpios = <&gpio7 4 GPIO_ACTIVE_HIGH>;
+ tms-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&i2c0 {
+ clock-frequency = <100000>;
+ status = "okay";
+
+ i2c-switch@71 {
+ compatible = "nxp,pca9546";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x71>;
+ i2c-mux-idle-disconnect;
+ reset-gpios = <&gpio2 20 GPIO_ACTIVE_LOW>;
+
+ i2c0_slotPE0_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ pcie-slot = &pcie1;
+ };
+
+ i2c0_slotPE1_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ pcie-slot = &pcie2;
+ };
+
+ i2c0_slotUSB_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ i2c0_3: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+ };
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+ status = "okay";
+
+ pca9535_ifdet: pca9535-ifdet@24 {
+ compatible = "nxp,pca9535";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ pca9535_pwren: pca9535-pwren@20 {
+ compatible = "nxp,pca9535";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ gpio-line-names =
+ "pwr_u2_3_en","pwr_u2_2_en",
+ "pwr_u2_1_en","pwr_u2_0_en",
+ "pwr_u2_7_en","pwr_u2_6_en",
+ "pwr_u2_5_en","pwr_u2_4_en",
+ "pwr_u2_11_en","pwr_u2_10_en",
+ "pwr_u2_9_en","pwr_u2_8_en",
+ "pwr_u2_15_en","pwr_u2_14_en",
+ "pwr_u2_13_en","pwr_u2_12_en";
+ };
+
+ pca9535_pwrgd: pca9535-pwrgd@21 {
+ compatible = "nxp,pca9535";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ pca9535_ledlocate: pca9535-ledlocate@22 {
+ compatible = "nxp,pca9535";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ };
+
+ pca9535_ledfault: pca9535-ledfault@23 {
+ compatible = "nxp,pca9535";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ };
+
+ pca9535_pwrdisable: pca9535-pwrdisable@25 {
+ compatible = "nxp,pca9535";
+ reg = <0x25>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ gpio-line-names =
+ "u2_3_pwr_dis","u2_2_pwr_dis",
+ "u2_1_pwr_dis","u2_0_pwr_dis",
+ "u2_7_pwr_dis","u2_6_pwr_dis",
+ "u2_5_pwr_dis","u2_4_pwr_dis",
+ "u2_11_pwr_dis","u2_10_pwr_dis",
+ "u2_9_pwr_dis","u2_8_pwr_dis",
+ "u2_15_pwr_dis","u2_14_pwr_dis",
+ "u2_13_pwr_dis","u2_12_pwr_dis";
+ };
+
+ pca9535_perst: pca9535-perst@26 {
+ compatible = "nxp,pca9535";
+ reg = <0x26>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ gpio-line-names =
+ "u2_15_perst","u2_14_perst",
+ "u2_13_perst","u2_12_perst",
+ "u2_11_perst","u2_10_perst",
+ "u2_9_perst","u2_8_perst",
+ "u2_7_perst","u2_6_perst",
+ "u2_5_perst","u2_4_perst",
+ "u2_3_perst","u2_2_perst",
+ "u2_1_perst","u2_0_perst";
+ };
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ status = "okay";
+
+ sbtsi@4c {
+ compatible = "amd,sbtsi";
+ reg = <0x4c>;
+ };
+};
+
+&i2c5 {
+ clock-frequency = <100000>;
+ status = "okay";
+
+ mb_fru@50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ };
+
+ i2c-switch@71 {
+ compatible = "nxp,pca9546";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x71>;
+ i2c-mux-idle-disconnect;
+
+ i2c5_i2cool_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ max31725@54 {
+ compatible = "maxim,max31725";
+ reg = <0x54>;
+ status = "okay";
+ };
+ };
+
+ i2c5_i2cool_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ max31725@55 {
+ compatible = "maxim,max31725";
+ reg = <0x55>;
+ status = "okay";
+ };
+ };
+
+ i2c5_i2cool_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ max31725@5d {
+ compatible = "maxim,max31725";
+ reg = <0x5d>;
+ status = "okay";
+ };
+ fan_fru@51 {
+ compatible = "atmel,24c64";
+ reg = <0x51>;
+ };
+ };
+
+ i2c5_hsbp_fru_3: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ hsbp_fru@52 {
+ compatible = "atmel,24c64";
+ reg = <0x52>;
+ status = "okay";
+ };
+ };
+ };
+};
+
+&i2c6 {
+ clock-frequency = <100000>;
+ status = "okay";
+
+ i2c-switch@73 {
+ compatible = "nxp,pca9545";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x73>;
+ i2c-mux-idle-disconnect;
+
+ i2c6_u2_15_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ i2c6_u2_14_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+ i2c6_u2_13_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ i2c6_u2_12_3: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+ };
+};
+
+&i2c7 {
+ clock-frequency = <100000>;
+ status = "okay";
+
+ i2c-switch@72 {
+ compatible = "nxp,pca9545";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x72>;
+ i2c-mux-idle-disconnect;
+
+ i2c7_u2_11_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ i2c7_u2_10_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+ i2c7_u2_9_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ i2c7_u2_8_3: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+ };
+};
+
+&i2c8 {
+ clock-frequency = <100000>;
+ status = "okay";
+
+ i2c8_adm1272: adm1272@10 {
+ compatible = "adi,adm1272";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10>;
+ shunt-resistor-micro-ohms = <300>;
+ };
+};
+
+&i2c9 {
+ clock-frequency = <100000>;
+ status = "okay";
+
+ i2c-switch@71 {
+ compatible = "nxp,pca9546";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x71>;
+ i2c-mux-idle-disconnect;
+ reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
+
+ i2c9_vddcr_cpu: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ vrm@60 {
+ compatible = "isil,isl68137";
+ reg = <0x60>;
+ };
+ };
+
+ i2c9_vddcr_soc: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ vrm@61 {
+ compatible = "isil,isl68137";
+ reg = <0x61>;
+ };
+ };
+
+ i2c9_vddio_efgh: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ vrm@63 {
+ compatible = "isil,isl68137";
+ reg = <0x63>;
+ };
+ };
+
+ i2c9_vddio_abcd: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ vrm@45 {
+ compatible = "isil,isl68137";
+ reg = <0x45>;
+ };
+ };
+ };
+};
+
+&i2c10 {
+ clock-frequency = <100000>;
+ status = "okay";
+
+ i2c-switch@71 {
+ compatible = "nxp,pca9545";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x71>;
+ i2c-mux-idle-disconnect;
+
+ i2c10_u2_7_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ i2c10_u2_6_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+ i2c10_u2_5_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ i2c10_u2_4_3: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+ };
+};
+
+&i2c11 {
+ clock-frequency = <100000>;
+ status = "okay";
+
+ i2c-switch@76 {
+ compatible = "nxp,pca9545";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x76>;
+ i2c-mux-idle-disconnect;
+
+ i2c11_clk_buf0_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ i2c11_clk_buf1_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+ i2c11_clk_buf2_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ i2c11_clk_buf3_3: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+ };
+};
+
+&i2c12 {
+ clock-frequency = <100000>;
+ status = "okay";
+
+ max34451@4e {
+ compatible = "maxim,max34451";
+ reg = <0x4e>;
+ };
+ vrm@5d {
+ compatible = "isil,isl68137";
+ reg = <0x5d>;
+ };
+ vrm@5e {
+ compatible = "isil,isl68137";
+ reg = <0x5e>;
+ };
+};
+
+&i2c13 {
+ clock-frequency = <100000>;
+ status = "okay";
+};
+
+&i2c14 {
+ clock-frequency = <100000>;
+ status = "okay";
+
+ i2c-switch@70 {
+ compatible = "nxp,pca9545";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x70>;
+ i2c-mux-idle-disconnect;
+
+ i2c14_u2_3_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ i2c14_u2_2_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ i2c14_u2_1_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ i2c14_u2_0_3: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+ };
+};
+
+&pwm_fan {
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ &pwm0_pins &pwm1_pins
+ &pwm2_pins &pwm3_pins
+ &pwm4_pins
+ &fanin0_pins &fanin1_pins
+ &fanin2_pins &fanin3_pins
+ &fanin4_pins
+ >;
+ status = "okay";
+
+ fan@0 {
+ reg = <0x00>;
+ fan-tach-ch = /bits/ 8 <0x00>;
+ };
+ fan@1 {
+ reg = <0x01>;
+ fan-tach-ch = /bits/ 8 <0x01>;
+ };
+ fan@2 {
+ reg = <0x02>;
+ fan-tach-ch = /bits/ 8 <0x02>;
+ };
+ fan@3 {
+ reg = <0x04>;
+ fan-tach-ch = /bits/ 8 <0x04>;
+ };
+ fan@4 {
+ reg = <0x03>;
+ fan-tach-ch = /bits/ 8 <0x03>;
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+
+ gpio0: gpio@f0010000 {
+ /* POWER_OUT=gpio07, RESET_OUT=gpio06, PS_PWROK=gpio13 */
+ gpio-line-names =
+ /*0-31*/
+ "","","","","","","RESET_OUT","POWER_OUT",
+ "","","","","","PS_PWROK","","",
+ "","","","","","","","",
+ "","","","","","","","";
+ };
+ gpio1: gpio@f0011000 {
+ /* SIO_POWER_GOOD=gpio59 */
+ gpio-line-names =
+ /*32-63*/
+ "","","","","","","","",
+ "","","","","","","","",
+ "","","","","","","","",
+ "","","","SIO_POWER_GOOD","","","","";
+ };
+ gpio2: gpio@f0012000 {
+ bmc_usb_mux_oe_n {
+ gpio-hog;
+ gpios = <25 GPIO_ACTIVE_HIGH>;
+ output-low;
+ line-name = "bmc-usb-mux-oe-n";
+ };
+ bmc_usb_mux_sel {
+ gpio-hog;
+ gpios = <26 GPIO_ACTIVE_HIGH>;
+ output-low;
+ line-name = "bmc-usb-mux-sel";
+ };
+ bmc_usb2517_reset_n {
+ gpio-hog;
+ gpios = <27 GPIO_ACTIVE_LOW>;
+ output-low;
+ line-name = "bmc-usb2517-reset-n";
+ };
+ };
+ gpio3: gpio@f0013000 {
+ assert_cpu0_reset {
+ gpio-hog;
+ gpios = <14 GPIO_ACTIVE_HIGH>;
+ output-low;
+ line-name = "assert-cpu0-reset";
+ };
+ assert_pwrok_cpu0_n {
+ gpio-hog;
+ gpios = <15 GPIO_ACTIVE_HIGH>;
+ output-low;
+ line-name = "assert-pwrok-cpu0-n";
+ };
+ assert_cpu0_prochot {
+ gpio-hog;
+ gpios = <16 GPIO_ACTIVE_HIGH>;
+ output-low;
+ line-name = "assert-cpu0-prochot";
+ };
+ };
+ gpio4: gpio@f0014000 {
+ /* POST_COMPLETE=gpio143 */
+ gpio-line-names =
+ /*128-159*/
+ "","","","","","","","",
+ "","","","","","","","POST_COMPLETE",
+ "","","","","","","","",
+ "","","","","","","","";
+ };
+ gpio5: gpio@f0015000 {
+ /* POWER_BUTTON=gpio177 */
+ gpio-line-names =
+ /*160-191*/
+ "","","","","","","","",
+ "","","","","","","","",
+ "","POWER_BUTTON","","","","","","",
+ "","","","","","","","";
+ };
+ gpio6: gpio@f0016000 {
+ /* SIO_S5=gpio199, RESET_BUTTON=gpio203 */
+ gpio-line-names =
+ /*192-223*/
+ "","","","","","","","SIO_S5",
+ "","","","RESET_BUTTON","","","","",
+ "","","","","","","","",
+ "","","","","","","","";
+ };
+
+ gpio224ol_pins: gpio224ol-pins {
+ pins = "GPIO224/SPIXCK";
+ bias-disable;
+ output-low;
+ };
+ gpio227o_pins: gpio227o-pins {
+ pins = "GPIO227/nSPIXCS0";
+ bias-disable;
+ output-high;
+ };
+ gpio228_pins: gpio228-pins {
+ pins = "GPIO228/nSPIXCS1";
+ bias-disable;
+ input-enable;
+ };
+};