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authorLibravatar Linus Torvalds <torvalds@linux-foundation.org>2023-02-21 18:24:12 -0800
committerLibravatar Linus Torvalds <torvalds@linux-foundation.org>2023-02-21 18:24:12 -0800
commit5b7c4cabbb65f5c469464da6c5f614cbd7f730f2 (patch)
treecc5c2d0a898769fd59549594fedb3ee6f84e59a0 /crypto/rmd160.c
downloadlinux-5b7c4cabbb65f5c469464da6c5f614cbd7f730f2.tar.gz
linux-5b7c4cabbb65f5c469464da6c5f614cbd7f730f2.zip
Merge tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-nextgrafted
Pull networking updates from Jakub Kicinski: "Core: - Add dedicated kmem_cache for typical/small skb->head, avoid having to access struct page at kfree time, and improve memory use. - Introduce sysctl to set default RPS configuration for new netdevs. - Define Netlink protocol specification format which can be used to describe messages used by each family and auto-generate parsers. Add tools for generating kernel data structures and uAPI headers. - Expose all net/core sysctls inside netns. - Remove 4s sleep in netpoll if carrier is instantly detected on boot. - Add configurable limit of MDB entries per port, and port-vlan. - Continue populating drop reasons throughout the stack. - Retire a handful of legacy Qdiscs and classifiers. Protocols: - Support IPv4 big TCP (TSO frames larger than 64kB). - Add IP_LOCAL_PORT_RANGE socket option, to control local port range on socket by socket basis. - Track and report in procfs number of MPTCP sockets used. - Support mixing IPv4 and IPv6 flows in the in-kernel MPTCP path manager. - IPv6: don't check net.ipv6.route.max_size and rely on garbage collection to free memory (similarly to IPv4). - Support Penultimate Segment Pop (PSP) flavor in SRv6 (RFC8986). - ICMP: add per-rate limit counters. - Add support for user scanning requests in ieee802154. - Remove static WEP support. - Support minimal Wi-Fi 7 Extremely High Throughput (EHT) rate reporting. - WiFi 7 EHT channel puncturing support (client & AP). BPF: - Add a rbtree data structure following the "next-gen data structure" precedent set by recently added linked list, that is, by using kfunc + kptr instead of adding a new BPF map type. - Expose XDP hints via kfuncs with initial support for RX hash and timestamp metadata. - Add BPF_F_NO_TUNNEL_KEY extension to bpf_skb_set_tunnel_key to better support decap on GRE tunnel devices not operating in collect metadata. - Improve x86 JIT's codegen for PROBE_MEM runtime error checks. - Remove the need for trace_printk_lock for bpf_trace_printk and bpf_trace_vprintk helpers. - Extend libbpf's bpf_tracing.h support for tracing arguments of kprobes/uprobes and syscall as a special case. - Significantly reduce the search time for module symbols by livepatch and BPF. - Enable cpumasks to be used as kptrs, which is useful for tracing programs tracking which tasks end up running on which CPUs in different time intervals. - Add support for BPF trampoline on s390x and riscv64. - Add capability to export the XDP features supported by the NIC. - Add __bpf_kfunc tag for marking kernel functions as kfuncs. - Add cgroup.memory=nobpf kernel parameter option to disable BPF memory accounting for container environments. Netfilter: - Remove the CLUSTERIP target. It has been marked as obsolete for years, and we still have WARN splats wrt races of the out-of-band /proc interface installed by this target. - Add 'destroy' commands to nf_tables. They are identical to the existing 'delete' commands, but do not return an error if the referenced object (set, chain, rule...) did not exist. Driver API: - Improve cpumask_local_spread() locality to help NICs set the right IRQ affinity on AMD platforms. - Separate C22 and C45 MDIO bus transactions more clearly. - Introduce new DCB table to control DSCP rewrite on egress. - Support configuration of Physical Layer Collision Avoidance (PLCA) Reconciliation Sublayer (RS) (802.3cg-2019). Modern version of shared medium Ethernet. - Support for MAC Merge layer (IEEE 802.3-2018 clause 99). Allowing preemption of low priority frames by high priority frames. - Add support for controlling MACSec offload using netlink SET. - Rework devlink instance refcounts to allow registration and de-registration under the instance lock. Split the code into multiple files, drop some of the unnecessarily granular locks and factor out common parts of netlink operation handling. - Add TX frame aggregation parameters (for USB drivers). - Add a new attr TCA_EXT_WARN_MSG to report TC (offload) warning messages with notifications for debug. - Allow offloading of UDP NEW connections via act_ct. - Add support for per action HW stats in TC. - Support hardware miss to TC action (continue processing in SW from a specific point in the action chain). - Warn if old Wireless Extension user space interface is used with modern cfg80211/mac80211 drivers. Do not support Wireless Extensions for Wi-Fi 7 devices at all. Everyone should switch to using nl80211 interface instead. - Improve the CAN bit timing configuration. Use extack to return error messages directly to user space, update the SJW handling, including the definition of a new default value that will benefit CAN-FD controllers, by increasing their oscillator tolerance. New hardware / drivers: - Ethernet: - nVidia BlueField-3 support (control traffic driver) - Ethernet support for imx93 SoCs - Motorcomm yt8531 gigabit Ethernet PHY - onsemi NCN26000 10BASE-T1S PHY (with support for PLCA) - Microchip LAN8841 PHY (incl. cable diagnostics and PTP) - Amlogic gxl MDIO mux - WiFi: - RealTek RTL8188EU (rtl8xxxu) - Qualcomm Wi-Fi 7 devices (ath12k) - CAN: - Renesas R-Car V4H Drivers: - Bluetooth: - Set Per Platform Antenna Gain (PPAG) for Intel controllers. - Ethernet NICs: - Intel (1G, igc): - support TSN / Qbv / packet scheduling features of i226 model - Intel (100G, ice): - use GNSS subsystem instead of TTY - multi-buffer XDP support - extend support for GPIO pins to E823 devices - nVidia/Mellanox: - update the shared buffer configuration on PFC commands - implement PTP adjphase function for HW offset control - TC support for Geneve and GRE with VF tunnel offload - more efficient crypto key management method - multi-port eswitch support - Netronome/Corigine: - add DCB IEEE support - support IPsec offloading for NFP3800 - Freescale/NXP (enetc): - support XDP_REDIRECT for XDP non-linear buffers - improve reconfig, avoid link flap and waiting for idle - support MAC Merge layer - Other NICs: - sfc/ef100: add basic devlink support for ef100 - ionic: rx_push mode operation (writing descriptors via MMIO) - bnxt: use the auxiliary bus abstraction for RDMA - r8169: disable ASPM and reset bus in case of tx timeout - cpsw: support QSGMII mode for J721e CPSW9G - cpts: support pulse-per-second output - ngbe: add an mdio bus driver - usbnet: optimize usbnet_bh() by avoiding unnecessary queuing - r8152: handle devices with FW with NCM support - amd-xgbe: support 10Mbps, 2.5GbE speeds and rx-adaptation - virtio-net: support multi buffer XDP - virtio/vsock: replace virtio_vsock_pkt with sk_buff - tsnep: XDP support - Ethernet high-speed switches: - nVidia/Mellanox (mlxsw): - add support for latency TLV (in FW control messages) - Microchip (sparx5): - separate explicit and implicit traffic forwarding rules, make the implicit rules always active - add support for egress DSCP rewrite - IS0 VCAP support (Ingress Classification) - IS2 VCAP filters (protos, L3 addrs, L4 ports, flags, ToS etc.) - ES2 VCAP support (Egress Access Control) - support for Per-Stream Filtering and Policing (802.1Q, 8.6.5.1) - Ethernet embedded switches: - Marvell (mv88e6xxx): - add MAB (port auth) offload support - enable PTP receive for mv88e6390 - NXP (ocelot): - support MAC Merge layer - support for the the vsc7512 internal copper phys - Microchip: - lan9303: convert to PHYLINK - lan966x: support TC flower filter statistics - lan937x: PTP support for KSZ9563/KSZ8563 and LAN937x - lan937x: support Credit Based Shaper configuration - ksz9477: support Energy Efficient Ethernet - other: - qca8k: convert to regmap read/write API, use bulk operations - rswitch: Improve TX timestamp accuracy - Intel WiFi (iwlwifi): - EHT (Wi-Fi 7) rate reporting - STEP equalizer support: transfer some STEP (connection to radio on platforms with integrated wifi) related parameters from the BIOS to the firmware. - Qualcomm 802.11ax WiFi (ath11k): - IPQ5018 support - Fine Timing Measurement (FTM) responder role support - channel 177 support - MediaTek WiFi (mt76): - per-PHY LED support - mt7996: EHT (Wi-Fi 7) support - Wireless Ethernet Dispatch (WED) reset support - switch to using page pool allocator - RealTek WiFi (rtw89): - support new version of Bluetooth co-existance - Mobile: - rmnet: support TX aggregation" * tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1872 commits) page_pool: add a comment explaining the fragment counter usage net: ethtool: fix __ethtool_dev_mm_supported() implementation ethtool: pse-pd: Fix double word in comments xsk: add linux/vmalloc.h to xsk.c sefltests: netdevsim: wait for devlink instance after netns removal selftest: fib_tests: Always cleanup before exit net/mlx5e: Align IPsec ASO result memory to be as required by hardware net/mlx5e: TC, Set CT miss to the specific ct action instance net/mlx5e: Rename CHAIN_TO_REG to MAPPED_OBJ_TO_REG net/mlx5: Refactor tc miss handling to a single function net/mlx5: Kconfig: Make tc offload depend on tc skb extension net/sched: flower: Support hardware miss to tc action net/sched: flower: Move filter handle initialization earlier net/sched: cls_api: Support hardware miss to tc action net/sched: Rename user cookie and act cookie sfc: fix builds without CONFIG_RTC_LIB sfc: clean up some inconsistent indentings net/mlx4_en: Introduce flexible array to silence overflow warning net: lan966x: Fix possible deadlock inside PTP net/ulp: Remove redundant ->clone() test in inet_clone_ulp(). ...
Diffstat (limited to 'crypto/rmd160.c')
-rw-r--r--crypto/rmd160.c367
1 files changed, 367 insertions, 0 deletions
diff --git a/crypto/rmd160.c b/crypto/rmd160.c
new file mode 100644
index 000000000..c5fe4034b
--- /dev/null
+++ b/crypto/rmd160.c
@@ -0,0 +1,367 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Cryptographic API.
+ *
+ * RIPEMD-160 - RACE Integrity Primitives Evaluation Message Digest.
+ *
+ * Based on the reference implementation by Antoon Bosselaers, ESAT-COSIC
+ *
+ * Copyright (c) 2008 Adrian-Ken Rueegsegger <ken@codelabs.ch>
+ */
+#include <crypto/internal/hash.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/mm.h>
+#include <linux/types.h>
+#include <asm/byteorder.h>
+
+#include "ripemd.h"
+
+struct rmd160_ctx {
+ u64 byte_count;
+ u32 state[5];
+ __le32 buffer[16];
+};
+
+#define K1 RMD_K1
+#define K2 RMD_K2
+#define K3 RMD_K3
+#define K4 RMD_K4
+#define K5 RMD_K5
+#define KK1 RMD_K6
+#define KK2 RMD_K7
+#define KK3 RMD_K8
+#define KK4 RMD_K9
+#define KK5 RMD_K1
+
+#define F1(x, y, z) (x ^ y ^ z) /* XOR */
+#define F2(x, y, z) (z ^ (x & (y ^ z))) /* x ? y : z */
+#define F3(x, y, z) ((x | ~y) ^ z)
+#define F4(x, y, z) (y ^ (z & (x ^ y))) /* z ? x : y */
+#define F5(x, y, z) (x ^ (y | ~z))
+
+#define ROUND(a, b, c, d, e, f, k, x, s) { \
+ (a) += f((b), (c), (d)) + le32_to_cpup(&(x)) + (k); \
+ (a) = rol32((a), (s)) + (e); \
+ (c) = rol32((c), 10); \
+}
+
+static void rmd160_transform(u32 *state, const __le32 *in)
+{
+ u32 aa, bb, cc, dd, ee, aaa, bbb, ccc, ddd, eee;
+
+ /* Initialize left lane */
+ aa = state[0];
+ bb = state[1];
+ cc = state[2];
+ dd = state[3];
+ ee = state[4];
+
+ /* Initialize right lane */
+ aaa = state[0];
+ bbb = state[1];
+ ccc = state[2];
+ ddd = state[3];
+ eee = state[4];
+
+ /* round 1: left lane */
+ ROUND(aa, bb, cc, dd, ee, F1, K1, in[0], 11);
+ ROUND(ee, aa, bb, cc, dd, F1, K1, in[1], 14);
+ ROUND(dd, ee, aa, bb, cc, F1, K1, in[2], 15);
+ ROUND(cc, dd, ee, aa, bb, F1, K1, in[3], 12);
+ ROUND(bb, cc, dd, ee, aa, F1, K1, in[4], 5);
+ ROUND(aa, bb, cc, dd, ee, F1, K1, in[5], 8);
+ ROUND(ee, aa, bb, cc, dd, F1, K1, in[6], 7);
+ ROUND(dd, ee, aa, bb, cc, F1, K1, in[7], 9);
+ ROUND(cc, dd, ee, aa, bb, F1, K1, in[8], 11);
+ ROUND(bb, cc, dd, ee, aa, F1, K1, in[9], 13);
+ ROUND(aa, bb, cc, dd, ee, F1, K1, in[10], 14);
+ ROUND(ee, aa, bb, cc, dd, F1, K1, in[11], 15);
+ ROUND(dd, ee, aa, bb, cc, F1, K1, in[12], 6);
+ ROUND(cc, dd, ee, aa, bb, F1, K1, in[13], 7);
+ ROUND(bb, cc, dd, ee, aa, F1, K1, in[14], 9);
+ ROUND(aa, bb, cc, dd, ee, F1, K1, in[15], 8);
+
+ /* round 2: left lane" */
+ ROUND(ee, aa, bb, cc, dd, F2, K2, in[7], 7);
+ ROUND(dd, ee, aa, bb, cc, F2, K2, in[4], 6);
+ ROUND(cc, dd, ee, aa, bb, F2, K2, in[13], 8);
+ ROUND(bb, cc, dd, ee, aa, F2, K2, in[1], 13);
+ ROUND(aa, bb, cc, dd, ee, F2, K2, in[10], 11);
+ ROUND(ee, aa, bb, cc, dd, F2, K2, in[6], 9);
+ ROUND(dd, ee, aa, bb, cc, F2, K2, in[15], 7);
+ ROUND(cc, dd, ee, aa, bb, F2, K2, in[3], 15);
+ ROUND(bb, cc, dd, ee, aa, F2, K2, in[12], 7);
+ ROUND(aa, bb, cc, dd, ee, F2, K2, in[0], 12);
+ ROUND(ee, aa, bb, cc, dd, F2, K2, in[9], 15);
+ ROUND(dd, ee, aa, bb, cc, F2, K2, in[5], 9);
+ ROUND(cc, dd, ee, aa, bb, F2, K2, in[2], 11);
+ ROUND(bb, cc, dd, ee, aa, F2, K2, in[14], 7);
+ ROUND(aa, bb, cc, dd, ee, F2, K2, in[11], 13);
+ ROUND(ee, aa, bb, cc, dd, F2, K2, in[8], 12);
+
+ /* round 3: left lane" */
+ ROUND(dd, ee, aa, bb, cc, F3, K3, in[3], 11);
+ ROUND(cc, dd, ee, aa, bb, F3, K3, in[10], 13);
+ ROUND(bb, cc, dd, ee, aa, F3, K3, in[14], 6);
+ ROUND(aa, bb, cc, dd, ee, F3, K3, in[4], 7);
+ ROUND(ee, aa, bb, cc, dd, F3, K3, in[9], 14);
+ ROUND(dd, ee, aa, bb, cc, F3, K3, in[15], 9);
+ ROUND(cc, dd, ee, aa, bb, F3, K3, in[8], 13);
+ ROUND(bb, cc, dd, ee, aa, F3, K3, in[1], 15);
+ ROUND(aa, bb, cc, dd, ee, F3, K3, in[2], 14);
+ ROUND(ee, aa, bb, cc, dd, F3, K3, in[7], 8);
+ ROUND(dd, ee, aa, bb, cc, F3, K3, in[0], 13);
+ ROUND(cc, dd, ee, aa, bb, F3, K3, in[6], 6);
+ ROUND(bb, cc, dd, ee, aa, F3, K3, in[13], 5);
+ ROUND(aa, bb, cc, dd, ee, F3, K3, in[11], 12);
+ ROUND(ee, aa, bb, cc, dd, F3, K3, in[5], 7);
+ ROUND(dd, ee, aa, bb, cc, F3, K3, in[12], 5);
+
+ /* round 4: left lane" */
+ ROUND(cc, dd, ee, aa, bb, F4, K4, in[1], 11);
+ ROUND(bb, cc, dd, ee, aa, F4, K4, in[9], 12);
+ ROUND(aa, bb, cc, dd, ee, F4, K4, in[11], 14);
+ ROUND(ee, aa, bb, cc, dd, F4, K4, in[10], 15);
+ ROUND(dd, ee, aa, bb, cc, F4, K4, in[0], 14);
+ ROUND(cc, dd, ee, aa, bb, F4, K4, in[8], 15);
+ ROUND(bb, cc, dd, ee, aa, F4, K4, in[12], 9);
+ ROUND(aa, bb, cc, dd, ee, F4, K4, in[4], 8);
+ ROUND(ee, aa, bb, cc, dd, F4, K4, in[13], 9);
+ ROUND(dd, ee, aa, bb, cc, F4, K4, in[3], 14);
+ ROUND(cc, dd, ee, aa, bb, F4, K4, in[7], 5);
+ ROUND(bb, cc, dd, ee, aa, F4, K4, in[15], 6);
+ ROUND(aa, bb, cc, dd, ee, F4, K4, in[14], 8);
+ ROUND(ee, aa, bb, cc, dd, F4, K4, in[5], 6);
+ ROUND(dd, ee, aa, bb, cc, F4, K4, in[6], 5);
+ ROUND(cc, dd, ee, aa, bb, F4, K4, in[2], 12);
+
+ /* round 5: left lane" */
+ ROUND(bb, cc, dd, ee, aa, F5, K5, in[4], 9);
+ ROUND(aa, bb, cc, dd, ee, F5, K5, in[0], 15);
+ ROUND(ee, aa, bb, cc, dd, F5, K5, in[5], 5);
+ ROUND(dd, ee, aa, bb, cc, F5, K5, in[9], 11);
+ ROUND(cc, dd, ee, aa, bb, F5, K5, in[7], 6);
+ ROUND(bb, cc, dd, ee, aa, F5, K5, in[12], 8);
+ ROUND(aa, bb, cc, dd, ee, F5, K5, in[2], 13);
+ ROUND(ee, aa, bb, cc, dd, F5, K5, in[10], 12);
+ ROUND(dd, ee, aa, bb, cc, F5, K5, in[14], 5);
+ ROUND(cc, dd, ee, aa, bb, F5, K5, in[1], 12);
+ ROUND(bb, cc, dd, ee, aa, F5, K5, in[3], 13);
+ ROUND(aa, bb, cc, dd, ee, F5, K5, in[8], 14);
+ ROUND(ee, aa, bb, cc, dd, F5, K5, in[11], 11);
+ ROUND(dd, ee, aa, bb, cc, F5, K5, in[6], 8);
+ ROUND(cc, dd, ee, aa, bb, F5, K5, in[15], 5);
+ ROUND(bb, cc, dd, ee, aa, F5, K5, in[13], 6);
+
+ /* round 1: right lane */
+ ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[5], 8);
+ ROUND(eee, aaa, bbb, ccc, ddd, F5, KK1, in[14], 9);
+ ROUND(ddd, eee, aaa, bbb, ccc, F5, KK1, in[7], 9);
+ ROUND(ccc, ddd, eee, aaa, bbb, F5, KK1, in[0], 11);
+ ROUND(bbb, ccc, ddd, eee, aaa, F5, KK1, in[9], 13);
+ ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[2], 15);
+ ROUND(eee, aaa, bbb, ccc, ddd, F5, KK1, in[11], 15);
+ ROUND(ddd, eee, aaa, bbb, ccc, F5, KK1, in[4], 5);
+ ROUND(ccc, ddd, eee, aaa, bbb, F5, KK1, in[13], 7);
+ ROUND(bbb, ccc, ddd, eee, aaa, F5, KK1, in[6], 7);
+ ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[15], 8);
+ ROUND(eee, aaa, bbb, ccc, ddd, F5, KK1, in[8], 11);
+ ROUND(ddd, eee, aaa, bbb, ccc, F5, KK1, in[1], 14);
+ ROUND(ccc, ddd, eee, aaa, bbb, F5, KK1, in[10], 14);
+ ROUND(bbb, ccc, ddd, eee, aaa, F5, KK1, in[3], 12);
+ ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[12], 6);
+
+ /* round 2: right lane */
+ ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[6], 9);
+ ROUND(ddd, eee, aaa, bbb, ccc, F4, KK2, in[11], 13);
+ ROUND(ccc, ddd, eee, aaa, bbb, F4, KK2, in[3], 15);
+ ROUND(bbb, ccc, ddd, eee, aaa, F4, KK2, in[7], 7);
+ ROUND(aaa, bbb, ccc, ddd, eee, F4, KK2, in[0], 12);
+ ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[13], 8);
+ ROUND(ddd, eee, aaa, bbb, ccc, F4, KK2, in[5], 9);
+ ROUND(ccc, ddd, eee, aaa, bbb, F4, KK2, in[10], 11);
+ ROUND(bbb, ccc, ddd, eee, aaa, F4, KK2, in[14], 7);
+ ROUND(aaa, bbb, ccc, ddd, eee, F4, KK2, in[15], 7);
+ ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[8], 12);
+ ROUND(ddd, eee, aaa, bbb, ccc, F4, KK2, in[12], 7);
+ ROUND(ccc, ddd, eee, aaa, bbb, F4, KK2, in[4], 6);
+ ROUND(bbb, ccc, ddd, eee, aaa, F4, KK2, in[9], 15);
+ ROUND(aaa, bbb, ccc, ddd, eee, F4, KK2, in[1], 13);
+ ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[2], 11);
+
+ /* round 3: right lane */
+ ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[15], 9);
+ ROUND(ccc, ddd, eee, aaa, bbb, F3, KK3, in[5], 7);
+ ROUND(bbb, ccc, ddd, eee, aaa, F3, KK3, in[1], 15);
+ ROUND(aaa, bbb, ccc, ddd, eee, F3, KK3, in[3], 11);
+ ROUND(eee, aaa, bbb, ccc, ddd, F3, KK3, in[7], 8);
+ ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[14], 6);
+ ROUND(ccc, ddd, eee, aaa, bbb, F3, KK3, in[6], 6);
+ ROUND(bbb, ccc, ddd, eee, aaa, F3, KK3, in[9], 14);
+ ROUND(aaa, bbb, ccc, ddd, eee, F3, KK3, in[11], 12);
+ ROUND(eee, aaa, bbb, ccc, ddd, F3, KK3, in[8], 13);
+ ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[12], 5);
+ ROUND(ccc, ddd, eee, aaa, bbb, F3, KK3, in[2], 14);
+ ROUND(bbb, ccc, ddd, eee, aaa, F3, KK3, in[10], 13);
+ ROUND(aaa, bbb, ccc, ddd, eee, F3, KK3, in[0], 13);
+ ROUND(eee, aaa, bbb, ccc, ddd, F3, KK3, in[4], 7);
+ ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[13], 5);
+
+ /* round 4: right lane */
+ ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[8], 15);
+ ROUND(bbb, ccc, ddd, eee, aaa, F2, KK4, in[6], 5);
+ ROUND(aaa, bbb, ccc, ddd, eee, F2, KK4, in[4], 8);
+ ROUND(eee, aaa, bbb, ccc, ddd, F2, KK4, in[1], 11);
+ ROUND(ddd, eee, aaa, bbb, ccc, F2, KK4, in[3], 14);
+ ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[11], 14);
+ ROUND(bbb, ccc, ddd, eee, aaa, F2, KK4, in[15], 6);
+ ROUND(aaa, bbb, ccc, ddd, eee, F2, KK4, in[0], 14);
+ ROUND(eee, aaa, bbb, ccc, ddd, F2, KK4, in[5], 6);
+ ROUND(ddd, eee, aaa, bbb, ccc, F2, KK4, in[12], 9);
+ ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[2], 12);
+ ROUND(bbb, ccc, ddd, eee, aaa, F2, KK4, in[13], 9);
+ ROUND(aaa, bbb, ccc, ddd, eee, F2, KK4, in[9], 12);
+ ROUND(eee, aaa, bbb, ccc, ddd, F2, KK4, in[7], 5);
+ ROUND(ddd, eee, aaa, bbb, ccc, F2, KK4, in[10], 15);
+ ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[14], 8);
+
+ /* round 5: right lane */
+ ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[12], 8);
+ ROUND(aaa, bbb, ccc, ddd, eee, F1, KK5, in[15], 5);
+ ROUND(eee, aaa, bbb, ccc, ddd, F1, KK5, in[10], 12);
+ ROUND(ddd, eee, aaa, bbb, ccc, F1, KK5, in[4], 9);
+ ROUND(ccc, ddd, eee, aaa, bbb, F1, KK5, in[1], 12);
+ ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[5], 5);
+ ROUND(aaa, bbb, ccc, ddd, eee, F1, KK5, in[8], 14);
+ ROUND(eee, aaa, bbb, ccc, ddd, F1, KK5, in[7], 6);
+ ROUND(ddd, eee, aaa, bbb, ccc, F1, KK5, in[6], 8);
+ ROUND(ccc, ddd, eee, aaa, bbb, F1, KK5, in[2], 13);
+ ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[13], 6);
+ ROUND(aaa, bbb, ccc, ddd, eee, F1, KK5, in[14], 5);
+ ROUND(eee, aaa, bbb, ccc, ddd, F1, KK5, in[0], 15);
+ ROUND(ddd, eee, aaa, bbb, ccc, F1, KK5, in[3], 13);
+ ROUND(ccc, ddd, eee, aaa, bbb, F1, KK5, in[9], 11);
+ ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[11], 11);
+
+ /* combine results */
+ ddd += cc + state[1]; /* final result for state[0] */
+ state[1] = state[2] + dd + eee;
+ state[2] = state[3] + ee + aaa;
+ state[3] = state[4] + aa + bbb;
+ state[4] = state[0] + bb + ccc;
+ state[0] = ddd;
+}
+
+static int rmd160_init(struct shash_desc *desc)
+{
+ struct rmd160_ctx *rctx = shash_desc_ctx(desc);
+
+ rctx->byte_count = 0;
+
+ rctx->state[0] = RMD_H0;
+ rctx->state[1] = RMD_H1;
+ rctx->state[2] = RMD_H2;
+ rctx->state[3] = RMD_H3;
+ rctx->state[4] = RMD_H4;
+
+ memset(rctx->buffer, 0, sizeof(rctx->buffer));
+
+ return 0;
+}
+
+static int rmd160_update(struct shash_desc *desc, const u8 *data,
+ unsigned int len)
+{
+ struct rmd160_ctx *rctx = shash_desc_ctx(desc);
+ const u32 avail = sizeof(rctx->buffer) - (rctx->byte_count & 0x3f);
+
+ rctx->byte_count += len;
+
+ /* Enough space in buffer? If so copy and we're done */
+ if (avail > len) {
+ memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
+ data, len);
+ goto out;
+ }
+
+ memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
+ data, avail);
+
+ rmd160_transform(rctx->state, rctx->buffer);
+ data += avail;
+ len -= avail;
+
+ while (len >= sizeof(rctx->buffer)) {
+ memcpy(rctx->buffer, data, sizeof(rctx->buffer));
+ rmd160_transform(rctx->state, rctx->buffer);
+ data += sizeof(rctx->buffer);
+ len -= sizeof(rctx->buffer);
+ }
+
+ memcpy(rctx->buffer, data, len);
+
+out:
+ return 0;
+}
+
+/* Add padding and return the message digest. */
+static int rmd160_final(struct shash_desc *desc, u8 *out)
+{
+ struct rmd160_ctx *rctx = shash_desc_ctx(desc);
+ u32 i, index, padlen;
+ __le64 bits;
+ __le32 *dst = (__le32 *)out;
+ static const u8 padding[64] = { 0x80, };
+
+ bits = cpu_to_le64(rctx->byte_count << 3);
+
+ /* Pad out to 56 mod 64 */
+ index = rctx->byte_count & 0x3f;
+ padlen = (index < 56) ? (56 - index) : ((64+56) - index);
+ rmd160_update(desc, padding, padlen);
+
+ /* Append length */
+ rmd160_update(desc, (const u8 *)&bits, sizeof(bits));
+
+ /* Store state in digest */
+ for (i = 0; i < 5; i++)
+ dst[i] = cpu_to_le32p(&rctx->state[i]);
+
+ /* Wipe context */
+ memset(rctx, 0, sizeof(*rctx));
+
+ return 0;
+}
+
+static struct shash_alg alg = {
+ .digestsize = RMD160_DIGEST_SIZE,
+ .init = rmd160_init,
+ .update = rmd160_update,
+ .final = rmd160_final,
+ .descsize = sizeof(struct rmd160_ctx),
+ .base = {
+ .cra_name = "rmd160",
+ .cra_driver_name = "rmd160-generic",
+ .cra_blocksize = RMD160_BLOCK_SIZE,
+ .cra_module = THIS_MODULE,
+ }
+};
+
+static int __init rmd160_mod_init(void)
+{
+ return crypto_register_shash(&alg);
+}
+
+static void __exit rmd160_mod_fini(void)
+{
+ crypto_unregister_shash(&alg);
+}
+
+subsys_initcall(rmd160_mod_init);
+module_exit(rmd160_mod_fini);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Adrian-Ken Rueegsegger <ken@codelabs.ch>");
+MODULE_DESCRIPTION("RIPEMD-160 Message Digest");
+MODULE_ALIAS_CRYPTO("rmd160");