diff options
author | 2023-02-21 18:24:12 -0800 | |
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committer | 2023-02-21 18:24:12 -0800 | |
commit | 5b7c4cabbb65f5c469464da6c5f614cbd7f730f2 (patch) | |
tree | cc5c2d0a898769fd59549594fedb3ee6f84e59a0 /drivers/gpio/gpio-ts5500.c | |
download | linux-5b7c4cabbb65f5c469464da6c5f614cbd7f730f2.tar.gz linux-5b7c4cabbb65f5c469464da6c5f614cbd7f730f2.zip |
Merge tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-nextgrafted
Pull networking updates from Jakub Kicinski:
"Core:
- Add dedicated kmem_cache for typical/small skb->head, avoid having
to access struct page at kfree time, and improve memory use.
- Introduce sysctl to set default RPS configuration for new netdevs.
- Define Netlink protocol specification format which can be used to
describe messages used by each family and auto-generate parsers.
Add tools for generating kernel data structures and uAPI headers.
- Expose all net/core sysctls inside netns.
- Remove 4s sleep in netpoll if carrier is instantly detected on
boot.
- Add configurable limit of MDB entries per port, and port-vlan.
- Continue populating drop reasons throughout the stack.
- Retire a handful of legacy Qdiscs and classifiers.
Protocols:
- Support IPv4 big TCP (TSO frames larger than 64kB).
- Add IP_LOCAL_PORT_RANGE socket option, to control local port range
on socket by socket basis.
- Track and report in procfs number of MPTCP sockets used.
- Support mixing IPv4 and IPv6 flows in the in-kernel MPTCP path
manager.
- IPv6: don't check net.ipv6.route.max_size and rely on garbage
collection to free memory (similarly to IPv4).
- Support Penultimate Segment Pop (PSP) flavor in SRv6 (RFC8986).
- ICMP: add per-rate limit counters.
- Add support for user scanning requests in ieee802154.
- Remove static WEP support.
- Support minimal Wi-Fi 7 Extremely High Throughput (EHT) rate
reporting.
- WiFi 7 EHT channel puncturing support (client & AP).
BPF:
- Add a rbtree data structure following the "next-gen data structure"
precedent set by recently added linked list, that is, by using
kfunc + kptr instead of adding a new BPF map type.
- Expose XDP hints via kfuncs with initial support for RX hash and
timestamp metadata.
- Add BPF_F_NO_TUNNEL_KEY extension to bpf_skb_set_tunnel_key to
better support decap on GRE tunnel devices not operating in collect
metadata.
- Improve x86 JIT's codegen for PROBE_MEM runtime error checks.
- Remove the need for trace_printk_lock for bpf_trace_printk and
bpf_trace_vprintk helpers.
- Extend libbpf's bpf_tracing.h support for tracing arguments of
kprobes/uprobes and syscall as a special case.
- Significantly reduce the search time for module symbols by
livepatch and BPF.
- Enable cpumasks to be used as kptrs, which is useful for tracing
programs tracking which tasks end up running on which CPUs in
different time intervals.
- Add support for BPF trampoline on s390x and riscv64.
- Add capability to export the XDP features supported by the NIC.
- Add __bpf_kfunc tag for marking kernel functions as kfuncs.
- Add cgroup.memory=nobpf kernel parameter option to disable BPF
memory accounting for container environments.
Netfilter:
- Remove the CLUSTERIP target. It has been marked as obsolete for
years, and we still have WARN splats wrt races of the out-of-band
/proc interface installed by this target.
- Add 'destroy' commands to nf_tables. They are identical to the
existing 'delete' commands, but do not return an error if the
referenced object (set, chain, rule...) did not exist.
Driver API:
- Improve cpumask_local_spread() locality to help NICs set the right
IRQ affinity on AMD platforms.
- Separate C22 and C45 MDIO bus transactions more clearly.
- Introduce new DCB table to control DSCP rewrite on egress.
- Support configuration of Physical Layer Collision Avoidance (PLCA)
Reconciliation Sublayer (RS) (802.3cg-2019). Modern version of
shared medium Ethernet.
- Support for MAC Merge layer (IEEE 802.3-2018 clause 99). Allowing
preemption of low priority frames by high priority frames.
- Add support for controlling MACSec offload using netlink SET.
- Rework devlink instance refcounts to allow registration and
de-registration under the instance lock. Split the code into
multiple files, drop some of the unnecessarily granular locks and
factor out common parts of netlink operation handling.
- Add TX frame aggregation parameters (for USB drivers).
- Add a new attr TCA_EXT_WARN_MSG to report TC (offload) warning
messages with notifications for debug.
- Allow offloading of UDP NEW connections via act_ct.
- Add support for per action HW stats in TC.
- Support hardware miss to TC action (continue processing in SW from
a specific point in the action chain).
- Warn if old Wireless Extension user space interface is used with
modern cfg80211/mac80211 drivers. Do not support Wireless
Extensions for Wi-Fi 7 devices at all. Everyone should switch to
using nl80211 interface instead.
- Improve the CAN bit timing configuration. Use extack to return
error messages directly to user space, update the SJW handling,
including the definition of a new default value that will benefit
CAN-FD controllers, by increasing their oscillator tolerance.
New hardware / drivers:
- Ethernet:
- nVidia BlueField-3 support (control traffic driver)
- Ethernet support for imx93 SoCs
- Motorcomm yt8531 gigabit Ethernet PHY
- onsemi NCN26000 10BASE-T1S PHY (with support for PLCA)
- Microchip LAN8841 PHY (incl. cable diagnostics and PTP)
- Amlogic gxl MDIO mux
- WiFi:
- RealTek RTL8188EU (rtl8xxxu)
- Qualcomm Wi-Fi 7 devices (ath12k)
- CAN:
- Renesas R-Car V4H
Drivers:
- Bluetooth:
- Set Per Platform Antenna Gain (PPAG) for Intel controllers.
- Ethernet NICs:
- Intel (1G, igc):
- support TSN / Qbv / packet scheduling features of i226 model
- Intel (100G, ice):
- use GNSS subsystem instead of TTY
- multi-buffer XDP support
- extend support for GPIO pins to E823 devices
- nVidia/Mellanox:
- update the shared buffer configuration on PFC commands
- implement PTP adjphase function for HW offset control
- TC support for Geneve and GRE with VF tunnel offload
- more efficient crypto key management method
- multi-port eswitch support
- Netronome/Corigine:
- add DCB IEEE support
- support IPsec offloading for NFP3800
- Freescale/NXP (enetc):
- support XDP_REDIRECT for XDP non-linear buffers
- improve reconfig, avoid link flap and waiting for idle
- support MAC Merge layer
- Other NICs:
- sfc/ef100: add basic devlink support for ef100
- ionic: rx_push mode operation (writing descriptors via MMIO)
- bnxt: use the auxiliary bus abstraction for RDMA
- r8169: disable ASPM and reset bus in case of tx timeout
- cpsw: support QSGMII mode for J721e CPSW9G
- cpts: support pulse-per-second output
- ngbe: add an mdio bus driver
- usbnet: optimize usbnet_bh() by avoiding unnecessary queuing
- r8152: handle devices with FW with NCM support
- amd-xgbe: support 10Mbps, 2.5GbE speeds and rx-adaptation
- virtio-net: support multi buffer XDP
- virtio/vsock: replace virtio_vsock_pkt with sk_buff
- tsnep: XDP support
- Ethernet high-speed switches:
- nVidia/Mellanox (mlxsw):
- add support for latency TLV (in FW control messages)
- Microchip (sparx5):
- separate explicit and implicit traffic forwarding rules, make
the implicit rules always active
- add support for egress DSCP rewrite
- IS0 VCAP support (Ingress Classification)
- IS2 VCAP filters (protos, L3 addrs, L4 ports, flags, ToS
etc.)
- ES2 VCAP support (Egress Access Control)
- support for Per-Stream Filtering and Policing (802.1Q,
8.6.5.1)
- Ethernet embedded switches:
- Marvell (mv88e6xxx):
- add MAB (port auth) offload support
- enable PTP receive for mv88e6390
- NXP (ocelot):
- support MAC Merge layer
- support for the the vsc7512 internal copper phys
- Microchip:
- lan9303: convert to PHYLINK
- lan966x: support TC flower filter statistics
- lan937x: PTP support for KSZ9563/KSZ8563 and LAN937x
- lan937x: support Credit Based Shaper configuration
- ksz9477: support Energy Efficient Ethernet
- other:
- qca8k: convert to regmap read/write API, use bulk operations
- rswitch: Improve TX timestamp accuracy
- Intel WiFi (iwlwifi):
- EHT (Wi-Fi 7) rate reporting
- STEP equalizer support: transfer some STEP (connection to radio
on platforms with integrated wifi) related parameters from the
BIOS to the firmware.
- Qualcomm 802.11ax WiFi (ath11k):
- IPQ5018 support
- Fine Timing Measurement (FTM) responder role support
- channel 177 support
- MediaTek WiFi (mt76):
- per-PHY LED support
- mt7996: EHT (Wi-Fi 7) support
- Wireless Ethernet Dispatch (WED) reset support
- switch to using page pool allocator
- RealTek WiFi (rtw89):
- support new version of Bluetooth co-existance
- Mobile:
- rmnet: support TX aggregation"
* tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1872 commits)
page_pool: add a comment explaining the fragment counter usage
net: ethtool: fix __ethtool_dev_mm_supported() implementation
ethtool: pse-pd: Fix double word in comments
xsk: add linux/vmalloc.h to xsk.c
sefltests: netdevsim: wait for devlink instance after netns removal
selftest: fib_tests: Always cleanup before exit
net/mlx5e: Align IPsec ASO result memory to be as required by hardware
net/mlx5e: TC, Set CT miss to the specific ct action instance
net/mlx5e: Rename CHAIN_TO_REG to MAPPED_OBJ_TO_REG
net/mlx5: Refactor tc miss handling to a single function
net/mlx5: Kconfig: Make tc offload depend on tc skb extension
net/sched: flower: Support hardware miss to tc action
net/sched: flower: Move filter handle initialization earlier
net/sched: cls_api: Support hardware miss to tc action
net/sched: Rename user cookie and act cookie
sfc: fix builds without CONFIG_RTC_LIB
sfc: clean up some inconsistent indentings
net/mlx4_en: Introduce flexible array to silence overflow warning
net: lan966x: Fix possible deadlock inside PTP
net/ulp: Remove redundant ->clone() test in inet_clone_ulp().
...
Diffstat (limited to 'drivers/gpio/gpio-ts5500.c')
-rw-r--r-- | drivers/gpio/gpio-ts5500.c | 446 |
1 files changed, 446 insertions, 0 deletions
diff --git a/drivers/gpio/gpio-ts5500.c b/drivers/gpio/gpio-ts5500.c new file mode 100644 index 000000000..8e03614c7 --- /dev/null +++ b/drivers/gpio/gpio-ts5500.c @@ -0,0 +1,446 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Digital I/O driver for Technologic Systems TS-5500 + * + * Copyright (c) 2012 Savoir-faire Linux Inc. + * Vivien Didelot <vivien.didelot@savoirfairelinux.com> + * + * Technologic Systems platforms have pin blocks, exposing several Digital + * Input/Output lines (DIO). This driver aims to support single pin blocks. + * In that sense, the support is not limited to the TS-5500 blocks. + * Actually, the following platforms have DIO support: + * + * TS-5500: + * Documentation: https://docs.embeddedts.com/TS-5500 + * Blocks: DIO1, DIO2 and LCD port. + * + * TS-5600: + * Documentation: https://docs.embeddedts.com/TS-5600 + * Blocks: LCD port (identical to TS-5500 LCD). + */ + +#include <linux/bitops.h> +#include <linux/gpio/driver.h> +#include <linux/io.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/slab.h> + +/* List of supported Technologic Systems platforms DIO blocks */ +enum ts5500_blocks { TS5500_DIO1, TS5500_DIO2, TS5500_LCD, TS5600_LCD }; + +struct ts5500_priv { + const struct ts5500_dio *pinout; + struct gpio_chip gpio_chip; + spinlock_t lock; + bool strap; + u8 hwirq; +}; + +/* + * Hex 7D is used to control several blocks (e.g. DIO2 and LCD port). + * This flag ensures that the region has been requested by this driver. + */ +static bool hex7d_reserved; + +/* + * This structure is used to describe capabilities of DIO lines, + * such as available directions and connected interrupt (if any). + */ +struct ts5500_dio { + const u8 value_addr; + const u8 value_mask; + const u8 control_addr; + const u8 control_mask; + const bool no_input; + const bool no_output; + const u8 irq; +}; + +#define TS5500_DIO_IN_OUT(vaddr, vbit, caddr, cbit) \ + { \ + .value_addr = vaddr, \ + .value_mask = BIT(vbit), \ + .control_addr = caddr, \ + .control_mask = BIT(cbit), \ + } + +#define TS5500_DIO_IN(addr, bit) \ + { \ + .value_addr = addr, \ + .value_mask = BIT(bit), \ + .no_output = true, \ + } + +#define TS5500_DIO_IN_IRQ(addr, bit, _irq) \ + { \ + .value_addr = addr, \ + .value_mask = BIT(bit), \ + .no_output = true, \ + .irq = _irq, \ + } + +#define TS5500_DIO_OUT(addr, bit) \ + { \ + .value_addr = addr, \ + .value_mask = BIT(bit), \ + .no_input = true, \ + } + +/* + * Input/Output DIO lines are programmed in groups of 4. Their values are + * available through 4 consecutive bits in a value port, whereas the direction + * of these 4 lines is driven by only 1 bit in a control port. + */ +#define TS5500_DIO_GROUP(vaddr, vbitfrom, caddr, cbit) \ + TS5500_DIO_IN_OUT(vaddr, vbitfrom + 0, caddr, cbit), \ + TS5500_DIO_IN_OUT(vaddr, vbitfrom + 1, caddr, cbit), \ + TS5500_DIO_IN_OUT(vaddr, vbitfrom + 2, caddr, cbit), \ + TS5500_DIO_IN_OUT(vaddr, vbitfrom + 3, caddr, cbit) + +/* + * TS-5500 DIO1 block + * + * value control dir hw + * addr bit addr bit in out irq name pin offset + * + * 0x7b 0 0x7a 0 x x DIO1_0 1 0 + * 0x7b 1 0x7a 0 x x DIO1_1 3 1 + * 0x7b 2 0x7a 0 x x DIO1_2 5 2 + * 0x7b 3 0x7a 0 x x DIO1_3 7 3 + * 0x7b 4 0x7a 1 x x DIO1_4 9 4 + * 0x7b 5 0x7a 1 x x DIO1_5 11 5 + * 0x7b 6 0x7a 1 x x DIO1_6 13 6 + * 0x7b 7 0x7a 1 x x DIO1_7 15 7 + * 0x7c 0 0x7a 5 x x DIO1_8 4 8 + * 0x7c 1 0x7a 5 x x DIO1_9 6 9 + * 0x7c 2 0x7a 5 x x DIO1_10 8 10 + * 0x7c 3 0x7a 5 x x DIO1_11 10 11 + * 0x7c 4 x DIO1_12 12 12 + * 0x7c 5 x 7 DIO1_13 14 13 + */ +static const struct ts5500_dio ts5500_dio1[] = { + TS5500_DIO_GROUP(0x7b, 0, 0x7a, 0), + TS5500_DIO_GROUP(0x7b, 4, 0x7a, 1), + TS5500_DIO_GROUP(0x7c, 0, 0x7a, 5), + TS5500_DIO_IN(0x7c, 4), + TS5500_DIO_IN_IRQ(0x7c, 5, 7), +}; + +/* + * TS-5500 DIO2 block + * + * value control dir hw + * addr bit addr bit in out irq name pin offset + * + * 0x7e 0 0x7d 0 x x DIO2_0 1 0 + * 0x7e 1 0x7d 0 x x DIO2_1 3 1 + * 0x7e 2 0x7d 0 x x DIO2_2 5 2 + * 0x7e 3 0x7d 0 x x DIO2_3 7 3 + * 0x7e 4 0x7d 1 x x DIO2_4 9 4 + * 0x7e 5 0x7d 1 x x DIO2_5 11 5 + * 0x7e 6 0x7d 1 x x DIO2_6 13 6 + * 0x7e 7 0x7d 1 x x DIO2_7 15 7 + * 0x7f 0 0x7d 5 x x DIO2_8 4 8 + * 0x7f 1 0x7d 5 x x DIO2_9 6 9 + * 0x7f 2 0x7d 5 x x DIO2_10 8 10 + * 0x7f 3 0x7d 5 x x DIO2_11 10 11 + * 0x7f 4 x 6 DIO2_13 14 12 + */ +static const struct ts5500_dio ts5500_dio2[] = { + TS5500_DIO_GROUP(0x7e, 0, 0x7d, 0), + TS5500_DIO_GROUP(0x7e, 4, 0x7d, 1), + TS5500_DIO_GROUP(0x7f, 0, 0x7d, 5), + TS5500_DIO_IN_IRQ(0x7f, 4, 6), +}; + +/* + * TS-5500 LCD port used as DIO block + * TS-5600 LCD port is identical + * + * value control dir hw + * addr bit addr bit in out irq name pin offset + * + * 0x72 0 0x7d 2 x x LCD_0 8 0 + * 0x72 1 0x7d 2 x x LCD_1 7 1 + * 0x72 2 0x7d 2 x x LCD_2 10 2 + * 0x72 3 0x7d 2 x x LCD_3 9 3 + * 0x72 4 0x7d 3 x x LCD_4 12 4 + * 0x72 5 0x7d 3 x x LCD_5 11 5 + * 0x72 6 0x7d 3 x x LCD_6 14 6 + * 0x72 7 0x7d 3 x x LCD_7 13 7 + * 0x73 0 x LCD_EN 5 8 + * 0x73 6 x LCD_WR 6 9 + * 0x73 7 x 1 LCD_RS 3 10 + */ +static const struct ts5500_dio ts5500_lcd[] = { + TS5500_DIO_GROUP(0x72, 0, 0x7d, 2), + TS5500_DIO_GROUP(0x72, 4, 0x7d, 3), + TS5500_DIO_OUT(0x73, 0), + TS5500_DIO_IN(0x73, 6), + TS5500_DIO_IN_IRQ(0x73, 7, 1), +}; + +static inline void ts5500_set_mask(u8 mask, u8 addr) +{ + u8 val = inb(addr); + val |= mask; + outb(val, addr); +} + +static inline void ts5500_clear_mask(u8 mask, u8 addr) +{ + u8 val = inb(addr); + val &= ~mask; + outb(val, addr); +} + +static int ts5500_gpio_input(struct gpio_chip *chip, unsigned offset) +{ + struct ts5500_priv *priv = gpiochip_get_data(chip); + const struct ts5500_dio line = priv->pinout[offset]; + unsigned long flags; + + if (line.no_input) + return -ENXIO; + + if (line.no_output) + return 0; + + spin_lock_irqsave(&priv->lock, flags); + ts5500_clear_mask(line.control_mask, line.control_addr); + spin_unlock_irqrestore(&priv->lock, flags); + + return 0; +} + +static int ts5500_gpio_get(struct gpio_chip *chip, unsigned offset) +{ + struct ts5500_priv *priv = gpiochip_get_data(chip); + const struct ts5500_dio line = priv->pinout[offset]; + + return !!(inb(line.value_addr) & line.value_mask); +} + +static int ts5500_gpio_output(struct gpio_chip *chip, unsigned offset, int val) +{ + struct ts5500_priv *priv = gpiochip_get_data(chip); + const struct ts5500_dio line = priv->pinout[offset]; + unsigned long flags; + + if (line.no_output) + return -ENXIO; + + spin_lock_irqsave(&priv->lock, flags); + if (!line.no_input) + ts5500_set_mask(line.control_mask, line.control_addr); + + if (val) + ts5500_set_mask(line.value_mask, line.value_addr); + else + ts5500_clear_mask(line.value_mask, line.value_addr); + spin_unlock_irqrestore(&priv->lock, flags); + + return 0; +} + +static void ts5500_gpio_set(struct gpio_chip *chip, unsigned offset, int val) +{ + struct ts5500_priv *priv = gpiochip_get_data(chip); + const struct ts5500_dio line = priv->pinout[offset]; + unsigned long flags; + + spin_lock_irqsave(&priv->lock, flags); + if (val) + ts5500_set_mask(line.value_mask, line.value_addr); + else + ts5500_clear_mask(line.value_mask, line.value_addr); + spin_unlock_irqrestore(&priv->lock, flags); +} + +static int ts5500_gpio_to_irq(struct gpio_chip *chip, unsigned offset) +{ + struct ts5500_priv *priv = gpiochip_get_data(chip); + const struct ts5500_dio *block = priv->pinout; + const struct ts5500_dio line = block[offset]; + + /* Only one pin is connected to an interrupt */ + if (line.irq) + return line.irq; + + /* As this pin is input-only, we may strap it to another in/out pin */ + if (priv->strap) + return priv->hwirq; + + return -ENXIO; +} + +static int ts5500_enable_irq(struct ts5500_priv *priv) +{ + int ret = 0; + unsigned long flags; + + spin_lock_irqsave(&priv->lock, flags); + if (priv->hwirq == 7) + ts5500_set_mask(BIT(7), 0x7a); /* DIO1_13 on IRQ7 */ + else if (priv->hwirq == 6) + ts5500_set_mask(BIT(7), 0x7d); /* DIO2_13 on IRQ6 */ + else if (priv->hwirq == 1) + ts5500_set_mask(BIT(6), 0x7d); /* LCD_RS on IRQ1 */ + else + ret = -EINVAL; + spin_unlock_irqrestore(&priv->lock, flags); + + return ret; +} + +static void ts5500_disable_irq(struct ts5500_priv *priv) +{ + unsigned long flags; + + spin_lock_irqsave(&priv->lock, flags); + if (priv->hwirq == 7) + ts5500_clear_mask(BIT(7), 0x7a); /* DIO1_13 on IRQ7 */ + else if (priv->hwirq == 6) + ts5500_clear_mask(BIT(7), 0x7d); /* DIO2_13 on IRQ6 */ + else if (priv->hwirq == 1) + ts5500_clear_mask(BIT(6), 0x7d); /* LCD_RS on IRQ1 */ + else + dev_err(priv->gpio_chip.parent, "invalid hwirq %d\n", + priv->hwirq); + spin_unlock_irqrestore(&priv->lock, flags); +} + +static int ts5500_dio_probe(struct platform_device *pdev) +{ + enum ts5500_blocks block = platform_get_device_id(pdev)->driver_data; + struct device *dev = &pdev->dev; + const char *name = dev_name(dev); + struct ts5500_priv *priv; + unsigned long flags; + int ret; + + ret = platform_get_irq(pdev, 0); + if (ret < 0) + return ret; + + priv = devm_kzalloc(dev, sizeof(struct ts5500_priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + platform_set_drvdata(pdev, priv); + priv->hwirq = ret; + spin_lock_init(&priv->lock); + + priv->gpio_chip.owner = THIS_MODULE; + priv->gpio_chip.label = name; + priv->gpio_chip.parent = dev; + priv->gpio_chip.direction_input = ts5500_gpio_input; + priv->gpio_chip.direction_output = ts5500_gpio_output; + priv->gpio_chip.get = ts5500_gpio_get; + priv->gpio_chip.set = ts5500_gpio_set; + priv->gpio_chip.to_irq = ts5500_gpio_to_irq; + priv->gpio_chip.base = -1; + + switch (block) { + case TS5500_DIO1: + priv->pinout = ts5500_dio1; + priv->gpio_chip.ngpio = ARRAY_SIZE(ts5500_dio1); + + if (!devm_request_region(dev, 0x7a, 3, name)) { + dev_err(dev, "failed to request %s ports\n", name); + return -EBUSY; + } + break; + case TS5500_DIO2: + priv->pinout = ts5500_dio2; + priv->gpio_chip.ngpio = ARRAY_SIZE(ts5500_dio2); + + if (!devm_request_region(dev, 0x7e, 2, name)) { + dev_err(dev, "failed to request %s ports\n", name); + return -EBUSY; + } + + if (hex7d_reserved) + break; + + if (!devm_request_region(dev, 0x7d, 1, name)) { + dev_err(dev, "failed to request %s 7D\n", name); + return -EBUSY; + } + + hex7d_reserved = true; + break; + case TS5500_LCD: + case TS5600_LCD: + priv->pinout = ts5500_lcd; + priv->gpio_chip.ngpio = ARRAY_SIZE(ts5500_lcd); + + if (!devm_request_region(dev, 0x72, 2, name)) { + dev_err(dev, "failed to request %s ports\n", name); + return -EBUSY; + } + + if (!hex7d_reserved) { + if (!devm_request_region(dev, 0x7d, 1, name)) { + dev_err(dev, "failed to request %s 7D\n", name); + return -EBUSY; + } + + hex7d_reserved = true; + } + + /* Ensure usage of LCD port as DIO */ + spin_lock_irqsave(&priv->lock, flags); + ts5500_clear_mask(BIT(4), 0x7d); + spin_unlock_irqrestore(&priv->lock, flags); + break; + } + + ret = devm_gpiochip_add_data(dev, &priv->gpio_chip, priv); + if (ret) { + dev_err(dev, "failed to register the gpio chip\n"); + return ret; + } + + ret = ts5500_enable_irq(priv); + if (ret) { + dev_err(dev, "invalid interrupt %d\n", priv->hwirq); + return ret; + } + + return 0; +} + +static int ts5500_dio_remove(struct platform_device *pdev) +{ + struct ts5500_priv *priv = platform_get_drvdata(pdev); + + ts5500_disable_irq(priv); + + return 0; +} + +static const struct platform_device_id ts5500_dio_ids[] = { + { "ts5500-dio1", TS5500_DIO1 }, + { "ts5500-dio2", TS5500_DIO2 }, + { "ts5500-dio-lcd", TS5500_LCD }, + { "ts5600-dio-lcd", TS5600_LCD }, + { } +}; +MODULE_DEVICE_TABLE(platform, ts5500_dio_ids); + +static struct platform_driver ts5500_dio_driver = { + .driver = { + .name = "ts5500-dio", + }, + .probe = ts5500_dio_probe, + .remove = ts5500_dio_remove, + .id_table = ts5500_dio_ids, +}; + +module_platform_driver(ts5500_dio_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Savoir-faire Linux Inc. <kernel@savoirfairelinux.com>"); +MODULE_DESCRIPTION("Technologic Systems TS-5500 Digital I/O driver"); |