Merge tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-nextgrafted

Pull networking updates from Jakub Kicinski:
 "Core:

   - Add dedicated kmem_cache for typical/small skb->head, avoid having
     to access struct page at kfree time, and improve memory use.

   - Introduce sysctl to set default RPS configuration for new netdevs.

   - Define Netlink protocol specification format which can be used to
     describe messages used by each family and auto-generate parsers.
     Add tools for generating kernel data structures and uAPI headers.

   - Expose all net/core sysctls inside netns.

   - Remove 4s sleep in netpoll if carrier is instantly detected on
     boot.

   - Add configurable limit of MDB entries per port, and port-vlan.

   - Continue populating drop reasons throughout the stack.

   - Retire a handful of legacy Qdiscs and classifiers.

  Protocols:

   - Support IPv4 big TCP (TSO frames larger than 64kB).

   - Add IP_LOCAL_PORT_RANGE socket option, to control local port range
     on socket by socket basis.

   - Track and report in procfs number of MPTCP sockets used.

   - Support mixing IPv4 and IPv6 flows in the in-kernel MPTCP path
     manager.

   - IPv6: don't check net.ipv6.route.max_size and rely on garbage
     collection to free memory (similarly to IPv4).

   - Support Penultimate Segment Pop (PSP) flavor in SRv6 (RFC8986).

   - ICMP: add per-rate limit counters.

   - Add support for user scanning requests in ieee802154.

   - Remove static WEP support.

   - Support minimal Wi-Fi 7 Extremely High Throughput (EHT) rate
     reporting.

   - WiFi 7 EHT channel puncturing support (client & AP).

  BPF:

   - Add a rbtree data structure following the "next-gen data structure"
     precedent set by recently added linked list, that is, by using
     kfunc + kptr instead of adding a new BPF map type.

   - Expose XDP hints via kfuncs with initial support for RX hash and
     timestamp metadata.

   - Add BPF_F_NO_TUNNEL_KEY extension to bpf_skb_set_tunnel_key to
     better support decap on GRE tunnel devices not operating in collect
     metadata.

   - Improve x86 JIT's codegen for PROBE_MEM runtime error checks.

   - Remove the need for trace_printk_lock for bpf_trace_printk and
     bpf_trace_vprintk helpers.

   - Extend libbpf's bpf_tracing.h support for tracing arguments of
     kprobes/uprobes and syscall as a special case.

   - Significantly reduce the search time for module symbols by
     livepatch and BPF.

   - Enable cpumasks to be used as kptrs, which is useful for tracing
     programs tracking which tasks end up running on which CPUs in
     different time intervals.

   - Add support for BPF trampoline on s390x and riscv64.

   - Add capability to export the XDP features supported by the NIC.

   - Add __bpf_kfunc tag for marking kernel functions as kfuncs.

   - Add cgroup.memory=nobpf kernel parameter option to disable BPF
     memory accounting for container environments.

  Netfilter:

   - Remove the CLUSTERIP target. It has been marked as obsolete for
     years, and we still have WARN splats wrt races of the out-of-band
     /proc interface installed by this target.

   - Add 'destroy' commands to nf_tables. They are identical to the
     existing 'delete' commands, but do not return an error if the
     referenced object (set, chain, rule...) did not exist.

  Driver API:

   - Improve cpumask_local_spread() locality to help NICs set the right
     IRQ affinity on AMD platforms.

   - Separate C22 and C45 MDIO bus transactions more clearly.

   - Introduce new DCB table to control DSCP rewrite on egress.

   - Support configuration of Physical Layer Collision Avoidance (PLCA)
     Reconciliation Sublayer (RS) (802.3cg-2019). Modern version of
     shared medium Ethernet.

   - Support for MAC Merge layer (IEEE 802.3-2018 clause 99). Allowing
     preemption of low priority frames by high priority frames.

   - Add support for controlling MACSec offload using netlink SET.

   - Rework devlink instance refcounts to allow registration and
     de-registration under the instance lock. Split the code into
     multiple files, drop some of the unnecessarily granular locks and
     factor out common parts of netlink operation handling.

   - Add TX frame aggregation parameters (for USB drivers).

   - Add a new attr TCA_EXT_WARN_MSG to report TC (offload) warning
     messages with notifications for debug.

   - Allow offloading of UDP NEW connections via act_ct.

   - Add support for per action HW stats in TC.

   - Support hardware miss to TC action (continue processing in SW from
     a specific point in the action chain).

   - Warn if old Wireless Extension user space interface is used with
     modern cfg80211/mac80211 drivers. Do not support Wireless
     Extensions for Wi-Fi 7 devices at all. Everyone should switch to
     using nl80211 interface instead.

   - Improve the CAN bit timing configuration. Use extack to return
     error messages directly to user space, update the SJW handling,
     including the definition of a new default value that will benefit
     CAN-FD controllers, by increasing their oscillator tolerance.

  New hardware / drivers:

   - Ethernet:
      - nVidia BlueField-3 support (control traffic driver)
      - Ethernet support for imx93 SoCs
      - Motorcomm yt8531 gigabit Ethernet PHY
      - onsemi NCN26000 10BASE-T1S PHY (with support for PLCA)
      - Microchip LAN8841 PHY (incl. cable diagnostics and PTP)
      - Amlogic gxl MDIO mux

   - WiFi:
      - RealTek RTL8188EU (rtl8xxxu)
      - Qualcomm Wi-Fi 7 devices (ath12k)

   - CAN:
      - Renesas R-Car V4H

  Drivers:

   - Bluetooth:
      - Set Per Platform Antenna Gain (PPAG) for Intel controllers.

   - Ethernet NICs:
      - Intel (1G, igc):
         - support TSN / Qbv / packet scheduling features of i226 model
      - Intel (100G, ice):
         - use GNSS subsystem instead of TTY
         - multi-buffer XDP support
         - extend support for GPIO pins to E823 devices
      - nVidia/Mellanox:
         - update the shared buffer configuration on PFC commands
         - implement PTP adjphase function for HW offset control
         - TC support for Geneve and GRE with VF tunnel offload
         - more efficient crypto key management method
         - multi-port eswitch support
      - Netronome/Corigine:
         - add DCB IEEE support
         - support IPsec offloading for NFP3800
      - Freescale/NXP (enetc):
         - support XDP_REDIRECT for XDP non-linear buffers
         - improve reconfig, avoid link flap and waiting for idle
         - support MAC Merge layer
      - Other NICs:
         - sfc/ef100: add basic devlink support for ef100
         - ionic: rx_push mode operation (writing descriptors via MMIO)
         - bnxt: use the auxiliary bus abstraction for RDMA
         - r8169: disable ASPM and reset bus in case of tx timeout
         - cpsw: support QSGMII mode for J721e CPSW9G
         - cpts: support pulse-per-second output
         - ngbe: add an mdio bus driver
         - usbnet: optimize usbnet_bh() by avoiding unnecessary queuing
         - r8152: handle devices with FW with NCM support
         - amd-xgbe: support 10Mbps, 2.5GbE speeds and rx-adaptation
         - virtio-net: support multi buffer XDP
         - virtio/vsock: replace virtio_vsock_pkt with sk_buff
         - tsnep: XDP support

   - Ethernet high-speed switches:
      - nVidia/Mellanox (mlxsw):
         - add support for latency TLV (in FW control messages)
      - Microchip (sparx5):
         - separate explicit and implicit traffic forwarding rules, make
           the implicit rules always active
         - add support for egress DSCP rewrite
         - IS0 VCAP support (Ingress Classification)
         - IS2 VCAP filters (protos, L3 addrs, L4 ports, flags, ToS
           etc.)
         - ES2 VCAP support (Egress Access Control)
         - support for Per-Stream Filtering and Policing (802.1Q,
           8.6.5.1)

   - Ethernet embedded switches:
      - Marvell (mv88e6xxx):
         - add MAB (port auth) offload support
         - enable PTP receive for mv88e6390
      - NXP (ocelot):
         - support MAC Merge layer
         - support for the the vsc7512 internal copper phys
      - Microchip:
         - lan9303: convert to PHYLINK
         - lan966x: support TC flower filter statistics
         - lan937x: PTP support for KSZ9563/KSZ8563 and LAN937x
         - lan937x: support Credit Based Shaper configuration
         - ksz9477: support Energy Efficient Ethernet
      - other:
         - qca8k: convert to regmap read/write API, use bulk operations
         - rswitch: Improve TX timestamp accuracy

   - Intel WiFi (iwlwifi):
      - EHT (Wi-Fi 7) rate reporting
      - STEP equalizer support: transfer some STEP (connection to radio
        on platforms with integrated wifi) related parameters from the
        BIOS to the firmware.

   - Qualcomm 802.11ax WiFi (ath11k):
      - IPQ5018 support
      - Fine Timing Measurement (FTM) responder role support
      - channel 177 support

   - MediaTek WiFi (mt76):
      - per-PHY LED support
      - mt7996: EHT (Wi-Fi 7) support
      - Wireless Ethernet Dispatch (WED) reset support
      - switch to using page pool allocator

   - RealTek WiFi (rtw89):
      - support new version of Bluetooth co-existance

   - Mobile:
      - rmnet: support TX aggregation"

* tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1872 commits)
  page_pool: add a comment explaining the fragment counter usage
  net: ethtool: fix __ethtool_dev_mm_supported() implementation
  ethtool: pse-pd: Fix double word in comments
  xsk: add linux/vmalloc.h to xsk.c
  sefltests: netdevsim: wait for devlink instance after netns removal
  selftest: fib_tests: Always cleanup before exit
  net/mlx5e: Align IPsec ASO result memory to be as required by hardware
  net/mlx5e: TC, Set CT miss to the specific ct action instance
  net/mlx5e: Rename CHAIN_TO_REG to MAPPED_OBJ_TO_REG
  net/mlx5: Refactor tc miss handling to a single function
  net/mlx5: Kconfig: Make tc offload depend on tc skb extension
  net/sched: flower: Support hardware miss to tc action
  net/sched: flower: Move filter handle initialization earlier
  net/sched: cls_api: Support hardware miss to tc action
  net/sched: Rename user cookie and act cookie
  sfc: fix builds without CONFIG_RTC_LIB
  sfc: clean up some inconsistent indentings
  net/mlx4_en: Introduce flexible array to silence overflow warning
  net: lan966x: Fix possible deadlock inside PTP
  net/ulp: Remove redundant ->clone() test in inet_clone_ulp().
  ...

1 files changed, 594 insertions, 0 deletions

diff --git a/drivers/gpu/drm/sti/sti_dvo.c b/drivers/gpu/drm/sti/sti_dvo.c
new file mode 100644
index 000000000..577c477b5
--- /dev/null
+++ b/drivers/gpu/drm/sti/sti_dvo.c
@@ -0,0 +1,594 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) STMicroelectronics SA 2014
+ * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
+ */
+
+#include <linux/clk.h>
+#include <linux/component.h>
+#include <linux/debugfs.h>
+#include <linux/module.h>
+#include <linux/of_gpio.h>
+#include <linux/platform_device.h>
+
+#include <drm/drm_atomic_helper.h>
+#include <drm/drm_bridge.h>
+#include <drm/drm_device.h>
+#include <drm/drm_panel.h>
+#include <drm/drm_print.h>
+#include <drm/drm_probe_helper.h>
+
+#include "sti_awg_utils.h"
+#include "sti_drv.h"
+#include "sti_mixer.h"
+
+/* DVO registers */
+#define DVO_AWG_DIGSYNC_CTRL      0x0000
+#define DVO_DOF_CFG               0x0004
+#define DVO_LUT_PROG_LOW          0x0008
+#define DVO_LUT_PROG_MID          0x000C
+#define DVO_LUT_PROG_HIGH         0x0010
+#define DVO_DIGSYNC_INSTR_I       0x0100
+
+#define DVO_AWG_CTRL_EN           BIT(0)
+#define DVO_AWG_FRAME_BASED_SYNC  BIT(2)
+
+#define DVO_DOF_EN_LOWBYTE        BIT(0)
+#define DVO_DOF_EN_MIDBYTE        BIT(1)
+#define DVO_DOF_EN_HIGHBYTE       BIT(2)
+#define DVO_DOF_EN                BIT(6)
+#define DVO_DOF_MOD_COUNT_SHIFT   8
+
+#define DVO_LUT_ZERO              0
+#define DVO_LUT_Y_G               1
+#define DVO_LUT_Y_G_DEL           2
+#define DVO_LUT_CB_B              3
+#define DVO_LUT_CB_B_DEL          4
+#define DVO_LUT_CR_R              5
+#define DVO_LUT_CR_R_DEL          6
+#define DVO_LUT_HOLD              7
+
+struct dvo_config {
+	u32 flags;
+	u32 lowbyte;
+	u32 midbyte;
+	u32 highbyte;
+	int (*awg_fwgen_fct)(
+			struct awg_code_generation_params *fw_gen_params,
+			struct awg_timing *timing);
+};
+
+static struct dvo_config rgb_24bit_de_cfg = {
+	.flags         = (0L << DVO_DOF_MOD_COUNT_SHIFT),
+	.lowbyte       = DVO_LUT_CR_R,
+	.midbyte       = DVO_LUT_Y_G,
+	.highbyte      = DVO_LUT_CB_B,
+	.awg_fwgen_fct = sti_awg_generate_code_data_enable_mode,
+};
+
+/*
+ * STI digital video output structure
+ *
+ * @dev: driver device
+ * @drm_dev: pointer to drm device
+ * @mode: current display mode selected
+ * @regs: dvo registers
+ * @clk_pix: pixel clock for dvo
+ * @clk: clock for dvo
+ * @clk_main_parent: dvo parent clock if main path used
+ * @clk_aux_parent: dvo parent clock if aux path used
+ * @panel_node: panel node reference from device tree
+ * @panel: reference to the panel connected to the dvo
+ * @enabled: true if dvo is enabled else false
+ * @encoder: drm_encoder it is bound
+ */
+struct sti_dvo {
+	struct device dev;
+	struct drm_device *drm_dev;
+	struct drm_display_mode mode;
+	void __iomem *regs;
+	struct clk *clk_pix;
+	struct clk *clk;
+	struct clk *clk_main_parent;
+	struct clk *clk_aux_parent;
+	struct device_node *panel_node;
+	struct drm_panel *panel;
+	struct dvo_config *config;
+	bool enabled;
+	struct drm_encoder *encoder;
+	struct drm_bridge *bridge;
+};
+
+struct sti_dvo_connector {
+	struct drm_connector drm_connector;
+	struct drm_encoder *encoder;
+	struct sti_dvo *dvo;
+};
+
+#define to_sti_dvo_connector(x) \
+	container_of(x, struct sti_dvo_connector, drm_connector)
+
+#define BLANKING_LEVEL 16
+static int dvo_awg_generate_code(struct sti_dvo *dvo, u8 *ram_size, u32 *ram_code)
+{
+	struct drm_display_mode *mode = &dvo->mode;
+	struct dvo_config *config = dvo->config;
+	struct awg_code_generation_params fw_gen_params;
+	struct awg_timing timing;
+
+	fw_gen_params.ram_code = ram_code;
+	fw_gen_params.instruction_offset = 0;
+
+	timing.total_lines = mode->vtotal;
+	timing.active_lines = mode->vdisplay;
+	timing.blanking_lines = mode->vsync_start - mode->vdisplay;
+	timing.trailing_lines = mode->vtotal - mode->vsync_start;
+	timing.total_pixels = mode->htotal;
+	timing.active_pixels = mode->hdisplay;
+	timing.blanking_pixels = mode->hsync_start - mode->hdisplay;
+	timing.trailing_pixels = mode->htotal - mode->hsync_start;
+	timing.blanking_level = BLANKING_LEVEL;
+
+	if (config->awg_fwgen_fct(&fw_gen_params, &timing)) {
+		DRM_ERROR("AWG firmware not properly generated\n");
+		return -EINVAL;
+	}
+
+	*ram_size = fw_gen_params.instruction_offset;
+
+	return 0;
+}
+
+/* Configure AWG, writing instructions
+ *
+ * @dvo: pointer to DVO structure
+ * @awg_ram_code: pointer to AWG instructions table
+ * @nb: nb of AWG instructions
+ */
+static void dvo_awg_configure(struct sti_dvo *dvo, u32 *awg_ram_code, int nb)
+{
+	int i;
+
+	DRM_DEBUG_DRIVER("\n");
+
+	for (i = 0; i < nb; i++)
+		writel(awg_ram_code[i],
+		       dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4);
+	for (i = nb; i < AWG_MAX_INST; i++)
+		writel(0, dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4);
+
+	writel(DVO_AWG_CTRL_EN, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
+}
+
+#define DBGFS_DUMP(reg) seq_printf(s, "\n  %-25s 0x%08X", #reg, \
+				   readl(dvo->regs + reg))
+
+static void dvo_dbg_awg_microcode(struct seq_file *s, void __iomem *reg)
+{
+	unsigned int i;
+
+	seq_puts(s, "\n\n");
+	seq_puts(s, "  DVO AWG microcode:");
+	for (i = 0; i < AWG_MAX_INST; i++) {
+		if (i % 8 == 0)
+			seq_printf(s, "\n  %04X:", i);
+		seq_printf(s, " %04X", readl(reg + i * 4));
+	}
+}
+
+static int dvo_dbg_show(struct seq_file *s, void *data)
+{
+	struct drm_info_node *node = s->private;
+	struct sti_dvo *dvo = (struct sti_dvo *)node->info_ent->data;
+
+	seq_printf(s, "DVO: (vaddr = 0x%p)", dvo->regs);
+	DBGFS_DUMP(DVO_AWG_DIGSYNC_CTRL);
+	DBGFS_DUMP(DVO_DOF_CFG);
+	DBGFS_DUMP(DVO_LUT_PROG_LOW);
+	DBGFS_DUMP(DVO_LUT_PROG_MID);
+	DBGFS_DUMP(DVO_LUT_PROG_HIGH);
+	dvo_dbg_awg_microcode(s, dvo->regs + DVO_DIGSYNC_INSTR_I);
+	seq_putc(s, '\n');
+	return 0;
+}
+
+static struct drm_info_list dvo_debugfs_files[] = {
+	{ "dvo", dvo_dbg_show, 0, NULL },
+};
+
+static void dvo_debugfs_init(struct sti_dvo *dvo, struct drm_minor *minor)
+{
+	unsigned int i;
+
+	for (i = 0; i < ARRAY_SIZE(dvo_debugfs_files); i++)
+		dvo_debugfs_files[i].data = dvo;
+
+	drm_debugfs_create_files(dvo_debugfs_files,
+				 ARRAY_SIZE(dvo_debugfs_files),
+				 minor->debugfs_root, minor);
+}
+
+static void sti_dvo_disable(struct drm_bridge *bridge)
+{
+	struct sti_dvo *dvo = bridge->driver_private;
+
+	if (!dvo->enabled)
+		return;
+
+	DRM_DEBUG_DRIVER("\n");
+
+	if (dvo->config->awg_fwgen_fct)
+		writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
+
+	writel(0x00000000, dvo->regs + DVO_DOF_CFG);
+
+	drm_panel_disable(dvo->panel);
+
+	/* Disable/unprepare dvo clock */
+	clk_disable_unprepare(dvo->clk_pix);
+	clk_disable_unprepare(dvo->clk);
+
+	dvo->enabled = false;
+}
+
+static void sti_dvo_pre_enable(struct drm_bridge *bridge)
+{
+	struct sti_dvo *dvo = bridge->driver_private;
+	struct dvo_config *config = dvo->config;
+	u32 val;
+
+	DRM_DEBUG_DRIVER("\n");
+
+	if (dvo->enabled)
+		return;
+
+	/* Make sure DVO is disabled */
+	writel(0x00000000, dvo->regs + DVO_DOF_CFG);
+	writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
+
+	if (config->awg_fwgen_fct) {
+		u8 nb_instr;
+		u32 awg_ram_code[AWG_MAX_INST];
+		/* Configure AWG */
+		if (!dvo_awg_generate_code(dvo, &nb_instr, awg_ram_code))
+			dvo_awg_configure(dvo, awg_ram_code, nb_instr);
+		else
+			return;
+	}
+
+	/* Prepare/enable clocks */
+	if (clk_prepare_enable(dvo->clk_pix))
+		DRM_ERROR("Failed to prepare/enable dvo_pix clk\n");
+	if (clk_prepare_enable(dvo->clk))
+		DRM_ERROR("Failed to prepare/enable dvo clk\n");
+
+	drm_panel_enable(dvo->panel);
+
+	/* Set LUT */
+	writel(config->lowbyte,  dvo->regs + DVO_LUT_PROG_LOW);
+	writel(config->midbyte,  dvo->regs + DVO_LUT_PROG_MID);
+	writel(config->highbyte, dvo->regs + DVO_LUT_PROG_HIGH);
+
+	/* Digital output formatter config */
+	val = (config->flags | DVO_DOF_EN);
+	writel(val, dvo->regs + DVO_DOF_CFG);
+
+	dvo->enabled = true;
+}
+
+static void sti_dvo_set_mode(struct drm_bridge *bridge,
+			     const struct drm_display_mode *mode,
+			     const struct drm_display_mode *adjusted_mode)
+{
+	struct sti_dvo *dvo = bridge->driver_private;
+	struct sti_mixer *mixer = to_sti_mixer(dvo->encoder->crtc);
+	int rate = mode->clock * 1000;
+	struct clk *clkp;
+	int ret;
+
+	DRM_DEBUG_DRIVER("\n");
+
+	drm_mode_copy(&dvo->mode, mode);
+
+	/* According to the path used (main or aux), the dvo clocks should
+	 * have a different parent clock. */
+	if (mixer->id == STI_MIXER_MAIN)
+		clkp = dvo->clk_main_parent;
+	else
+		clkp = dvo->clk_aux_parent;
+
+	if (clkp) {
+		clk_set_parent(dvo->clk_pix, clkp);
+		clk_set_parent(dvo->clk, clkp);
+	}
+
+	/* DVO clocks = compositor clock */
+	ret = clk_set_rate(dvo->clk_pix, rate);
+	if (ret < 0) {
+		DRM_ERROR("Cannot set rate (%dHz) for dvo_pix clk\n", rate);
+		return;
+	}
+
+	ret = clk_set_rate(dvo->clk, rate);
+	if (ret < 0) {
+		DRM_ERROR("Cannot set rate (%dHz) for dvo clk\n", rate);
+		return;
+	}
+
+	/* For now, we only support 24bit data enable (DE) synchro format */
+	dvo->config = &rgb_24bit_de_cfg;
+}
+
+static void sti_dvo_bridge_nope(struct drm_bridge *bridge)
+{
+	/* do nothing */
+}
+
+static const struct drm_bridge_funcs sti_dvo_bridge_funcs = {
+	.pre_enable = sti_dvo_pre_enable,
+	.enable = sti_dvo_bridge_nope,
+	.disable = sti_dvo_disable,
+	.post_disable = sti_dvo_bridge_nope,
+	.mode_set = sti_dvo_set_mode,
+};
+
+static int sti_dvo_connector_get_modes(struct drm_connector *connector)
+{
+	struct sti_dvo_connector *dvo_connector
+		= to_sti_dvo_connector(connector);
+	struct sti_dvo *dvo = dvo_connector->dvo;
+
+	if (dvo->panel)
+		return drm_panel_get_modes(dvo->panel, connector);
+
+	return 0;
+}
+
+#define CLK_TOLERANCE_HZ 50
+
+static enum drm_mode_status
+sti_dvo_connector_mode_valid(struct drm_connector *connector,
+			     struct drm_display_mode *mode)
+{
+	int target = mode->clock * 1000;
+	int target_min = target - CLK_TOLERANCE_HZ;
+	int target_max = target + CLK_TOLERANCE_HZ;
+	int result;
+	struct sti_dvo_connector *dvo_connector
+		= to_sti_dvo_connector(connector);
+	struct sti_dvo *dvo = dvo_connector->dvo;
+
+	result = clk_round_rate(dvo->clk_pix, target);
+
+	DRM_DEBUG_DRIVER("target rate = %d => available rate = %d\n",
+			 target, result);
+
+	if ((result < target_min) || (result > target_max)) {
+		DRM_DEBUG_DRIVER("dvo pixclk=%d not supported\n", target);
+		return MODE_BAD;
+	}
+
+	return MODE_OK;
+}
+
+static const
+struct drm_connector_helper_funcs sti_dvo_connector_helper_funcs = {
+	.get_modes = sti_dvo_connector_get_modes,
+	.mode_valid = sti_dvo_connector_mode_valid,
+};
+
+static enum drm_connector_status
+sti_dvo_connector_detect(struct drm_connector *connector, bool force)
+{
+	struct sti_dvo_connector *dvo_connector
+		= to_sti_dvo_connector(connector);
+	struct sti_dvo *dvo = dvo_connector->dvo;
+
+	DRM_DEBUG_DRIVER("\n");
+
+	if (!dvo->panel) {
+		dvo->panel = of_drm_find_panel(dvo->panel_node);
+		if (IS_ERR(dvo->panel))
+			dvo->panel = NULL;
+	}
+
+	if (dvo->panel)
+		return connector_status_connected;
+
+	return connector_status_disconnected;
+}
+
+static int sti_dvo_late_register(struct drm_connector *connector)
+{
+	struct sti_dvo_connector *dvo_connector
+		= to_sti_dvo_connector(connector);
+	struct sti_dvo *dvo = dvo_connector->dvo;
+
+	dvo_debugfs_init(dvo, dvo->drm_dev->primary);
+
+	return 0;
+}
+
+static const struct drm_connector_funcs sti_dvo_connector_funcs = {
+	.fill_modes = drm_helper_probe_single_connector_modes,
+	.detect = sti_dvo_connector_detect,
+	.destroy = drm_connector_cleanup,
+	.reset = drm_atomic_helper_connector_reset,
+	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
+	.late_register = sti_dvo_late_register,
+};
+
+static struct drm_encoder *sti_dvo_find_encoder(struct drm_device *dev)
+{
+	struct drm_encoder *encoder;
+
+	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+		if (encoder->encoder_type == DRM_MODE_ENCODER_LVDS)
+			return encoder;
+	}
+
+	return NULL;
+}
+
+static int sti_dvo_bind(struct device *dev, struct device *master, void *data)
+{
+	struct sti_dvo *dvo = dev_get_drvdata(dev);
+	struct drm_device *drm_dev = data;
+	struct drm_encoder *encoder;
+	struct sti_dvo_connector *connector;
+	struct drm_connector *drm_connector;
+	struct drm_bridge *bridge;
+	int err;
+
+	/* Set the drm device handle */
+	dvo->drm_dev = drm_dev;
+
+	encoder = sti_dvo_find_encoder(drm_dev);
+	if (!encoder)
+		return -ENOMEM;
+
+	connector = devm_kzalloc(dev, sizeof(*connector), GFP_KERNEL);
+	if (!connector)
+		return -ENOMEM;
+
+	connector->dvo = dvo;
+
+	bridge = devm_kzalloc(dev, sizeof(*bridge), GFP_KERNEL);
+	if (!bridge)
+		return -ENOMEM;
+
+	bridge->driver_private = dvo;
+	bridge->funcs = &sti_dvo_bridge_funcs;
+	bridge->of_node = dvo->dev.of_node;
+	drm_bridge_add(bridge);
+
+	err = drm_bridge_attach(encoder, bridge, NULL, 0);
+	if (err)
+		return err;
+
+	dvo->bridge = bridge;
+	connector->encoder = encoder;
+	dvo->encoder = encoder;
+
+	drm_connector = (struct drm_connector *)connector;
+
+	drm_connector->polled = DRM_CONNECTOR_POLL_HPD;
+
+	drm_connector_init(drm_dev, drm_connector,
+			   &sti_dvo_connector_funcs, DRM_MODE_CONNECTOR_LVDS);
+	drm_connector_helper_add(drm_connector,
+				 &sti_dvo_connector_helper_funcs);
+
+	err = drm_connector_attach_encoder(drm_connector, encoder);
+	if (err) {
+		DRM_ERROR("Failed to attach a connector to a encoder\n");
+		goto err_sysfs;
+	}
+
+	return 0;
+
+err_sysfs:
+	drm_bridge_remove(bridge);
+	return -EINVAL;
+}
+
+static void sti_dvo_unbind(struct device *dev,
+			   struct device *master, void *data)
+{
+	struct sti_dvo *dvo = dev_get_drvdata(dev);
+
+	drm_bridge_remove(dvo->bridge);
+}
+
+static const struct component_ops sti_dvo_ops = {
+	.bind = sti_dvo_bind,
+	.unbind = sti_dvo_unbind,
+};
+
+static int sti_dvo_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct sti_dvo *dvo;
+	struct resource *res;
+	struct device_node *np = dev->of_node;
+
+	DRM_INFO("%s\n", __func__);
+
+	dvo = devm_kzalloc(dev, sizeof(*dvo), GFP_KERNEL);
+	if (!dvo) {
+		DRM_ERROR("Failed to allocate memory for DVO\n");
+		return -ENOMEM;
+	}
+
+	dvo->dev = pdev->dev;
+
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dvo-reg");
+	if (!res) {
+		DRM_ERROR("Invalid dvo resource\n");
+		return -ENOMEM;
+	}
+	dvo->regs = devm_ioremap(dev, res->start,
+			resource_size(res));
+	if (!dvo->regs)
+		return -ENOMEM;
+
+	dvo->clk_pix = devm_clk_get(dev, "dvo_pix");
+	if (IS_ERR(dvo->clk_pix)) {
+		DRM_ERROR("Cannot get dvo_pix clock\n");
+		return PTR_ERR(dvo->clk_pix);
+	}
+
+	dvo->clk = devm_clk_get(dev, "dvo");
+	if (IS_ERR(dvo->clk)) {
+		DRM_ERROR("Cannot get dvo clock\n");
+		return PTR_ERR(dvo->clk);
+	}
+
+	dvo->clk_main_parent = devm_clk_get(dev, "main_parent");
+	if (IS_ERR(dvo->clk_main_parent)) {
+		DRM_DEBUG_DRIVER("Cannot get main_parent clock\n");
+		dvo->clk_main_parent = NULL;
+	}
+
+	dvo->clk_aux_parent = devm_clk_get(dev, "aux_parent");
+	if (IS_ERR(dvo->clk_aux_parent)) {
+		DRM_DEBUG_DRIVER("Cannot get aux_parent clock\n");
+		dvo->clk_aux_parent = NULL;
+	}
+
+	dvo->panel_node = of_parse_phandle(np, "sti,panel", 0);
+	if (!dvo->panel_node)
+		DRM_ERROR("No panel associated to the dvo output\n");
+	of_node_put(dvo->panel_node);
+
+	platform_set_drvdata(pdev, dvo);
+
+	return component_add(&pdev->dev, &sti_dvo_ops);
+}
+
+static int sti_dvo_remove(struct platform_device *pdev)
+{
+	component_del(&pdev->dev, &sti_dvo_ops);
+	return 0;
+}
+
+static const struct of_device_id dvo_of_match[] = {
+	{ .compatible = "st,stih407-dvo", },
+	{ /* end node */ }
+};
+MODULE_DEVICE_TABLE(of, dvo_of_match);
+
+struct platform_driver sti_dvo_driver = {
+	.driver = {
+		.name = "sti-dvo",
+		.owner = THIS_MODULE,
+		.of_match_table = dvo_of_match,
+	},
+	.probe = sti_dvo_probe,
+	.remove = sti_dvo_remove,
+};
+
+MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
+MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
+MODULE_LICENSE("GPL");