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authorLibravatar Linus Torvalds <torvalds@linux-foundation.org>2023-02-21 18:24:12 -0800
committerLibravatar Linus Torvalds <torvalds@linux-foundation.org>2023-02-21 18:24:12 -0800
commit5b7c4cabbb65f5c469464da6c5f614cbd7f730f2 (patch)
treecc5c2d0a898769fd59549594fedb3ee6f84e59a0 /drivers/misc/habanalabs/include/gaudi/gaudi_coresight.h
downloadlinux-5b7c4cabbb65f5c469464da6c5f614cbd7f730f2.tar.gz
linux-5b7c4cabbb65f5c469464da6c5f614cbd7f730f2.zip
Merge tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-nextgrafted
Pull networking updates from Jakub Kicinski: "Core: - Add dedicated kmem_cache for typical/small skb->head, avoid having to access struct page at kfree time, and improve memory use. - Introduce sysctl to set default RPS configuration for new netdevs. - Define Netlink protocol specification format which can be used to describe messages used by each family and auto-generate parsers. Add tools for generating kernel data structures and uAPI headers. - Expose all net/core sysctls inside netns. - Remove 4s sleep in netpoll if carrier is instantly detected on boot. - Add configurable limit of MDB entries per port, and port-vlan. - Continue populating drop reasons throughout the stack. - Retire a handful of legacy Qdiscs and classifiers. Protocols: - Support IPv4 big TCP (TSO frames larger than 64kB). - Add IP_LOCAL_PORT_RANGE socket option, to control local port range on socket by socket basis. - Track and report in procfs number of MPTCP sockets used. - Support mixing IPv4 and IPv6 flows in the in-kernel MPTCP path manager. - IPv6: don't check net.ipv6.route.max_size and rely on garbage collection to free memory (similarly to IPv4). - Support Penultimate Segment Pop (PSP) flavor in SRv6 (RFC8986). - ICMP: add per-rate limit counters. - Add support for user scanning requests in ieee802154. - Remove static WEP support. - Support minimal Wi-Fi 7 Extremely High Throughput (EHT) rate reporting. - WiFi 7 EHT channel puncturing support (client & AP). BPF: - Add a rbtree data structure following the "next-gen data structure" precedent set by recently added linked list, that is, by using kfunc + kptr instead of adding a new BPF map type. - Expose XDP hints via kfuncs with initial support for RX hash and timestamp metadata. - Add BPF_F_NO_TUNNEL_KEY extension to bpf_skb_set_tunnel_key to better support decap on GRE tunnel devices not operating in collect metadata. - Improve x86 JIT's codegen for PROBE_MEM runtime error checks. - Remove the need for trace_printk_lock for bpf_trace_printk and bpf_trace_vprintk helpers. - Extend libbpf's bpf_tracing.h support for tracing arguments of kprobes/uprobes and syscall as a special case. - Significantly reduce the search time for module symbols by livepatch and BPF. - Enable cpumasks to be used as kptrs, which is useful for tracing programs tracking which tasks end up running on which CPUs in different time intervals. - Add support for BPF trampoline on s390x and riscv64. - Add capability to export the XDP features supported by the NIC. - Add __bpf_kfunc tag for marking kernel functions as kfuncs. - Add cgroup.memory=nobpf kernel parameter option to disable BPF memory accounting for container environments. Netfilter: - Remove the CLUSTERIP target. It has been marked as obsolete for years, and we still have WARN splats wrt races of the out-of-band /proc interface installed by this target. - Add 'destroy' commands to nf_tables. They are identical to the existing 'delete' commands, but do not return an error if the referenced object (set, chain, rule...) did not exist. Driver API: - Improve cpumask_local_spread() locality to help NICs set the right IRQ affinity on AMD platforms. - Separate C22 and C45 MDIO bus transactions more clearly. - Introduce new DCB table to control DSCP rewrite on egress. - Support configuration of Physical Layer Collision Avoidance (PLCA) Reconciliation Sublayer (RS) (802.3cg-2019). Modern version of shared medium Ethernet. - Support for MAC Merge layer (IEEE 802.3-2018 clause 99). Allowing preemption of low priority frames by high priority frames. - Add support for controlling MACSec offload using netlink SET. - Rework devlink instance refcounts to allow registration and de-registration under the instance lock. Split the code into multiple files, drop some of the unnecessarily granular locks and factor out common parts of netlink operation handling. - Add TX frame aggregation parameters (for USB drivers). - Add a new attr TCA_EXT_WARN_MSG to report TC (offload) warning messages with notifications for debug. - Allow offloading of UDP NEW connections via act_ct. - Add support for per action HW stats in TC. - Support hardware miss to TC action (continue processing in SW from a specific point in the action chain). - Warn if old Wireless Extension user space interface is used with modern cfg80211/mac80211 drivers. Do not support Wireless Extensions for Wi-Fi 7 devices at all. Everyone should switch to using nl80211 interface instead. - Improve the CAN bit timing configuration. Use extack to return error messages directly to user space, update the SJW handling, including the definition of a new default value that will benefit CAN-FD controllers, by increasing their oscillator tolerance. New hardware / drivers: - Ethernet: - nVidia BlueField-3 support (control traffic driver) - Ethernet support for imx93 SoCs - Motorcomm yt8531 gigabit Ethernet PHY - onsemi NCN26000 10BASE-T1S PHY (with support for PLCA) - Microchip LAN8841 PHY (incl. cable diagnostics and PTP) - Amlogic gxl MDIO mux - WiFi: - RealTek RTL8188EU (rtl8xxxu) - Qualcomm Wi-Fi 7 devices (ath12k) - CAN: - Renesas R-Car V4H Drivers: - Bluetooth: - Set Per Platform Antenna Gain (PPAG) for Intel controllers. - Ethernet NICs: - Intel (1G, igc): - support TSN / Qbv / packet scheduling features of i226 model - Intel (100G, ice): - use GNSS subsystem instead of TTY - multi-buffer XDP support - extend support for GPIO pins to E823 devices - nVidia/Mellanox: - update the shared buffer configuration on PFC commands - implement PTP adjphase function for HW offset control - TC support for Geneve and GRE with VF tunnel offload - more efficient crypto key management method - multi-port eswitch support - Netronome/Corigine: - add DCB IEEE support - support IPsec offloading for NFP3800 - Freescale/NXP (enetc): - support XDP_REDIRECT for XDP non-linear buffers - improve reconfig, avoid link flap and waiting for idle - support MAC Merge layer - Other NICs: - sfc/ef100: add basic devlink support for ef100 - ionic: rx_push mode operation (writing descriptors via MMIO) - bnxt: use the auxiliary bus abstraction for RDMA - r8169: disable ASPM and reset bus in case of tx timeout - cpsw: support QSGMII mode for J721e CPSW9G - cpts: support pulse-per-second output - ngbe: add an mdio bus driver - usbnet: optimize usbnet_bh() by avoiding unnecessary queuing - r8152: handle devices with FW with NCM support - amd-xgbe: support 10Mbps, 2.5GbE speeds and rx-adaptation - virtio-net: support multi buffer XDP - virtio/vsock: replace virtio_vsock_pkt with sk_buff - tsnep: XDP support - Ethernet high-speed switches: - nVidia/Mellanox (mlxsw): - add support for latency TLV (in FW control messages) - Microchip (sparx5): - separate explicit and implicit traffic forwarding rules, make the implicit rules always active - add support for egress DSCP rewrite - IS0 VCAP support (Ingress Classification) - IS2 VCAP filters (protos, L3 addrs, L4 ports, flags, ToS etc.) - ES2 VCAP support (Egress Access Control) - support for Per-Stream Filtering and Policing (802.1Q, 8.6.5.1) - Ethernet embedded switches: - Marvell (mv88e6xxx): - add MAB (port auth) offload support - enable PTP receive for mv88e6390 - NXP (ocelot): - support MAC Merge layer - support for the the vsc7512 internal copper phys - Microchip: - lan9303: convert to PHYLINK - lan966x: support TC flower filter statistics - lan937x: PTP support for KSZ9563/KSZ8563 and LAN937x - lan937x: support Credit Based Shaper configuration - ksz9477: support Energy Efficient Ethernet - other: - qca8k: convert to regmap read/write API, use bulk operations - rswitch: Improve TX timestamp accuracy - Intel WiFi (iwlwifi): - EHT (Wi-Fi 7) rate reporting - STEP equalizer support: transfer some STEP (connection to radio on platforms with integrated wifi) related parameters from the BIOS to the firmware. - Qualcomm 802.11ax WiFi (ath11k): - IPQ5018 support - Fine Timing Measurement (FTM) responder role support - channel 177 support - MediaTek WiFi (mt76): - per-PHY LED support - mt7996: EHT (Wi-Fi 7) support - Wireless Ethernet Dispatch (WED) reset support - switch to using page pool allocator - RealTek WiFi (rtw89): - support new version of Bluetooth co-existance - Mobile: - rmnet: support TX aggregation" * tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1872 commits) page_pool: add a comment explaining the fragment counter usage net: ethtool: fix __ethtool_dev_mm_supported() implementation ethtool: pse-pd: Fix double word in comments xsk: add linux/vmalloc.h to xsk.c sefltests: netdevsim: wait for devlink instance after netns removal selftest: fib_tests: Always cleanup before exit net/mlx5e: Align IPsec ASO result memory to be as required by hardware net/mlx5e: TC, Set CT miss to the specific ct action instance net/mlx5e: Rename CHAIN_TO_REG to MAPPED_OBJ_TO_REG net/mlx5: Refactor tc miss handling to a single function net/mlx5: Kconfig: Make tc offload depend on tc skb extension net/sched: flower: Support hardware miss to tc action net/sched: flower: Move filter handle initialization earlier net/sched: cls_api: Support hardware miss to tc action net/sched: Rename user cookie and act cookie sfc: fix builds without CONFIG_RTC_LIB sfc: clean up some inconsistent indentings net/mlx4_en: Introduce flexible array to silence overflow warning net: lan966x: Fix possible deadlock inside PTP net/ulp: Remove redundant ->clone() test in inet_clone_ulp(). ...
Diffstat (limited to 'drivers/misc/habanalabs/include/gaudi/gaudi_coresight.h')
-rw-r--r--drivers/misc/habanalabs/include/gaudi/gaudi_coresight.h367
1 files changed, 367 insertions, 0 deletions
diff --git a/drivers/misc/habanalabs/include/gaudi/gaudi_coresight.h b/drivers/misc/habanalabs/include/gaudi/gaudi_coresight.h
new file mode 100644
index 000000000..c45cc7f4d
--- /dev/null
+++ b/drivers/misc/habanalabs/include/gaudi/gaudi_coresight.h
@@ -0,0 +1,367 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright 2016-2020 HabanaLabs, Ltd.
+ * All Rights Reserved.
+ *
+ */
+
+#ifndef GAUDI_CORESIGHT_H
+#define GAUDI_CORESIGHT_H
+
+enum gaudi_debug_stm_regs_index {
+ GAUDI_STM_FIRST = 0,
+ GAUDI_STM_MME0_ACC = GAUDI_STM_FIRST,
+ GAUDI_STM_MME0_SBAB,
+ GAUDI_STM_MME0_CTRL,
+ GAUDI_STM_MME1_ACC,
+ GAUDI_STM_MME1_SBAB,
+ GAUDI_STM_MME1_CTRL,
+ GAUDI_STM_MME2_ACC,
+ GAUDI_STM_MME2_SBAB,
+ GAUDI_STM_MME2_CTRL,
+ GAUDI_STM_MME3_ACC,
+ GAUDI_STM_MME3_SBAB,
+ GAUDI_STM_MME3_CTRL,
+ GAUDI_STM_DMA_IF_W_S,
+ GAUDI_STM_DMA_IF_E_S,
+ GAUDI_STM_DMA_IF_W_N,
+ GAUDI_STM_DMA_IF_E_N,
+ GAUDI_STM_CPU,
+ GAUDI_STM_DMA_CH_0_CS,
+ GAUDI_STM_DMA_CH_1_CS,
+ GAUDI_STM_DMA_CH_2_CS,
+ GAUDI_STM_DMA_CH_3_CS,
+ GAUDI_STM_DMA_CH_4_CS,
+ GAUDI_STM_DMA_CH_5_CS,
+ GAUDI_STM_DMA_CH_6_CS,
+ GAUDI_STM_DMA_CH_7_CS,
+ GAUDI_STM_PCIE,
+ GAUDI_STM_MMU_CS,
+ GAUDI_STM_PSOC,
+ GAUDI_STM_NIC0_0,
+ GAUDI_STM_NIC0_1,
+ GAUDI_STM_NIC1_0,
+ GAUDI_STM_NIC1_1,
+ GAUDI_STM_NIC2_0,
+ GAUDI_STM_NIC2_1,
+ GAUDI_STM_NIC3_0,
+ GAUDI_STM_NIC3_1,
+ GAUDI_STM_NIC4_0,
+ GAUDI_STM_NIC4_1,
+ GAUDI_STM_TPC0_EML,
+ GAUDI_STM_TPC1_EML,
+ GAUDI_STM_TPC2_EML,
+ GAUDI_STM_TPC3_EML,
+ GAUDI_STM_TPC4_EML,
+ GAUDI_STM_TPC5_EML,
+ GAUDI_STM_TPC6_EML,
+ GAUDI_STM_TPC7_EML,
+ GAUDI_STM_LAST = GAUDI_STM_TPC7_EML
+};
+
+enum gaudi_debug_etf_regs_index {
+ GAUDI_ETF_FIRST = 0,
+ GAUDI_ETF_MME0_ACC = GAUDI_ETF_FIRST,
+ GAUDI_ETF_MME0_SBAB,
+ GAUDI_ETF_MME0_CTRL,
+ GAUDI_ETF_MME1_ACC,
+ GAUDI_ETF_MME1_SBAB,
+ GAUDI_ETF_MME1_CTRL,
+ GAUDI_ETF_MME2_ACC,
+ GAUDI_ETF_MME2_SBAB,
+ GAUDI_ETF_MME2_CTRL,
+ GAUDI_ETF_MME3_ACC,
+ GAUDI_ETF_MME3_SBAB,
+ GAUDI_ETF_MME3_CTRL,
+ GAUDI_ETF_DMA_IF_W_S,
+ GAUDI_ETF_DMA_IF_E_S,
+ GAUDI_ETF_DMA_IF_W_N,
+ GAUDI_ETF_DMA_IF_E_N,
+ GAUDI_ETF_CPU_0,
+ GAUDI_ETF_CPU_1,
+ GAUDI_ETF_CPU_TRACE,
+ GAUDI_ETF_DMA_CH_0_CS,
+ GAUDI_ETF_DMA_CH_1_CS,
+ GAUDI_ETF_DMA_CH_2_CS,
+ GAUDI_ETF_DMA_CH_3_CS,
+ GAUDI_ETF_DMA_CH_4_CS,
+ GAUDI_ETF_DMA_CH_5_CS,
+ GAUDI_ETF_DMA_CH_6_CS,
+ GAUDI_ETF_DMA_CH_7_CS,
+ GAUDI_ETF_PCIE,
+ GAUDI_ETF_MMU_CS,
+ GAUDI_ETF_PSOC,
+ GAUDI_ETF_NIC0_0,
+ GAUDI_ETF_NIC0_1,
+ GAUDI_ETF_NIC1_0,
+ GAUDI_ETF_NIC1_1,
+ GAUDI_ETF_NIC2_0,
+ GAUDI_ETF_NIC2_1,
+ GAUDI_ETF_NIC3_0,
+ GAUDI_ETF_NIC3_1,
+ GAUDI_ETF_NIC4_0,
+ GAUDI_ETF_NIC4_1,
+ GAUDI_ETF_TPC0_EML,
+ GAUDI_ETF_TPC1_EML,
+ GAUDI_ETF_TPC2_EML,
+ GAUDI_ETF_TPC3_EML,
+ GAUDI_ETF_TPC4_EML,
+ GAUDI_ETF_TPC5_EML,
+ GAUDI_ETF_TPC6_EML,
+ GAUDI_ETF_TPC7_EML,
+ GAUDI_ETF_LAST = GAUDI_ETF_TPC7_EML
+};
+
+enum gaudi_debug_funnel_regs_index {
+ GAUDI_FUNNEL_FIRST = 0,
+ GAUDI_FUNNEL_MME0_ACC = GAUDI_FUNNEL_FIRST,
+ GAUDI_FUNNEL_MME1_ACC,
+ GAUDI_FUNNEL_MME2_ACC,
+ GAUDI_FUNNEL_MME3_ACC,
+ GAUDI_FUNNEL_SRAM_Y0_X0,
+ GAUDI_FUNNEL_SRAM_Y0_X1,
+ GAUDI_FUNNEL_SRAM_Y0_X2,
+ GAUDI_FUNNEL_SRAM_Y0_X3,
+ GAUDI_FUNNEL_SRAM_Y0_X4,
+ GAUDI_FUNNEL_SRAM_Y0_X5,
+ GAUDI_FUNNEL_SRAM_Y0_X6,
+ GAUDI_FUNNEL_SRAM_Y0_X7,
+ GAUDI_FUNNEL_SRAM_Y1_X0,
+ GAUDI_FUNNEL_SRAM_Y1_X1,
+ GAUDI_FUNNEL_SRAM_Y1_X2,
+ GAUDI_FUNNEL_SRAM_Y1_X3,
+ GAUDI_FUNNEL_SRAM_Y1_X4,
+ GAUDI_FUNNEL_SRAM_Y1_X5,
+ GAUDI_FUNNEL_SRAM_Y1_X6,
+ GAUDI_FUNNEL_SRAM_Y1_X7,
+ GAUDI_FUNNEL_SRAM_Y2_X0,
+ GAUDI_FUNNEL_SRAM_Y2_X1,
+ GAUDI_FUNNEL_SRAM_Y2_X2,
+ GAUDI_FUNNEL_SRAM_Y2_X3,
+ GAUDI_FUNNEL_SRAM_Y2_X4,
+ GAUDI_FUNNEL_SRAM_Y2_X5,
+ GAUDI_FUNNEL_SRAM_Y2_X6,
+ GAUDI_FUNNEL_SRAM_Y2_X7,
+ GAUDI_FUNNEL_SRAM_Y3_X0,
+ GAUDI_FUNNEL_SRAM_Y3_X1,
+ GAUDI_FUNNEL_SRAM_Y3_X2,
+ GAUDI_FUNNEL_SRAM_Y3_X4,
+ GAUDI_FUNNEL_SRAM_Y3_X3,
+ GAUDI_FUNNEL_SRAM_Y3_X5,
+ GAUDI_FUNNEL_SRAM_Y3_X6,
+ GAUDI_FUNNEL_SRAM_Y3_X7,
+ GAUDI_FUNNEL_SIF_0,
+ GAUDI_FUNNEL_SIF_1,
+ GAUDI_FUNNEL_SIF_2,
+ GAUDI_FUNNEL_SIF_3,
+ GAUDI_FUNNEL_SIF_4,
+ GAUDI_FUNNEL_SIF_5,
+ GAUDI_FUNNEL_SIF_6,
+ GAUDI_FUNNEL_SIF_7,
+ GAUDI_FUNNEL_NIF_0,
+ GAUDI_FUNNEL_NIF_1,
+ GAUDI_FUNNEL_NIF_2,
+ GAUDI_FUNNEL_NIF_3,
+ GAUDI_FUNNEL_NIF_4,
+ GAUDI_FUNNEL_NIF_5,
+ GAUDI_FUNNEL_NIF_6,
+ GAUDI_FUNNEL_NIF_7,
+ GAUDI_FUNNEL_DMA_IF_W_S,
+ GAUDI_FUNNEL_DMA_IF_E_S,
+ GAUDI_FUNNEL_DMA_IF_W_N,
+ GAUDI_FUNNEL_DMA_IF_E_N,
+ GAUDI_FUNNEL_CPU,
+ GAUDI_FUNNEL_NIC_TPC_W_S,
+ GAUDI_FUNNEL_NIC_TPC_E_S,
+ GAUDI_FUNNEL_NIC_TPC_W_N,
+ GAUDI_FUNNEL_NIC_TPC_E_N,
+ GAUDI_FUNNEL_PCIE,
+ GAUDI_FUNNEL_PSOC,
+ GAUDI_FUNNEL_NIC0,
+ GAUDI_FUNNEL_NIC1,
+ GAUDI_FUNNEL_NIC2,
+ GAUDI_FUNNEL_NIC3,
+ GAUDI_FUNNEL_NIC4,
+ GAUDI_FUNNEL_TPC0_EML,
+ GAUDI_FUNNEL_TPC1_EML,
+ GAUDI_FUNNEL_TPC2_EML,
+ GAUDI_FUNNEL_TPC3_EML,
+ GAUDI_FUNNEL_TPC4_EML,
+ GAUDI_FUNNEL_TPC5_EML,
+ GAUDI_FUNNEL_TPC6_EML,
+ GAUDI_FUNNEL_TPC7_EML,
+ GAUDI_FUNNEL_LAST = GAUDI_FUNNEL_TPC7_EML
+};
+
+enum gaudi_debug_bmon_regs_index {
+ GAUDI_BMON_FIRST = 0,
+ GAUDI_BMON_MME0_ACC_0 = GAUDI_BMON_FIRST,
+ GAUDI_BMON_MME0_SBAB_0,
+ GAUDI_BMON_MME0_SBAB_1,
+ GAUDI_BMON_MME0_CTRL_0,
+ GAUDI_BMON_MME0_CTRL_1,
+ GAUDI_BMON_MME1_ACC_0,
+ GAUDI_BMON_MME1_SBAB_0,
+ GAUDI_BMON_MME1_SBAB_1,
+ GAUDI_BMON_MME1_CTRL_0,
+ GAUDI_BMON_MME1_CTRL_1,
+ GAUDI_BMON_MME2_ACC_0,
+ GAUDI_BMON_MME2_SBAB_0,
+ GAUDI_BMON_MME2_SBAB_1,
+ GAUDI_BMON_MME2_CTRL_0,
+ GAUDI_BMON_MME2_CTRL_1,
+ GAUDI_BMON_MME3_ACC_0,
+ GAUDI_BMON_MME3_SBAB_0,
+ GAUDI_BMON_MME3_SBAB_1,
+ GAUDI_BMON_MME3_CTRL_0,
+ GAUDI_BMON_MME3_CTRL_1,
+ GAUDI_BMON_DMA_IF_W_S_SOB_WR,
+ GAUDI_BMON_DMA_IF_W_S_0_WR,
+ GAUDI_BMON_DMA_IF_W_S_0_RD,
+ GAUDI_BMON_DMA_IF_W_S_1_WR,
+ GAUDI_BMON_DMA_IF_W_S_1_RD,
+ GAUDI_BMON_DMA_IF_E_S_SOB_WR,
+ GAUDI_BMON_DMA_IF_E_S_0_WR,
+ GAUDI_BMON_DMA_IF_E_S_0_RD,
+ GAUDI_BMON_DMA_IF_E_S_1_WR,
+ GAUDI_BMON_DMA_IF_E_S_1_RD,
+ GAUDI_BMON_DMA_IF_W_N_SOB_WR,
+ GAUDI_BMON_DMA_IF_W_N_HBM0_WR,
+ GAUDI_BMON_DMA_IF_W_N_HBM0_RD,
+ GAUDI_BMON_DMA_IF_W_N_HBM1_WR,
+ GAUDI_BMON_DMA_IF_W_N_HBM1_RD,
+ GAUDI_BMON_DMA_IF_E_N_SOB_WR,
+ GAUDI_BMON_DMA_IF_E_N_HBM0_WR,
+ GAUDI_BMON_DMA_IF_E_N_HBM0_RD,
+ GAUDI_BMON_DMA_IF_E_N_HBM1_WR,
+ GAUDI_BMON_DMA_IF_E_N_HBM1_RD,
+ GAUDI_BMON_CPU_WR,
+ GAUDI_BMON_CPU_RD,
+ GAUDI_BMON_DMA_CH_0_0,
+ GAUDI_BMON_DMA_CH_0_1,
+ GAUDI_BMON_DMA_CH_1_0,
+ GAUDI_BMON_DMA_CH_1_1,
+ GAUDI_BMON_DMA_CH_2_0,
+ GAUDI_BMON_DMA_CH_2_1,
+ GAUDI_BMON_DMA_CH_3_0,
+ GAUDI_BMON_DMA_CH_3_1,
+ GAUDI_BMON_DMA_CH_4_0,
+ GAUDI_BMON_DMA_CH_4_1,
+ GAUDI_BMON_DMA_CH_5_0,
+ GAUDI_BMON_DMA_CH_5_1,
+ GAUDI_BMON_DMA_CH_6_0,
+ GAUDI_BMON_DMA_CH_6_1,
+ GAUDI_BMON_DMA_CH_7_0,
+ GAUDI_BMON_DMA_CH_7_1,
+ GAUDI_BMON_PCIE_MSTR_WR,
+ GAUDI_BMON_PCIE_MSTR_RD,
+ GAUDI_BMON_PCIE_SLV_WR,
+ GAUDI_BMON_PCIE_SLV_RD,
+ GAUDI_BMON_MMU_0,
+ GAUDI_BMON_MMU_1,
+ GAUDI_BMON_NIC0_0,
+ GAUDI_BMON_NIC0_1,
+ GAUDI_BMON_NIC0_2,
+ GAUDI_BMON_NIC0_3,
+ GAUDI_BMON_NIC0_4,
+ GAUDI_BMON_NIC1_0,
+ GAUDI_BMON_NIC1_1,
+ GAUDI_BMON_NIC1_2,
+ GAUDI_BMON_NIC1_3,
+ GAUDI_BMON_NIC1_4,
+ GAUDI_BMON_NIC2_0,
+ GAUDI_BMON_NIC2_1,
+ GAUDI_BMON_NIC2_2,
+ GAUDI_BMON_NIC2_3,
+ GAUDI_BMON_NIC2_4,
+ GAUDI_BMON_NIC3_0,
+ GAUDI_BMON_NIC3_1,
+ GAUDI_BMON_NIC3_2,
+ GAUDI_BMON_NIC3_3,
+ GAUDI_BMON_NIC3_4,
+ GAUDI_BMON_NIC4_0,
+ GAUDI_BMON_NIC4_1,
+ GAUDI_BMON_NIC4_2,
+ GAUDI_BMON_NIC4_3,
+ GAUDI_BMON_NIC4_4,
+ GAUDI_BMON_TPC0_EML_0,
+ GAUDI_BMON_TPC0_EML_1,
+ GAUDI_BMON_TPC0_EML_2,
+ GAUDI_BMON_TPC0_EML_3,
+ GAUDI_BMON_TPC1_EML_0,
+ GAUDI_BMON_TPC1_EML_1,
+ GAUDI_BMON_TPC1_EML_2,
+ GAUDI_BMON_TPC1_EML_3,
+ GAUDI_BMON_TPC2_EML_0,
+ GAUDI_BMON_TPC2_EML_1,
+ GAUDI_BMON_TPC2_EML_2,
+ GAUDI_BMON_TPC2_EML_3,
+ GAUDI_BMON_TPC3_EML_0,
+ GAUDI_BMON_TPC3_EML_1,
+ GAUDI_BMON_TPC3_EML_2,
+ GAUDI_BMON_TPC3_EML_3,
+ GAUDI_BMON_TPC4_EML_0,
+ GAUDI_BMON_TPC4_EML_1,
+ GAUDI_BMON_TPC4_EML_2,
+ GAUDI_BMON_TPC4_EML_3,
+ GAUDI_BMON_TPC5_EML_0,
+ GAUDI_BMON_TPC5_EML_1,
+ GAUDI_BMON_TPC5_EML_2,
+ GAUDI_BMON_TPC5_EML_3,
+ GAUDI_BMON_TPC6_EML_0,
+ GAUDI_BMON_TPC6_EML_1,
+ GAUDI_BMON_TPC6_EML_2,
+ GAUDI_BMON_TPC6_EML_3,
+ GAUDI_BMON_TPC7_EML_0,
+ GAUDI_BMON_TPC7_EML_1,
+ GAUDI_BMON_TPC7_EML_2,
+ GAUDI_BMON_TPC7_EML_3,
+ GAUDI_BMON_LAST = GAUDI_BMON_TPC7_EML_3
+};
+
+enum gaudi_debug_spmu_regs_index {
+ GAUDI_SPMU_FIRST = 0,
+ GAUDI_SPMU_MME0_ACC = GAUDI_SPMU_FIRST,
+ GAUDI_SPMU_MME0_SBAB,
+ GAUDI_SPMU_MME0_CTRL,
+ GAUDI_SPMU_MME1_ACC,
+ GAUDI_SPMU_MME1_SBAB,
+ GAUDI_SPMU_MME1_CTRL,
+ GAUDI_SPMU_MME2_MME2_ACC,
+ GAUDI_SPMU_MME2_SBAB,
+ GAUDI_SPMU_MME2_CTRL,
+ GAUDI_SPMU_MME3_ACC,
+ GAUDI_SPMU_MME3_SBAB,
+ GAUDI_SPMU_MME3_CTRL,
+ GAUDI_SPMU_DMA_CH_0_CS,
+ GAUDI_SPMU_DMA_CH_1_CS,
+ GAUDI_SPMU_DMA_CH_2_CS,
+ GAUDI_SPMU_DMA_CH_3_CS,
+ GAUDI_SPMU_DMA_CH_4_CS,
+ GAUDI_SPMU_DMA_CH_5_CS,
+ GAUDI_SPMU_DMA_CH_6_CS,
+ GAUDI_SPMU_DMA_CH_7_CS,
+ GAUDI_SPMU_PCIE,
+ GAUDI_SPMU_MMU_CS,
+ GAUDI_SPMU_NIC0_0,
+ GAUDI_SPMU_NIC0_1,
+ GAUDI_SPMU_NIC1_0,
+ GAUDI_SPMU_NIC1_1,
+ GAUDI_SPMU_NIC2_0,
+ GAUDI_SPMU_NIC2_1,
+ GAUDI_SPMU_NIC3_0,
+ GAUDI_SPMU_NIC3_1,
+ GAUDI_SPMU_NIC4_0,
+ GAUDI_SPMU_NIC4_1,
+ GAUDI_SPMU_TPC0_EML,
+ GAUDI_SPMU_TPC1_EML,
+ GAUDI_SPMU_TPC2_EML,
+ GAUDI_SPMU_TPC3_EML,
+ GAUDI_SPMU_TPC4_EML,
+ GAUDI_SPMU_TPC5_EML,
+ GAUDI_SPMU_TPC6_EML,
+ GAUDI_SPMU_TPC7_EML,
+ GAUDI_SPMU_LAST = GAUDI_SPMU_TPC7_EML
+};
+
+#endif /* GAUDI_CORESIGHT_H */