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author | 2023-02-21 18:24:12 -0800 | |
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committer | 2023-02-21 18:24:12 -0800 | |
commit | 5b7c4cabbb65f5c469464da6c5f614cbd7f730f2 (patch) | |
tree | cc5c2d0a898769fd59549594fedb3ee6f84e59a0 /drivers/misc/habanalabs/include/gaudi2/asic_reg/pcie_aux_regs.h | |
download | linux-5b7c4cabbb65f5c469464da6c5f614cbd7f730f2.tar.gz linux-5b7c4cabbb65f5c469464da6c5f614cbd7f730f2.zip |
Merge tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-nextgrafted
Pull networking updates from Jakub Kicinski:
"Core:
- Add dedicated kmem_cache for typical/small skb->head, avoid having
to access struct page at kfree time, and improve memory use.
- Introduce sysctl to set default RPS configuration for new netdevs.
- Define Netlink protocol specification format which can be used to
describe messages used by each family and auto-generate parsers.
Add tools for generating kernel data structures and uAPI headers.
- Expose all net/core sysctls inside netns.
- Remove 4s sleep in netpoll if carrier is instantly detected on
boot.
- Add configurable limit of MDB entries per port, and port-vlan.
- Continue populating drop reasons throughout the stack.
- Retire a handful of legacy Qdiscs and classifiers.
Protocols:
- Support IPv4 big TCP (TSO frames larger than 64kB).
- Add IP_LOCAL_PORT_RANGE socket option, to control local port range
on socket by socket basis.
- Track and report in procfs number of MPTCP sockets used.
- Support mixing IPv4 and IPv6 flows in the in-kernel MPTCP path
manager.
- IPv6: don't check net.ipv6.route.max_size and rely on garbage
collection to free memory (similarly to IPv4).
- Support Penultimate Segment Pop (PSP) flavor in SRv6 (RFC8986).
- ICMP: add per-rate limit counters.
- Add support for user scanning requests in ieee802154.
- Remove static WEP support.
- Support minimal Wi-Fi 7 Extremely High Throughput (EHT) rate
reporting.
- WiFi 7 EHT channel puncturing support (client & AP).
BPF:
- Add a rbtree data structure following the "next-gen data structure"
precedent set by recently added linked list, that is, by using
kfunc + kptr instead of adding a new BPF map type.
- Expose XDP hints via kfuncs with initial support for RX hash and
timestamp metadata.
- Add BPF_F_NO_TUNNEL_KEY extension to bpf_skb_set_tunnel_key to
better support decap on GRE tunnel devices not operating in collect
metadata.
- Improve x86 JIT's codegen for PROBE_MEM runtime error checks.
- Remove the need for trace_printk_lock for bpf_trace_printk and
bpf_trace_vprintk helpers.
- Extend libbpf's bpf_tracing.h support for tracing arguments of
kprobes/uprobes and syscall as a special case.
- Significantly reduce the search time for module symbols by
livepatch and BPF.
- Enable cpumasks to be used as kptrs, which is useful for tracing
programs tracking which tasks end up running on which CPUs in
different time intervals.
- Add support for BPF trampoline on s390x and riscv64.
- Add capability to export the XDP features supported by the NIC.
- Add __bpf_kfunc tag for marking kernel functions as kfuncs.
- Add cgroup.memory=nobpf kernel parameter option to disable BPF
memory accounting for container environments.
Netfilter:
- Remove the CLUSTERIP target. It has been marked as obsolete for
years, and we still have WARN splats wrt races of the out-of-band
/proc interface installed by this target.
- Add 'destroy' commands to nf_tables. They are identical to the
existing 'delete' commands, but do not return an error if the
referenced object (set, chain, rule...) did not exist.
Driver API:
- Improve cpumask_local_spread() locality to help NICs set the right
IRQ affinity on AMD platforms.
- Separate C22 and C45 MDIO bus transactions more clearly.
- Introduce new DCB table to control DSCP rewrite on egress.
- Support configuration of Physical Layer Collision Avoidance (PLCA)
Reconciliation Sublayer (RS) (802.3cg-2019). Modern version of
shared medium Ethernet.
- Support for MAC Merge layer (IEEE 802.3-2018 clause 99). Allowing
preemption of low priority frames by high priority frames.
- Add support for controlling MACSec offload using netlink SET.
- Rework devlink instance refcounts to allow registration and
de-registration under the instance lock. Split the code into
multiple files, drop some of the unnecessarily granular locks and
factor out common parts of netlink operation handling.
- Add TX frame aggregation parameters (for USB drivers).
- Add a new attr TCA_EXT_WARN_MSG to report TC (offload) warning
messages with notifications for debug.
- Allow offloading of UDP NEW connections via act_ct.
- Add support for per action HW stats in TC.
- Support hardware miss to TC action (continue processing in SW from
a specific point in the action chain).
- Warn if old Wireless Extension user space interface is used with
modern cfg80211/mac80211 drivers. Do not support Wireless
Extensions for Wi-Fi 7 devices at all. Everyone should switch to
using nl80211 interface instead.
- Improve the CAN bit timing configuration. Use extack to return
error messages directly to user space, update the SJW handling,
including the definition of a new default value that will benefit
CAN-FD controllers, by increasing their oscillator tolerance.
New hardware / drivers:
- Ethernet:
- nVidia BlueField-3 support (control traffic driver)
- Ethernet support for imx93 SoCs
- Motorcomm yt8531 gigabit Ethernet PHY
- onsemi NCN26000 10BASE-T1S PHY (with support for PLCA)
- Microchip LAN8841 PHY (incl. cable diagnostics and PTP)
- Amlogic gxl MDIO mux
- WiFi:
- RealTek RTL8188EU (rtl8xxxu)
- Qualcomm Wi-Fi 7 devices (ath12k)
- CAN:
- Renesas R-Car V4H
Drivers:
- Bluetooth:
- Set Per Platform Antenna Gain (PPAG) for Intel controllers.
- Ethernet NICs:
- Intel (1G, igc):
- support TSN / Qbv / packet scheduling features of i226 model
- Intel (100G, ice):
- use GNSS subsystem instead of TTY
- multi-buffer XDP support
- extend support for GPIO pins to E823 devices
- nVidia/Mellanox:
- update the shared buffer configuration on PFC commands
- implement PTP adjphase function for HW offset control
- TC support for Geneve and GRE with VF tunnel offload
- more efficient crypto key management method
- multi-port eswitch support
- Netronome/Corigine:
- add DCB IEEE support
- support IPsec offloading for NFP3800
- Freescale/NXP (enetc):
- support XDP_REDIRECT for XDP non-linear buffers
- improve reconfig, avoid link flap and waiting for idle
- support MAC Merge layer
- Other NICs:
- sfc/ef100: add basic devlink support for ef100
- ionic: rx_push mode operation (writing descriptors via MMIO)
- bnxt: use the auxiliary bus abstraction for RDMA
- r8169: disable ASPM and reset bus in case of tx timeout
- cpsw: support QSGMII mode for J721e CPSW9G
- cpts: support pulse-per-second output
- ngbe: add an mdio bus driver
- usbnet: optimize usbnet_bh() by avoiding unnecessary queuing
- r8152: handle devices with FW with NCM support
- amd-xgbe: support 10Mbps, 2.5GbE speeds and rx-adaptation
- virtio-net: support multi buffer XDP
- virtio/vsock: replace virtio_vsock_pkt with sk_buff
- tsnep: XDP support
- Ethernet high-speed switches:
- nVidia/Mellanox (mlxsw):
- add support for latency TLV (in FW control messages)
- Microchip (sparx5):
- separate explicit and implicit traffic forwarding rules, make
the implicit rules always active
- add support for egress DSCP rewrite
- IS0 VCAP support (Ingress Classification)
- IS2 VCAP filters (protos, L3 addrs, L4 ports, flags, ToS
etc.)
- ES2 VCAP support (Egress Access Control)
- support for Per-Stream Filtering and Policing (802.1Q,
8.6.5.1)
- Ethernet embedded switches:
- Marvell (mv88e6xxx):
- add MAB (port auth) offload support
- enable PTP receive for mv88e6390
- NXP (ocelot):
- support MAC Merge layer
- support for the the vsc7512 internal copper phys
- Microchip:
- lan9303: convert to PHYLINK
- lan966x: support TC flower filter statistics
- lan937x: PTP support for KSZ9563/KSZ8563 and LAN937x
- lan937x: support Credit Based Shaper configuration
- ksz9477: support Energy Efficient Ethernet
- other:
- qca8k: convert to regmap read/write API, use bulk operations
- rswitch: Improve TX timestamp accuracy
- Intel WiFi (iwlwifi):
- EHT (Wi-Fi 7) rate reporting
- STEP equalizer support: transfer some STEP (connection to radio
on platforms with integrated wifi) related parameters from the
BIOS to the firmware.
- Qualcomm 802.11ax WiFi (ath11k):
- IPQ5018 support
- Fine Timing Measurement (FTM) responder role support
- channel 177 support
- MediaTek WiFi (mt76):
- per-PHY LED support
- mt7996: EHT (Wi-Fi 7) support
- Wireless Ethernet Dispatch (WED) reset support
- switch to using page pool allocator
- RealTek WiFi (rtw89):
- support new version of Bluetooth co-existance
- Mobile:
- rmnet: support TX aggregation"
* tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1872 commits)
page_pool: add a comment explaining the fragment counter usage
net: ethtool: fix __ethtool_dev_mm_supported() implementation
ethtool: pse-pd: Fix double word in comments
xsk: add linux/vmalloc.h to xsk.c
sefltests: netdevsim: wait for devlink instance after netns removal
selftest: fib_tests: Always cleanup before exit
net/mlx5e: Align IPsec ASO result memory to be as required by hardware
net/mlx5e: TC, Set CT miss to the specific ct action instance
net/mlx5e: Rename CHAIN_TO_REG to MAPPED_OBJ_TO_REG
net/mlx5: Refactor tc miss handling to a single function
net/mlx5: Kconfig: Make tc offload depend on tc skb extension
net/sched: flower: Support hardware miss to tc action
net/sched: flower: Move filter handle initialization earlier
net/sched: cls_api: Support hardware miss to tc action
net/sched: Rename user cookie and act cookie
sfc: fix builds without CONFIG_RTC_LIB
sfc: clean up some inconsistent indentings
net/mlx4_en: Introduce flexible array to silence overflow warning
net: lan966x: Fix possible deadlock inside PTP
net/ulp: Remove redundant ->clone() test in inet_clone_ulp().
...
Diffstat (limited to 'drivers/misc/habanalabs/include/gaudi2/asic_reg/pcie_aux_regs.h')
-rw-r--r-- | drivers/misc/habanalabs/include/gaudi2/asic_reg/pcie_aux_regs.h | 293 |
1 files changed, 293 insertions, 0 deletions
diff --git a/drivers/misc/habanalabs/include/gaudi2/asic_reg/pcie_aux_regs.h b/drivers/misc/habanalabs/include/gaudi2/asic_reg/pcie_aux_regs.h new file mode 100644 index 000000000..44182fc18 --- /dev/null +++ b/drivers/misc/habanalabs/include/gaudi2/asic_reg/pcie_aux_regs.h @@ -0,0 +1,293 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Copyright 2016-2020 HabanaLabs, Ltd. + * All Rights Reserved. + * + */ + +/************************************ + ** This is an auto-generated file ** + ** DO NOT EDIT BELOW ** + ************************************/ + +#ifndef ASIC_REG_PCIE_AUX_REGS_H_ +#define ASIC_REG_PCIE_AUX_REGS_H_ + +/* + ***************************************** + * PCIE_AUX + * (Prototype: PCIE_AUX) + ***************************************** + */ + +#define mmPCIE_AUX_APB_TIMEOUT 0x4C07004 + +#define mmPCIE_AUX_SW_GENERAL_PURPOSE_0 0x4C07008 + +#define mmPCIE_AUX_SW_GENERAL_PURPOSE_1 0x4C0700C + +#define mmPCIE_AUX_SW_GENERAL_PURPOSE_2 0x4C07010 + +#define mmPCIE_AUX_SW_GENERAL_PURPOSE_3 0x4C07014 + +#define mmPCIE_AUX_SW_GENERAL_PURPOSE_4 0x4C07018 + +#define mmPCIE_AUX_SW_GENERAL_PURPOSE_5 0x4C0701C + +#define mmPCIE_AUX_SW_GENERAL_PURPOSE_6 0x4C07020 + +#define mmPCIE_AUX_SW_GENERAL_PURPOSE_7 0x4C07024 + +#define mmPCIE_AUX_PHY_INIT 0x4C07100 + +#define mmPCIE_AUX_LTR_MAX_LATENCY 0x4C07138 + +#define mmPCIE_AUX_BAR0_START_L 0x4C07160 + +#define mmPCIE_AUX_BAR0_START_H 0x4C07164 + +#define mmPCIE_AUX_BAR1_START 0x4C07168 + +#define mmPCIE_AUX_BAR2_START_L 0x4C0716C + +#define mmPCIE_AUX_BAR2_START_H 0x4C07170 + +#define mmPCIE_AUX_BAR3_START 0x4C07174 + +#define mmPCIE_AUX_BAR4_START_L 0x4C07178 + +#define mmPCIE_AUX_BAR4_START_H 0x4C0717C + +#define mmPCIE_AUX_BAR5_START 0x4C07180 + +#define mmPCIE_AUX_BAR0_LIMIT_L 0x4C07184 + +#define mmPCIE_AUX_BAR0_LIMIT_H 0x4C07188 + +#define mmPCIE_AUX_BAR1_LIMIT 0x4C0718C + +#define mmPCIE_AUX_BAR2_LIMIT_L 0x4C07190 + +#define mmPCIE_AUX_BAR2_LIMIT_H 0x4C07194 + +#define mmPCIE_AUX_BAR3_LIMIT 0x4C07198 + +#define mmPCIE_AUX_BAR4_LIMIT_L 0x4C0719C + +#define mmPCIE_AUX_BAR4_LIMIT_H 0x4C07200 + +#define mmPCIE_AUX_BAR5_LIMIT 0x4C07204 + +#define mmPCIE_AUX_BUS_MASTER_EN 0x4C07208 + +#define mmPCIE_AUX_MEM_SPACE_EN 0x4C0720C + +#define mmPCIE_AUX_MAX_RD_REQ_SIZE 0x4C07210 + +#define mmPCIE_AUX_MAX_PAYLOAD_SIZE 0x4C07214 + +#define mmPCIE_AUX_EXT_TAG_EN 0x4C07218 + +#define mmPCIE_AUX_RCB 0x4C0721C + +#define mmPCIE_AUX_PM_NO_SOFT_RST 0x4C07220 + +#define mmPCIE_AUX_PBUS_NUM 0x4C07224 + +#define mmPCIE_AUX_PBUS_DEV_NUM 0x4C07228 + +#define mmPCIE_AUX_NO_SNOOP_EN 0x4C0722C + +#define mmPCIE_AUX_RELAX_ORDER_EN 0x4C07230 + +#define mmPCIE_AUX_HP_SLOT_CTRL_ACCESS 0x4C07234 + +#define mmPCIE_AUX_DLL_STATE_CHGED_EN 0x4C07238 + +#define mmPCIE_AUX_CMP_CPLED_INT_EN 0x4C0723C + +#define mmPCIE_AUX_HP_INT_EN 0x4C07340 + +#define mmPCIE_AUX_PRE_DET_CHGEN_EN 0x4C07344 + +#define mmPCIE_AUX_MRL_SENSOR_CHGED_EN 0x4C07348 + +#define mmPCIE_AUX_PWR_FAULT_DET_EN 0x4C0734C + +#define mmPCIE_AUX_ATTEN_BUTTON_PRESSED_EN 0x4C07350 + +#define mmPCIE_AUX_PF_FLR_ACTIVE 0x4C07360 + +#define mmPCIE_AUX_PF_FLR_DONE 0x4C07364 + +#define mmPCIE_AUX_FLR_INT 0x4C07390 + +#define mmPCIE_AUX_FLR_CTRL 0x4C07394 + +#define mmPCIE_AUX_LTR_M_EN 0x4C073B0 + +#define mmPCIE_AUX_LTSSM_EN 0x4C07428 + +#define mmPCIE_AUX_SYS_INTR 0x4C07440 + +#define mmPCIE_AUX_INT_DISABLE 0x4C07444 + +#define mmPCIE_AUX_SMLH_LINK_UP 0x4C07448 + +#define mmPCIE_AUX_PM_CURR_STATE 0x4C07450 + +#define mmPCIE_AUX_RDLH_LINK_UP 0x4C07458 + +#define mmPCIE_AUX_BRDG_SLV_XFER_PENDING 0x4C0745C + +#define mmPCIE_AUX_BRDG_DBI_XFER_PENDING 0x4C07460 + +#define mmPCIE_AUX_AUTO_SP_DIS 0x4C07478 + +#define mmPCIE_AUX_DBI 0x4C07490 + +#define mmPCIE_AUX_DBI_32 0x4C07494 + +#define mmPCIE_AUX_DIAG_STATUS_BUS_0 0x4C074A4 + +#define mmPCIE_AUX_DIAG_STATUS_BUS_1 0x4C074A8 + +#define mmPCIE_AUX_DIAG_STATUS_BUS_2 0x4C074AC + +#define mmPCIE_AUX_DIAG_STATUS_BUS_3 0x4C074B0 + +#define mmPCIE_AUX_DIAG_STATUS_BUS_4 0x4C074B4 + +#define mmPCIE_AUX_DIAG_STATUS_BUS_5 0x4C074B8 + +#define mmPCIE_AUX_DIAG_STATUS_BUS_6 0x4C074BC + +#define mmPCIE_AUX_DIAG_STATUS_BUS_7 0x4C074C0 + +#define mmPCIE_AUX_DIAG_STATUS_BUS_8 0x4C074C4 + +#define mmPCIE_AUX_DIAG_STATUS_BUS_9 0x4C074C8 + +#define mmPCIE_AUX_DIAG_STATUS_BUS_10 0x4C074CC + +#define mmPCIE_AUX_DIAG_STATUS_BUS_11 0x4C074D0 + +#define mmPCIE_AUX_DIAG_STATUS_BUS_12 0x4C074D4 + +#define mmPCIE_AUX_DIAG_STATUS_BUS_13 0x4C074D8 + +#define mmPCIE_AUX_DIAG_STATUS_BUS_14 0x4C074DC + +#define mmPCIE_AUX_DIAG_STATUS_BUS_15 0x4C074E0 + +#define mmPCIE_AUX_DIAG_STATUS_BUS_16 0x4C074E4 + +#define mmPCIE_AUX_DIAG_STATUS_BUS_17 0x4C074E8 + +#define mmPCIE_AUX_DIAG_STATUS_BUS_18 0x4C074EC + +#define mmPCIE_AUX_DIAG_STATUS_BUS_19 0x4C074F0 + +#define mmPCIE_AUX_DIAG_STATUS_BUS_20 0x4C074F4 + +#define mmPCIE_AUX_DIAG_STATUS_BUS_21 0x4C074F8 + +#define mmPCIE_AUX_DIAG_STATUS_BUS_22 0x4C074FC + +#define mmPCIE_AUX_DIAG_STATUS_BUS_23 0x4C07500 + +#define mmPCIE_AUX_DIAG_STATUS_BUS_24 0x4C07504 + +#define mmPCIE_AUX_DIAG_STATUS_BUS_25 0x4C07508 + +#define mmPCIE_AUX_DIAG_STATUS_BUS_26 0x4C0750C + +#define mmPCIE_AUX_DIAG_STATUS_BUS_27 0x4C07510 + +#define mmPCIE_AUX_DIAG_STATUS_BUS_28 0x4C07514 + +#define mmPCIE_AUX_CDM_RAS_DES_EC_INFO_0 0x4C07640 + +#define mmPCIE_AUX_CDM_RAS_DES_EC_INFO_1 0x4C07644 + +#define mmPCIE_AUX_CDM_RAS_DES_EC_INFO_2 0x4C07648 + +#define mmPCIE_AUX_CDM_RAS_DES_EC_INFO_3 0x4C0764C + +#define mmPCIE_AUX_CDM_RAS_DES_EC_INFO_4 0x4C07650 + +#define mmPCIE_AUX_CDM_RAS_DES_EC_INFO_5 0x4C07654 + +#define mmPCIE_AUX_CDM_RAS_DES_EC_INFO_6 0x4C07658 + +#define mmPCIE_AUX_CDM_RAS_DES_EC_INFO_7 0x4C0765C + +#define mmPCIE_AUX_CDM_RAS_DES_EC_INFO_8 0x4C07660 + +#define mmPCIE_AUX_CDM_RAS_DES_EC_INFO_9 0x4C07664 + +#define mmPCIE_AUX_CDM_RAS_DES_EC_INFO_10 0x4C07668 + +#define mmPCIE_AUX_CDM_RAS_DES_EC_INFO_11 0x4C0766C + +#define mmPCIE_AUX_CDM_RAS_DES_EC_INFO_12 0x4C07670 + +#define mmPCIE_AUX_CDM_RAS_DES_EC_INFO_13 0x4C07674 + +#define mmPCIE_AUX_CDM_RAS_DES_EC_INFO_14 0x4C07678 + +#define mmPCIE_AUX_CDM_RAS_DES_EC_INFO_15 0x4C0767C + +#define mmPCIE_AUX_CDM_RAS_DES_SD_COMMON_0 0x4C07744 + +#define mmPCIE_AUX_CDM_RAS_DES_SD_COMMON_1 0x4C07748 + +#define mmPCIE_AUX_CDM_RAS_DES_SD_COMMON_2 0x4C0774C + +#define mmPCIE_AUX_APP_RAS_DES_TBA_CTRL 0x4C07774 + +#define mmPCIE_AUX_PM_MASTER_STATE 0x4C07838 + +#define mmPCIE_AUX_PM_SLAVE_STATE 0x4C0783C + +#define mmPCIE_AUX_PM_DSTATE 0x4C07840 + +#define mmPCIE_AUX_PM_PME_EN 0x4C07844 + +#define mmPCIE_AUX_PM_LINKST_IN_L0S 0x4C07848 + +#define mmPCIE_AUX_PM_LINKST_IN_L1 0x4C0784C + +#define mmPCIE_AUX_PM_LINKST_IN_L2 0x4C07850 + +#define mmPCIE_AUX_PM_LINKST_L2_EXIT 0x4C07854 + +#define mmPCIE_AUX_PM_STATUS 0x4C07858 + +#define mmPCIE_AUX_APP_READY_ENTER_L23 0x4C0785C + +#define mmPCIE_AUX_APP_XFER_PENDING 0x4C07860 + +#define mmPCIE_AUX_APP_REQ_L1 0x4C07930 + +#define mmPCIE_AUX_AUX_PM_EN 0x4C07934 + +#define mmPCIE_AUX_APPS_PM_XMT_PME 0x4C07938 + +#define mmPCIE_AUX_OUTBAND_PWRUP_CMD 0x4C07940 + +#define mmPCIE_AUX_PERST 0x4C079B8 + +#define mmPCIE_AUX_DBI_RO_WR_DISABLE 0x4C079BC + +#define mmPCIE_AUX_HOLD_PHY_RST 0x4C079C0 + +#define mmPCIE_AUX_TLP_INTERNAL_ERR_REP 0x4C079C4 + +#define mmPCIE_AUX_APP_SRIS_MODE 0x4C079C8 + +#define mmPCIE_AUX_BUS_MSTR_EN_CLR_INTR 0x4C079CC + +#define mmPCIE_AUX_BUS_MSTR_EN_CLR_INTR_MASK 0x4C079D0 + +#endif /* ASIC_REG_PCIE_AUX_REGS_H_ */ |