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author | 2023-02-21 18:24:12 -0800 | |
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committer | 2023-02-21 18:24:12 -0800 | |
commit | 5b7c4cabbb65f5c469464da6c5f614cbd7f730f2 (patch) | |
tree | cc5c2d0a898769fd59549594fedb3ee6f84e59a0 /drivers/staging/vt6656/mac.h | |
download | linux-5b7c4cabbb65f5c469464da6c5f614cbd7f730f2.tar.gz linux-5b7c4cabbb65f5c469464da6c5f614cbd7f730f2.zip |
Merge tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-nextgrafted
Pull networking updates from Jakub Kicinski:
"Core:
- Add dedicated kmem_cache for typical/small skb->head, avoid having
to access struct page at kfree time, and improve memory use.
- Introduce sysctl to set default RPS configuration for new netdevs.
- Define Netlink protocol specification format which can be used to
describe messages used by each family and auto-generate parsers.
Add tools for generating kernel data structures and uAPI headers.
- Expose all net/core sysctls inside netns.
- Remove 4s sleep in netpoll if carrier is instantly detected on
boot.
- Add configurable limit of MDB entries per port, and port-vlan.
- Continue populating drop reasons throughout the stack.
- Retire a handful of legacy Qdiscs and classifiers.
Protocols:
- Support IPv4 big TCP (TSO frames larger than 64kB).
- Add IP_LOCAL_PORT_RANGE socket option, to control local port range
on socket by socket basis.
- Track and report in procfs number of MPTCP sockets used.
- Support mixing IPv4 and IPv6 flows in the in-kernel MPTCP path
manager.
- IPv6: don't check net.ipv6.route.max_size and rely on garbage
collection to free memory (similarly to IPv4).
- Support Penultimate Segment Pop (PSP) flavor in SRv6 (RFC8986).
- ICMP: add per-rate limit counters.
- Add support for user scanning requests in ieee802154.
- Remove static WEP support.
- Support minimal Wi-Fi 7 Extremely High Throughput (EHT) rate
reporting.
- WiFi 7 EHT channel puncturing support (client & AP).
BPF:
- Add a rbtree data structure following the "next-gen data structure"
precedent set by recently added linked list, that is, by using
kfunc + kptr instead of adding a new BPF map type.
- Expose XDP hints via kfuncs with initial support for RX hash and
timestamp metadata.
- Add BPF_F_NO_TUNNEL_KEY extension to bpf_skb_set_tunnel_key to
better support decap on GRE tunnel devices not operating in collect
metadata.
- Improve x86 JIT's codegen for PROBE_MEM runtime error checks.
- Remove the need for trace_printk_lock for bpf_trace_printk and
bpf_trace_vprintk helpers.
- Extend libbpf's bpf_tracing.h support for tracing arguments of
kprobes/uprobes and syscall as a special case.
- Significantly reduce the search time for module symbols by
livepatch and BPF.
- Enable cpumasks to be used as kptrs, which is useful for tracing
programs tracking which tasks end up running on which CPUs in
different time intervals.
- Add support for BPF trampoline on s390x and riscv64.
- Add capability to export the XDP features supported by the NIC.
- Add __bpf_kfunc tag for marking kernel functions as kfuncs.
- Add cgroup.memory=nobpf kernel parameter option to disable BPF
memory accounting for container environments.
Netfilter:
- Remove the CLUSTERIP target. It has been marked as obsolete for
years, and we still have WARN splats wrt races of the out-of-band
/proc interface installed by this target.
- Add 'destroy' commands to nf_tables. They are identical to the
existing 'delete' commands, but do not return an error if the
referenced object (set, chain, rule...) did not exist.
Driver API:
- Improve cpumask_local_spread() locality to help NICs set the right
IRQ affinity on AMD platforms.
- Separate C22 and C45 MDIO bus transactions more clearly.
- Introduce new DCB table to control DSCP rewrite on egress.
- Support configuration of Physical Layer Collision Avoidance (PLCA)
Reconciliation Sublayer (RS) (802.3cg-2019). Modern version of
shared medium Ethernet.
- Support for MAC Merge layer (IEEE 802.3-2018 clause 99). Allowing
preemption of low priority frames by high priority frames.
- Add support for controlling MACSec offload using netlink SET.
- Rework devlink instance refcounts to allow registration and
de-registration under the instance lock. Split the code into
multiple files, drop some of the unnecessarily granular locks and
factor out common parts of netlink operation handling.
- Add TX frame aggregation parameters (for USB drivers).
- Add a new attr TCA_EXT_WARN_MSG to report TC (offload) warning
messages with notifications for debug.
- Allow offloading of UDP NEW connections via act_ct.
- Add support for per action HW stats in TC.
- Support hardware miss to TC action (continue processing in SW from
a specific point in the action chain).
- Warn if old Wireless Extension user space interface is used with
modern cfg80211/mac80211 drivers. Do not support Wireless
Extensions for Wi-Fi 7 devices at all. Everyone should switch to
using nl80211 interface instead.
- Improve the CAN bit timing configuration. Use extack to return
error messages directly to user space, update the SJW handling,
including the definition of a new default value that will benefit
CAN-FD controllers, by increasing their oscillator tolerance.
New hardware / drivers:
- Ethernet:
- nVidia BlueField-3 support (control traffic driver)
- Ethernet support for imx93 SoCs
- Motorcomm yt8531 gigabit Ethernet PHY
- onsemi NCN26000 10BASE-T1S PHY (with support for PLCA)
- Microchip LAN8841 PHY (incl. cable diagnostics and PTP)
- Amlogic gxl MDIO mux
- WiFi:
- RealTek RTL8188EU (rtl8xxxu)
- Qualcomm Wi-Fi 7 devices (ath12k)
- CAN:
- Renesas R-Car V4H
Drivers:
- Bluetooth:
- Set Per Platform Antenna Gain (PPAG) for Intel controllers.
- Ethernet NICs:
- Intel (1G, igc):
- support TSN / Qbv / packet scheduling features of i226 model
- Intel (100G, ice):
- use GNSS subsystem instead of TTY
- multi-buffer XDP support
- extend support for GPIO pins to E823 devices
- nVidia/Mellanox:
- update the shared buffer configuration on PFC commands
- implement PTP adjphase function for HW offset control
- TC support for Geneve and GRE with VF tunnel offload
- more efficient crypto key management method
- multi-port eswitch support
- Netronome/Corigine:
- add DCB IEEE support
- support IPsec offloading for NFP3800
- Freescale/NXP (enetc):
- support XDP_REDIRECT for XDP non-linear buffers
- improve reconfig, avoid link flap and waiting for idle
- support MAC Merge layer
- Other NICs:
- sfc/ef100: add basic devlink support for ef100
- ionic: rx_push mode operation (writing descriptors via MMIO)
- bnxt: use the auxiliary bus abstraction for RDMA
- r8169: disable ASPM and reset bus in case of tx timeout
- cpsw: support QSGMII mode for J721e CPSW9G
- cpts: support pulse-per-second output
- ngbe: add an mdio bus driver
- usbnet: optimize usbnet_bh() by avoiding unnecessary queuing
- r8152: handle devices with FW with NCM support
- amd-xgbe: support 10Mbps, 2.5GbE speeds and rx-adaptation
- virtio-net: support multi buffer XDP
- virtio/vsock: replace virtio_vsock_pkt with sk_buff
- tsnep: XDP support
- Ethernet high-speed switches:
- nVidia/Mellanox (mlxsw):
- add support for latency TLV (in FW control messages)
- Microchip (sparx5):
- separate explicit and implicit traffic forwarding rules, make
the implicit rules always active
- add support for egress DSCP rewrite
- IS0 VCAP support (Ingress Classification)
- IS2 VCAP filters (protos, L3 addrs, L4 ports, flags, ToS
etc.)
- ES2 VCAP support (Egress Access Control)
- support for Per-Stream Filtering and Policing (802.1Q,
8.6.5.1)
- Ethernet embedded switches:
- Marvell (mv88e6xxx):
- add MAB (port auth) offload support
- enable PTP receive for mv88e6390
- NXP (ocelot):
- support MAC Merge layer
- support for the the vsc7512 internal copper phys
- Microchip:
- lan9303: convert to PHYLINK
- lan966x: support TC flower filter statistics
- lan937x: PTP support for KSZ9563/KSZ8563 and LAN937x
- lan937x: support Credit Based Shaper configuration
- ksz9477: support Energy Efficient Ethernet
- other:
- qca8k: convert to regmap read/write API, use bulk operations
- rswitch: Improve TX timestamp accuracy
- Intel WiFi (iwlwifi):
- EHT (Wi-Fi 7) rate reporting
- STEP equalizer support: transfer some STEP (connection to radio
on platforms with integrated wifi) related parameters from the
BIOS to the firmware.
- Qualcomm 802.11ax WiFi (ath11k):
- IPQ5018 support
- Fine Timing Measurement (FTM) responder role support
- channel 177 support
- MediaTek WiFi (mt76):
- per-PHY LED support
- mt7996: EHT (Wi-Fi 7) support
- Wireless Ethernet Dispatch (WED) reset support
- switch to using page pool allocator
- RealTek WiFi (rtw89):
- support new version of Bluetooth co-existance
- Mobile:
- rmnet: support TX aggregation"
* tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1872 commits)
page_pool: add a comment explaining the fragment counter usage
net: ethtool: fix __ethtool_dev_mm_supported() implementation
ethtool: pse-pd: Fix double word in comments
xsk: add linux/vmalloc.h to xsk.c
sefltests: netdevsim: wait for devlink instance after netns removal
selftest: fib_tests: Always cleanup before exit
net/mlx5e: Align IPsec ASO result memory to be as required by hardware
net/mlx5e: TC, Set CT miss to the specific ct action instance
net/mlx5e: Rename CHAIN_TO_REG to MAPPED_OBJ_TO_REG
net/mlx5: Refactor tc miss handling to a single function
net/mlx5: Kconfig: Make tc offload depend on tc skb extension
net/sched: flower: Support hardware miss to tc action
net/sched: flower: Move filter handle initialization earlier
net/sched: cls_api: Support hardware miss to tc action
net/sched: Rename user cookie and act cookie
sfc: fix builds without CONFIG_RTC_LIB
sfc: clean up some inconsistent indentings
net/mlx4_en: Introduce flexible array to silence overflow warning
net: lan966x: Fix possible deadlock inside PTP
net/ulp: Remove redundant ->clone() test in inet_clone_ulp().
...
Diffstat (limited to 'drivers/staging/vt6656/mac.h')
-rw-r--r-- | drivers/staging/vt6656/mac.h | 373 |
1 files changed, 373 insertions, 0 deletions
diff --git a/drivers/staging/vt6656/mac.h b/drivers/staging/vt6656/mac.h new file mode 100644 index 000000000..0ac845bd3 --- /dev/null +++ b/drivers/staging/vt6656/mac.h @@ -0,0 +1,373 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc. + * All rights reserved. + * + * Purpose: MAC routines + * + * Author: Tevin Chen + * + * Date: May 21, 1996 + * + * Revision History: + * 07-01-2003 Bryan YC Fan: Re-write codes to support VT3253 spec. + * 08-25-2003 Kyle Hsu: Porting MAC functions from sim53. + * 09-03-2003 Bryan YC Fan: Add MACvDisableProtectMD & MACvEnableProtectMD + */ + +#ifndef __MAC_H__ +#define __MAC_H__ + +#include <linux/bits.h> +#include "device.h" + +#define REV_ID_VT3253_A0 0x00 +#define REV_ID_VT3253_A1 0x01 +#define REV_ID_VT3253_B0 0x08 +#define REV_ID_VT3253_B1 0x09 + +/* Registers in the MAC */ +#define MAC_REG_BISTCMD 0x04 +#define MAC_REG_BISTSR0 0x05 +#define MAC_REG_BISTSR1 0x06 +#define MAC_REG_BISTSR2 0x07 +#define MAC_REG_I2MCSR 0x08 +#define MAC_REG_I2MTGID 0x09 +#define MAC_REG_I2MTGAD 0x0a +#define MAC_REG_I2MCFG 0x0b +#define MAC_REG_I2MDIPT 0x0c +#define MAC_REG_I2MDOPT 0x0e +#define MAC_REG_USBSUS 0x0f + +#define MAC_REG_LOCALID 0x14 +#define MAC_REG_TESTCFG 0x15 +#define MAC_REG_JUMPER0 0x16 +#define MAC_REG_JUMPER1 0x17 +#define MAC_REG_TMCTL 0x18 +#define MAC_REG_TMDATA0 0x1c +#define MAC_REG_TMDATA1 0x1d +#define MAC_REG_TMDATA2 0x1e +#define MAC_REG_TMDATA3 0x1f + +/* MAC Parameter related */ +#define MAC_REG_LRT 0x20 +#define MAC_REG_SRT 0x21 +#define MAC_REG_SIFS 0x22 +#define MAC_REG_DIFS 0x23 +#define MAC_REG_EIFS 0x24 +#define MAC_REG_SLOT 0x25 +#define MAC_REG_BI 0x26 +#define MAC_REG_CWMAXMIN0 0x28 +#define MAC_REG_LINKOFFTOTM 0x2a +#define MAC_REG_SWTMOT 0x2b +#define MAC_REG_RTSOKCNT 0x2c +#define MAC_REG_RTSFAILCNT 0x2d +#define MAC_REG_ACKFAILCNT 0x2e +#define MAC_REG_FCSERRCNT 0x2f + +/* TSF Related */ +#define MAC_REG_TSFCNTR 0x30 +#define MAC_REG_NEXTTBTT 0x38 +#define MAC_REG_TSFOFST 0x40 +#define MAC_REG_TFTCTL 0x48 + +/* WMAC Control/Status Related */ +#define MAC_REG_ENCFG0 0x4c +#define MAC_REG_ENCFG1 0x4d +#define MAC_REG_ENCFG2 0x4e + +#define MAC_REG_CFG 0x50 +#define MAC_REG_TEST 0x52 +#define MAC_REG_HOSTCR 0x54 +#define MAC_REG_MACCR 0x55 +#define MAC_REG_RCR 0x56 +#define MAC_REG_TCR 0x57 +#define MAC_REG_IMR 0x58 +#define MAC_REG_ISR 0x5c +#define MAC_REG_ISR1 0x5d + +/* Power Saving Related */ +#define MAC_REG_PSCFG 0x60 +#define MAC_REG_PSCTL 0x61 +#define MAC_REG_PSPWRSIG 0x62 +#define MAC_REG_BBCR13 0x63 +#define MAC_REG_AIDATIM 0x64 +#define MAC_REG_PWBT 0x66 +#define MAC_REG_WAKEOKTMR 0x68 +#define MAC_REG_CALTMR 0x69 +#define MAC_REG_SYNSPACCNT 0x6a +#define MAC_REG_WAKSYNOPT 0x6b + +/* Baseband/IF Control Group */ +#define MAC_REG_BBREGCTL 0x6c +#define MAC_REG_CHANNEL 0x6d +#define MAC_REG_BBREGADR 0x6e +#define MAC_REG_BBREGDATA 0x6f +#define MAC_REG_IFREGCTL 0x70 +#define MAC_REG_IFDATA 0x71 +#define MAC_REG_ITRTMSET 0x74 +#define MAC_REG_PAPEDELAY 0x77 +#define MAC_REG_SOFTPWRCTL 0x78 +#define MAC_REG_SOFTPWRCTL2 0x79 +#define MAC_REG_GPIOCTL0 0x7a +#define MAC_REG_GPIOCTL1 0x7b + +/* MiscFF PIO related */ +#define MAC_REG_MISCFFNDEX 0xbc +#define MAC_REG_MISCFFCTL 0xbe +#define MAC_REG_MISCFFDATA 0xc0 + +/* MAC Configuration Group */ +#define MAC_REG_PAR0 0xc4 +#define MAC_REG_PAR4 0xc8 +#define MAC_REG_BSSID0 0xcc +#define MAC_REG_BSSID4 0xd0 +#define MAC_REG_MAR0 0xd4 +#define MAC_REG_MAR4 0xd8 + +/* MAC RSPPKT INFO Group */ +#define MAC_REG_RSPINF_B_1 0xdC +#define MAC_REG_RSPINF_B_2 0xe0 +#define MAC_REG_RSPINF_B_5 0xe4 +#define MAC_REG_RSPINF_B_11 0xe8 +#define MAC_REG_RSPINF_A_6 0xec +#define MAC_REG_RSPINF_A_9 0xee +#define MAC_REG_RSPINF_A_12 0xf0 +#define MAC_REG_RSPINF_A_18 0xf2 +#define MAC_REG_RSPINF_A_24 0xf4 +#define MAC_REG_RSPINF_A_36 0xf6 +#define MAC_REG_RSPINF_A_48 0xf8 +#define MAC_REG_RSPINF_A_54 0xfa +#define MAC_REG_RSPINF_A_72 0xfc + +/* Bits in the I2MCFG EEPROM register */ +#define I2MCFG_BOUNDCTL BIT(7) +#define I2MCFG_WAITCTL BIT(5) +#define I2MCFG_SCLOECTL BIT(4) +#define I2MCFG_WBUSYCTL BIT(3) +#define I2MCFG_NORETRY BIT(2) +#define I2MCFG_I2MLDSEQ BIT(1) +#define I2MCFG_I2CMFAST BIT(0) + +/* Bits in the I2MCSR EEPROM register */ +#define I2MCSR_EEMW BIT(7) +#define I2MCSR_EEMR BIT(6) +#define I2MCSR_AUTOLD BIT(3) +#define I2MCSR_NACK BIT(1) +#define I2MCSR_DONE BIT(0) + +/* Bits in the TMCTL register */ +#define TMCTL_TSUSP BIT(2) +#define TMCTL_TMD BIT(1) +#define TMCTL_TE BIT(0) + +/* Bits in the TFTCTL register */ +#define TFTCTL_HWUTSF BIT(7) +#define TFTCTL_TBTTSYNC BIT(6) +#define TFTCTL_HWUTSFEN BIT(5) +#define TFTCTL_TSFCNTRRD BIT(4) +#define TFTCTL_TBTTSYNCEN BIT(3) +#define TFTCTL_TSFSYNCEN BIT(2) +#define TFTCTL_TSFCNTRST BIT(1) +#define TFTCTL_TSFCNTREN BIT(0) + +/* Bits in the EnhanceCFG_0 register */ +#define EN_CFG_BB_TYPE_A 0x00 +#define EN_CFG_BB_TYPE_B BIT(0) +#define EN_CFG_BB_TYPE_G BIT(1) +#define EN_CFG_BB_TYPE_MASK (EN_CFG_BB_TYPE_B | EN_CFG_BB_TYPE_G) +#define EN_CFG_PROTECT_MD BIT(5) + +/* Bits in the EnhanceCFG_1 register */ +#define EN_CFG_BCN_SUS_IND BIT(0) +#define EN_CFG_BCN_SUS_CLR BIT(1) + +/* Bits in the EnhanceCFG_2 register */ +#define EN_CFG_NXTBTTCFPSTR BIT(0) +#define EN_CFG_BARKER_PREAM BIT(1) +#define EN_CFG_PKT_BURST_MD BIT(2) + +/* Bits in the CFG register */ +#define CFG_TKIPOPT BIT(7) +#define CFG_RXDMAOPT BIT(6) +#define CFG_TMOT_SW BIT(5) +#define CFG_TMOT_HWLONG BIT(4) +#define CFG_TMOT_HW 0x00 +#define CFG_CFPENDOPT BIT(3) +#define CFG_BCNSUSEN BIT(2) +#define CFG_NOTXTIMEOUT BIT(1) +#define CFG_NOBUFOPT BIT(0) + +/* Bits in the TEST register */ +#define TEST_LBEXT BIT(7) +#define TEST_LBINT BIT(6) +#define TEST_LBNONE 0x00 +#define TEST_SOFTINT BIT(5) +#define TEST_CONTTX BIT(4) +#define TEST_TXPE BIT(3) +#define TEST_NAVDIS BIT(2) +#define TEST_NOCTS BIT(1) +#define TEST_NOACK BIT(0) + +/* Bits in the HOSTCR register */ +#define HOSTCR_TXONST BIT(7) +#define HOSTCR_RXONST BIT(6) +#define HOSTCR_ADHOC BIT(5) +#define HOSTCR_AP BIT(4) +#define HOSTCR_TXON BIT(3) +#define HOSTCR_RXON BIT(2) +#define HOSTCR_MACEN BIT(1) +#define HOSTCR_SOFTRST BIT(0) + +/* Bits in the MACCR register */ +#define MACCR_SYNCFLUSHOK BIT(2) +#define MACCR_SYNCFLUSH BIT(1) +#define MACCR_CLRNAV BIT(0) + +/* Bits in the RCR register */ +#define RCR_SSID BIT(7) +#define RCR_RXALLTYPE BIT(6) +#define RCR_UNICAST BIT(5) +#define RCR_BROADCAST BIT(4) +#define RCR_MULTICAST BIT(3) +#define RCR_WPAERR BIT(2) +#define RCR_ERRCRC BIT(1) +#define RCR_BSSID BIT(0) + +/* Bits in the TCR register */ +#define TCR_SYNCDCFOPT BIT(1) +#define TCR_AUTOBCNTX BIT(0) + +/* ISR1 */ +#define ISR_GPIO3 BIT(6) +#define ISR_RXNOBUF BIT(3) +#define ISR_MIBNEARFULL BIT(2) +#define ISR_SOFTINT BIT(1) +#define ISR_FETALERR BIT(0) + +#define LEDSTS_STS 0x06 +#define LEDSTS_TMLEN 0x78 +#define LEDSTS_OFF 0x00 +#define LEDSTS_ON 0x02 +#define LEDSTS_SLOW 0x04 +#define LEDSTS_INTER 0x06 + +/* ISR0 */ +#define ISR_WATCHDOG BIT(7) +#define ISR_SOFTTIMER BIT(6) +#define ISR_GPIO0 BIT(5) +#define ISR_TBTT BIT(4) +#define ISR_RXDMA0 BIT(3) +#define ISR_BNTX BIT(2) +#define ISR_ACTX BIT(0) + +/* Bits in the PSCFG register */ +#define PSCFG_PHILIPMD BIT(6) +#define PSCFG_WAKECALEN BIT(5) +#define PSCFG_WAKETMREN BIT(4) +#define PSCFG_BBPSPROG BIT(3) +#define PSCFG_WAKESYN BIT(2) +#define PSCFG_SLEEPSYN BIT(1) +#define PSCFG_AUTOSLEEP BIT(0) + +/* Bits in the PSCTL register */ +#define PSCTL_WAKEDONE BIT(5) +#define PSCTL_PS BIT(4) +#define PSCTL_GO2DOZE BIT(3) +#define PSCTL_LNBCN BIT(2) +#define PSCTL_ALBCN BIT(1) +#define PSCTL_PSEN BIT(0) + +/* Bits in the PSPWSIG register */ +#define PSSIG_WPE3 BIT(7) +#define PSSIG_WPE2 BIT(6) +#define PSSIG_WPE1 BIT(5) +#define PSSIG_WRADIOPE BIT(4) +#define PSSIG_SPE3 BIT(3) +#define PSSIG_SPE2 BIT(2) +#define PSSIG_SPE1 BIT(1) +#define PSSIG_SRADIOPE BIT(0) + +/* Bits in the BBREGCTL register */ +#define BBREGCTL_DONE BIT(2) +#define BBREGCTL_REGR BIT(1) +#define BBREGCTL_REGW BIT(0) + +/* Bits in the IFREGCTL register */ +#define IFREGCTL_DONE BIT(2) +#define IFREGCTL_IFRF BIT(1) +#define IFREGCTL_REGW BIT(0) + +/* Bits in the SOFTPWRCTL register */ +#define SOFTPWRCTL_RFLEOPT BIT(3) +#define SOFTPWRCTL_TXPEINV BIT(1) +#define SOFTPWRCTL_SWPECTI BIT(0) +#define SOFTPWRCTL_SWPAPE BIT(5) +#define SOFTPWRCTL_SWCALEN BIT(4) +#define SOFTPWRCTL_SWRADIO_PE BIT(3) +#define SOFTPWRCTL_SWPE2 BIT(2) +#define SOFTPWRCTL_SWPE1 BIT(1) +#define SOFTPWRCTL_SWPE3 BIT(0) + +/* Bits in the GPIOCTL1 register */ +#define GPIO3_MD BIT(5) +#define GPIO3_DATA BIT(6) +#define GPIO3_INTMD BIT(7) + +/* Bits in the MISCFFCTL register */ +#define MISCFFCTL_WRITE BIT(0) + +/* Loopback mode */ +#define MAC_LB_EXT BIT(1) +#define MAC_LB_INTERNAL BIT(0) +#define MAC_LB_NONE 0x00 + +/* Ethernet address filter type */ +#define PKT_TYPE_NONE 0x00 /* turn off receiver */ +#define PKT_TYPE_ALL_MULTICAST BIT(7) +#define PKT_TYPE_PROMISCUOUS BIT(6) +#define PKT_TYPE_DIRECTED BIT(5) /* obselete */ +#define PKT_TYPE_BROADCAST BIT(4) +#define PKT_TYPE_MULTICAST BIT(3) +#define PKT_TYPE_ERROR_WPA BIT(2) +#define PKT_TYPE_ERROR_CRC BIT(1) +#define PKT_TYPE_BSSID BIT(0) + +#define DEFAULT_BI 0x200 + +/* MiscFIFO Offset */ +#define MISCFIFO_KEYETRY0 32 +#define MISCFIFO_KEYENTRYSIZE 22 + +#define MAC_REVISION_A0 0x00 +#define MAC_REVISION_A1 0x01 + +struct vnt_mac_set_key { + union { + struct { + u8 addr[ETH_ALEN]; + __le16 key_ctl; + } write __packed; + u32 swap[2]; + } u; + u8 key[WLAN_KEY_LEN_CCMP]; +} __packed; + +int vnt_mac_set_filter(struct vnt_private *priv, u64 mc_filter); +int vnt_mac_shutdown(struct vnt_private *priv); +int vnt_mac_set_bb_type(struct vnt_private *priv, u8 type); +int vnt_mac_disable_keyentry(struct vnt_private *priv, u8 entry_idx); +int vnt_mac_set_keyentry(struct vnt_private *priv, u16 key_ctl, u32 entry_idx, + u32 key_idx, u8 *addr, u8 *key); +int vnt_mac_reg_bits_off(struct vnt_private *priv, u8 reg_ofs, u8 bits); +int vnt_mac_reg_bits_on(struct vnt_private *priv, u8 reg_ofs, u8 bits); +int vnt_mac_write_word(struct vnt_private *priv, u8 reg_ofs, u16 word); +int vnt_mac_set_bssid_addr(struct vnt_private *priv, u8 *addr); +int vnt_mac_enable_protect_mode(struct vnt_private *priv); +int vnt_mac_disable_protect_mode(struct vnt_private *priv); +int vnt_mac_enable_barker_preamble_mode(struct vnt_private *priv); +int vnt_mac_disable_barker_preamble_mode(struct vnt_private *priv); +int vnt_mac_set_beacon_interval(struct vnt_private *priv, u16 interval); +int vnt_mac_set_led(struct vnt_private *privpriv, u8 state, u8 led); + +#endif /* __MAC_H__ */ |