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author | 2023-02-21 18:24:12 -0800 | |
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committer | 2023-02-21 18:24:12 -0800 | |
commit | 5b7c4cabbb65f5c469464da6c5f614cbd7f730f2 (patch) | |
tree | cc5c2d0a898769fd59549594fedb3ee6f84e59a0 /drivers/thermal/st/stm_thermal.c | |
download | linux-5b7c4cabbb65f5c469464da6c5f614cbd7f730f2.tar.gz linux-5b7c4cabbb65f5c469464da6c5f614cbd7f730f2.zip |
Merge tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-nextgrafted
Pull networking updates from Jakub Kicinski:
"Core:
- Add dedicated kmem_cache for typical/small skb->head, avoid having
to access struct page at kfree time, and improve memory use.
- Introduce sysctl to set default RPS configuration for new netdevs.
- Define Netlink protocol specification format which can be used to
describe messages used by each family and auto-generate parsers.
Add tools for generating kernel data structures and uAPI headers.
- Expose all net/core sysctls inside netns.
- Remove 4s sleep in netpoll if carrier is instantly detected on
boot.
- Add configurable limit of MDB entries per port, and port-vlan.
- Continue populating drop reasons throughout the stack.
- Retire a handful of legacy Qdiscs and classifiers.
Protocols:
- Support IPv4 big TCP (TSO frames larger than 64kB).
- Add IP_LOCAL_PORT_RANGE socket option, to control local port range
on socket by socket basis.
- Track and report in procfs number of MPTCP sockets used.
- Support mixing IPv4 and IPv6 flows in the in-kernel MPTCP path
manager.
- IPv6: don't check net.ipv6.route.max_size and rely on garbage
collection to free memory (similarly to IPv4).
- Support Penultimate Segment Pop (PSP) flavor in SRv6 (RFC8986).
- ICMP: add per-rate limit counters.
- Add support for user scanning requests in ieee802154.
- Remove static WEP support.
- Support minimal Wi-Fi 7 Extremely High Throughput (EHT) rate
reporting.
- WiFi 7 EHT channel puncturing support (client & AP).
BPF:
- Add a rbtree data structure following the "next-gen data structure"
precedent set by recently added linked list, that is, by using
kfunc + kptr instead of adding a new BPF map type.
- Expose XDP hints via kfuncs with initial support for RX hash and
timestamp metadata.
- Add BPF_F_NO_TUNNEL_KEY extension to bpf_skb_set_tunnel_key to
better support decap on GRE tunnel devices not operating in collect
metadata.
- Improve x86 JIT's codegen for PROBE_MEM runtime error checks.
- Remove the need for trace_printk_lock for bpf_trace_printk and
bpf_trace_vprintk helpers.
- Extend libbpf's bpf_tracing.h support for tracing arguments of
kprobes/uprobes and syscall as a special case.
- Significantly reduce the search time for module symbols by
livepatch and BPF.
- Enable cpumasks to be used as kptrs, which is useful for tracing
programs tracking which tasks end up running on which CPUs in
different time intervals.
- Add support for BPF trampoline on s390x and riscv64.
- Add capability to export the XDP features supported by the NIC.
- Add __bpf_kfunc tag for marking kernel functions as kfuncs.
- Add cgroup.memory=nobpf kernel parameter option to disable BPF
memory accounting for container environments.
Netfilter:
- Remove the CLUSTERIP target. It has been marked as obsolete for
years, and we still have WARN splats wrt races of the out-of-band
/proc interface installed by this target.
- Add 'destroy' commands to nf_tables. They are identical to the
existing 'delete' commands, but do not return an error if the
referenced object (set, chain, rule...) did not exist.
Driver API:
- Improve cpumask_local_spread() locality to help NICs set the right
IRQ affinity on AMD platforms.
- Separate C22 and C45 MDIO bus transactions more clearly.
- Introduce new DCB table to control DSCP rewrite on egress.
- Support configuration of Physical Layer Collision Avoidance (PLCA)
Reconciliation Sublayer (RS) (802.3cg-2019). Modern version of
shared medium Ethernet.
- Support for MAC Merge layer (IEEE 802.3-2018 clause 99). Allowing
preemption of low priority frames by high priority frames.
- Add support for controlling MACSec offload using netlink SET.
- Rework devlink instance refcounts to allow registration and
de-registration under the instance lock. Split the code into
multiple files, drop some of the unnecessarily granular locks and
factor out common parts of netlink operation handling.
- Add TX frame aggregation parameters (for USB drivers).
- Add a new attr TCA_EXT_WARN_MSG to report TC (offload) warning
messages with notifications for debug.
- Allow offloading of UDP NEW connections via act_ct.
- Add support for per action HW stats in TC.
- Support hardware miss to TC action (continue processing in SW from
a specific point in the action chain).
- Warn if old Wireless Extension user space interface is used with
modern cfg80211/mac80211 drivers. Do not support Wireless
Extensions for Wi-Fi 7 devices at all. Everyone should switch to
using nl80211 interface instead.
- Improve the CAN bit timing configuration. Use extack to return
error messages directly to user space, update the SJW handling,
including the definition of a new default value that will benefit
CAN-FD controllers, by increasing their oscillator tolerance.
New hardware / drivers:
- Ethernet:
- nVidia BlueField-3 support (control traffic driver)
- Ethernet support for imx93 SoCs
- Motorcomm yt8531 gigabit Ethernet PHY
- onsemi NCN26000 10BASE-T1S PHY (with support for PLCA)
- Microchip LAN8841 PHY (incl. cable diagnostics and PTP)
- Amlogic gxl MDIO mux
- WiFi:
- RealTek RTL8188EU (rtl8xxxu)
- Qualcomm Wi-Fi 7 devices (ath12k)
- CAN:
- Renesas R-Car V4H
Drivers:
- Bluetooth:
- Set Per Platform Antenna Gain (PPAG) for Intel controllers.
- Ethernet NICs:
- Intel (1G, igc):
- support TSN / Qbv / packet scheduling features of i226 model
- Intel (100G, ice):
- use GNSS subsystem instead of TTY
- multi-buffer XDP support
- extend support for GPIO pins to E823 devices
- nVidia/Mellanox:
- update the shared buffer configuration on PFC commands
- implement PTP adjphase function for HW offset control
- TC support for Geneve and GRE with VF tunnel offload
- more efficient crypto key management method
- multi-port eswitch support
- Netronome/Corigine:
- add DCB IEEE support
- support IPsec offloading for NFP3800
- Freescale/NXP (enetc):
- support XDP_REDIRECT for XDP non-linear buffers
- improve reconfig, avoid link flap and waiting for idle
- support MAC Merge layer
- Other NICs:
- sfc/ef100: add basic devlink support for ef100
- ionic: rx_push mode operation (writing descriptors via MMIO)
- bnxt: use the auxiliary bus abstraction for RDMA
- r8169: disable ASPM and reset bus in case of tx timeout
- cpsw: support QSGMII mode for J721e CPSW9G
- cpts: support pulse-per-second output
- ngbe: add an mdio bus driver
- usbnet: optimize usbnet_bh() by avoiding unnecessary queuing
- r8152: handle devices with FW with NCM support
- amd-xgbe: support 10Mbps, 2.5GbE speeds and rx-adaptation
- virtio-net: support multi buffer XDP
- virtio/vsock: replace virtio_vsock_pkt with sk_buff
- tsnep: XDP support
- Ethernet high-speed switches:
- nVidia/Mellanox (mlxsw):
- add support for latency TLV (in FW control messages)
- Microchip (sparx5):
- separate explicit and implicit traffic forwarding rules, make
the implicit rules always active
- add support for egress DSCP rewrite
- IS0 VCAP support (Ingress Classification)
- IS2 VCAP filters (protos, L3 addrs, L4 ports, flags, ToS
etc.)
- ES2 VCAP support (Egress Access Control)
- support for Per-Stream Filtering and Policing (802.1Q,
8.6.5.1)
- Ethernet embedded switches:
- Marvell (mv88e6xxx):
- add MAB (port auth) offload support
- enable PTP receive for mv88e6390
- NXP (ocelot):
- support MAC Merge layer
- support for the the vsc7512 internal copper phys
- Microchip:
- lan9303: convert to PHYLINK
- lan966x: support TC flower filter statistics
- lan937x: PTP support for KSZ9563/KSZ8563 and LAN937x
- lan937x: support Credit Based Shaper configuration
- ksz9477: support Energy Efficient Ethernet
- other:
- qca8k: convert to regmap read/write API, use bulk operations
- rswitch: Improve TX timestamp accuracy
- Intel WiFi (iwlwifi):
- EHT (Wi-Fi 7) rate reporting
- STEP equalizer support: transfer some STEP (connection to radio
on platforms with integrated wifi) related parameters from the
BIOS to the firmware.
- Qualcomm 802.11ax WiFi (ath11k):
- IPQ5018 support
- Fine Timing Measurement (FTM) responder role support
- channel 177 support
- MediaTek WiFi (mt76):
- per-PHY LED support
- mt7996: EHT (Wi-Fi 7) support
- Wireless Ethernet Dispatch (WED) reset support
- switch to using page pool allocator
- RealTek WiFi (rtw89):
- support new version of Bluetooth co-existance
- Mobile:
- rmnet: support TX aggregation"
* tag 'net-next-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1872 commits)
page_pool: add a comment explaining the fragment counter usage
net: ethtool: fix __ethtool_dev_mm_supported() implementation
ethtool: pse-pd: Fix double word in comments
xsk: add linux/vmalloc.h to xsk.c
sefltests: netdevsim: wait for devlink instance after netns removal
selftest: fib_tests: Always cleanup before exit
net/mlx5e: Align IPsec ASO result memory to be as required by hardware
net/mlx5e: TC, Set CT miss to the specific ct action instance
net/mlx5e: Rename CHAIN_TO_REG to MAPPED_OBJ_TO_REG
net/mlx5: Refactor tc miss handling to a single function
net/mlx5: Kconfig: Make tc offload depend on tc skb extension
net/sched: flower: Support hardware miss to tc action
net/sched: flower: Move filter handle initialization earlier
net/sched: cls_api: Support hardware miss to tc action
net/sched: Rename user cookie and act cookie
sfc: fix builds without CONFIG_RTC_LIB
sfc: clean up some inconsistent indentings
net/mlx4_en: Introduce flexible array to silence overflow warning
net: lan966x: Fix possible deadlock inside PTP
net/ulp: Remove redundant ->clone() test in inet_clone_ulp().
...
Diffstat (limited to 'drivers/thermal/st/stm_thermal.c')
-rw-r--r-- | drivers/thermal/st/stm_thermal.c | 599 |
1 files changed, 599 insertions, 0 deletions
diff --git a/drivers/thermal/st/stm_thermal.c b/drivers/thermal/st/stm_thermal.c new file mode 100644 index 000000000..735401958 --- /dev/null +++ b/drivers/thermal/st/stm_thermal.c @@ -0,0 +1,599 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) STMicroelectronics 2018 - All Rights Reserved + * Author: David Hernandez Sanchez <david.hernandezsanchez@st.com> for + * STMicroelectronics. + */ + +#include <linux/clk.h> +#include <linux/clk-provider.h> +#include <linux/delay.h> +#include <linux/err.h> +#include <linux/interrupt.h> +#include <linux/io.h> +#include <linux/iopoll.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_device.h> +#include <linux/platform_device.h> +#include <linux/thermal.h> + +#include "../thermal_hwmon.h" + +/* DTS register offsets */ +#define DTS_CFGR1_OFFSET 0x0 +#define DTS_T0VALR1_OFFSET 0x8 +#define DTS_RAMPVALR_OFFSET 0X10 +#define DTS_ITR1_OFFSET 0x14 +#define DTS_DR_OFFSET 0x1C +#define DTS_SR_OFFSET 0x20 +#define DTS_ITENR_OFFSET 0x24 +#define DTS_ICIFR_OFFSET 0x28 + +/* DTS_CFGR1 register mask definitions */ +#define HSREF_CLK_DIV_MASK GENMASK(30, 24) +#define TS1_SMP_TIME_MASK GENMASK(19, 16) +#define TS1_INTRIG_SEL_MASK GENMASK(11, 8) + +/* DTS_T0VALR1 register mask definitions */ +#define TS1_T0_MASK GENMASK(17, 16) +#define TS1_FMT0_MASK GENMASK(15, 0) + +/* DTS_RAMPVALR register mask definitions */ +#define TS1_RAMP_COEFF_MASK GENMASK(15, 0) + +/* DTS_ITR1 register mask definitions */ +#define TS1_HITTHD_MASK GENMASK(31, 16) +#define TS1_LITTHD_MASK GENMASK(15, 0) + +/* DTS_DR register mask definitions */ +#define TS1_MFREQ_MASK GENMASK(15, 0) + +/* DTS_ITENR register mask definitions */ +#define ITENR_MASK (GENMASK(2, 0) | GENMASK(6, 4)) + +/* DTS_ICIFR register mask definitions */ +#define ICIFR_MASK (GENMASK(2, 0) | GENMASK(6, 4)) + +/* Less significant bit position definitions */ +#define TS1_T0_POS 16 +#define TS1_HITTHD_POS 16 +#define TS1_LITTHD_POS 0 +#define HSREF_CLK_DIV_POS 24 + +/* DTS_CFGR1 bit definitions */ +#define TS1_EN BIT(0) +#define TS1_START BIT(4) +#define REFCLK_SEL BIT(20) +#define REFCLK_LSE REFCLK_SEL +#define Q_MEAS_OPT BIT(21) +#define CALIBRATION_CONTROL Q_MEAS_OPT + +/* DTS_SR bit definitions */ +#define TS_RDY BIT(15) +/* Bit definitions below are common for DTS_SR, DTS_ITENR and DTS_CIFR */ +#define HIGH_THRESHOLD BIT(2) +#define LOW_THRESHOLD BIT(1) + +/* Constants */ +#define ADJUST 100 +#define ONE_MHZ 1000000 +#define POLL_TIMEOUT 5000 +#define STARTUP_TIME 40 +#define TS1_T0_VAL0 30000 /* 30 celsius */ +#define TS1_T0_VAL1 130000 /* 130 celsius */ +#define NO_HW_TRIG 0 +#define SAMPLING_TIME 15 + +struct stm_thermal_sensor { + struct device *dev; + struct thermal_zone_device *th_dev; + enum thermal_device_mode mode; + struct clk *clk; + unsigned int low_temp_enabled; + unsigned int high_temp_enabled; + int irq; + void __iomem *base; + int t0, fmt0, ramp_coeff; +}; + +static int stm_enable_irq(struct stm_thermal_sensor *sensor) +{ + u32 value; + + dev_dbg(sensor->dev, "low:%d high:%d\n", sensor->low_temp_enabled, + sensor->high_temp_enabled); + + /* Disable IT generation for low and high thresholds */ + value = readl_relaxed(sensor->base + DTS_ITENR_OFFSET); + value &= ~(LOW_THRESHOLD | HIGH_THRESHOLD); + + if (sensor->low_temp_enabled) + value |= HIGH_THRESHOLD; + + if (sensor->high_temp_enabled) + value |= LOW_THRESHOLD; + + /* Enable interrupts */ + writel_relaxed(value, sensor->base + DTS_ITENR_OFFSET); + + return 0; +} + +static irqreturn_t stm_thermal_irq_handler(int irq, void *sdata) +{ + struct stm_thermal_sensor *sensor = sdata; + + dev_dbg(sensor->dev, "sr:%d\n", + readl_relaxed(sensor->base + DTS_SR_OFFSET)); + + thermal_zone_device_update(sensor->th_dev, THERMAL_EVENT_UNSPECIFIED); + + stm_enable_irq(sensor); + + /* Acknoledge all DTS irqs */ + writel_relaxed(ICIFR_MASK, sensor->base + DTS_ICIFR_OFFSET); + + return IRQ_HANDLED; +} + +static int stm_sensor_power_on(struct stm_thermal_sensor *sensor) +{ + int ret; + u32 value; + + /* Enable sensor */ + value = readl_relaxed(sensor->base + DTS_CFGR1_OFFSET); + value |= TS1_EN; + writel_relaxed(value, sensor->base + DTS_CFGR1_OFFSET); + + /* + * The DTS block can be enabled by setting TSx_EN bit in + * DTS_CFGRx register. It requires a startup time of + * 40μs. Use 5 ms as arbitrary timeout. + */ + ret = readl_poll_timeout(sensor->base + DTS_SR_OFFSET, + value, (value & TS_RDY), + STARTUP_TIME, POLL_TIMEOUT); + if (ret) + return ret; + + /* Start continuous measuring */ + value = readl_relaxed(sensor->base + + DTS_CFGR1_OFFSET); + value |= TS1_START; + writel_relaxed(value, sensor->base + + DTS_CFGR1_OFFSET); + + sensor->mode = THERMAL_DEVICE_ENABLED; + + return 0; +} + +static int stm_sensor_power_off(struct stm_thermal_sensor *sensor) +{ + u32 value; + + sensor->mode = THERMAL_DEVICE_DISABLED; + + /* Stop measuring */ + value = readl_relaxed(sensor->base + DTS_CFGR1_OFFSET); + value &= ~TS1_START; + writel_relaxed(value, sensor->base + DTS_CFGR1_OFFSET); + + /* Ensure stop is taken into account */ + usleep_range(STARTUP_TIME, POLL_TIMEOUT); + + /* Disable sensor */ + value = readl_relaxed(sensor->base + DTS_CFGR1_OFFSET); + value &= ~TS1_EN; + writel_relaxed(value, sensor->base + DTS_CFGR1_OFFSET); + + /* Ensure disable is taken into account */ + return readl_poll_timeout(sensor->base + DTS_SR_OFFSET, value, + !(value & TS_RDY), + STARTUP_TIME, POLL_TIMEOUT); +} + +static int stm_thermal_calibration(struct stm_thermal_sensor *sensor) +{ + u32 value, clk_freq; + u32 prescaler; + + /* Figure out prescaler value for PCLK during calibration */ + clk_freq = clk_get_rate(sensor->clk); + if (!clk_freq) + return -EINVAL; + + prescaler = 0; + clk_freq /= ONE_MHZ; + if (clk_freq) { + while (prescaler <= clk_freq) + prescaler++; + } + + value = readl_relaxed(sensor->base + DTS_CFGR1_OFFSET); + + /* Clear prescaler */ + value &= ~HSREF_CLK_DIV_MASK; + + /* Set prescaler. pclk_freq/prescaler < 1MHz */ + value |= (prescaler << HSREF_CLK_DIV_POS); + + /* Select PCLK as reference clock */ + value &= ~REFCLK_SEL; + + /* Set maximal sampling time for better precision */ + value |= TS1_SMP_TIME_MASK; + + /* Measure with calibration */ + value &= ~CALIBRATION_CONTROL; + + /* select trigger */ + value &= ~TS1_INTRIG_SEL_MASK; + value |= NO_HW_TRIG; + + writel_relaxed(value, sensor->base + DTS_CFGR1_OFFSET); + + return 0; +} + +/* Fill in DTS structure with factory sensor values */ +static int stm_thermal_read_factory_settings(struct stm_thermal_sensor *sensor) +{ + /* Retrieve engineering calibration temperature */ + sensor->t0 = readl_relaxed(sensor->base + DTS_T0VALR1_OFFSET) & + TS1_T0_MASK; + if (!sensor->t0) + sensor->t0 = TS1_T0_VAL0; + else + sensor->t0 = TS1_T0_VAL1; + + /* Retrieve fmt0 and put it on Hz */ + sensor->fmt0 = ADJUST * (readl_relaxed(sensor->base + + DTS_T0VALR1_OFFSET) & TS1_FMT0_MASK); + + /* Retrieve ramp coefficient */ + sensor->ramp_coeff = readl_relaxed(sensor->base + DTS_RAMPVALR_OFFSET) & + TS1_RAMP_COEFF_MASK; + + if (!sensor->fmt0 || !sensor->ramp_coeff) { + dev_err(sensor->dev, "%s: wrong setting\n", __func__); + return -EINVAL; + } + + dev_dbg(sensor->dev, "%s: T0 = %doC, FMT0 = %dHz, RAMP_COEFF = %dHz/oC", + __func__, sensor->t0, sensor->fmt0, sensor->ramp_coeff); + + return 0; +} + +static int stm_thermal_calculate_threshold(struct stm_thermal_sensor *sensor, + int temp, u32 *th) +{ + int freqM; + + /* Figure out the CLK_PTAT frequency for a given temperature */ + freqM = ((temp - sensor->t0) * sensor->ramp_coeff) / 1000 + + sensor->fmt0; + + /* Figure out the threshold sample number */ + *th = clk_get_rate(sensor->clk) * SAMPLING_TIME / freqM; + if (!*th) + return -EINVAL; + + dev_dbg(sensor->dev, "freqM=%d Hz, threshold=0x%x", freqM, *th); + + return 0; +} + +/* Disable temperature interrupt */ +static int stm_disable_irq(struct stm_thermal_sensor *sensor) +{ + u32 value; + + /* Disable IT generation */ + value = readl_relaxed(sensor->base + DTS_ITENR_OFFSET); + value &= ~ITENR_MASK; + writel_relaxed(value, sensor->base + DTS_ITENR_OFFSET); + + return 0; +} + +static int stm_thermal_set_trips(struct thermal_zone_device *tz, int low, int high) +{ + struct stm_thermal_sensor *sensor = tz->devdata; + u32 itr1, th; + int ret; + + dev_dbg(sensor->dev, "set trips %d <--> %d\n", low, high); + + /* Erase threshold content */ + itr1 = readl_relaxed(sensor->base + DTS_ITR1_OFFSET); + itr1 &= ~(TS1_LITTHD_MASK | TS1_HITTHD_MASK); + + /* + * Disable low-temp if "low" is too small. As per thermal framework + * API, we use -INT_MAX rather than INT_MIN. + */ + + if (low > -INT_MAX) { + sensor->low_temp_enabled = 1; + /* add 0.5 of hysteresis due to measurement error */ + ret = stm_thermal_calculate_threshold(sensor, low - 500, &th); + if (ret) + return ret; + + itr1 |= (TS1_HITTHD_MASK & (th << TS1_HITTHD_POS)); + } else { + sensor->low_temp_enabled = 0; + } + + /* Disable high-temp if "high" is too big. */ + if (high < INT_MAX) { + sensor->high_temp_enabled = 1; + ret = stm_thermal_calculate_threshold(sensor, high, &th); + if (ret) + return ret; + + itr1 |= (TS1_LITTHD_MASK & (th << TS1_LITTHD_POS)); + } else { + sensor->high_temp_enabled = 0; + } + + /* Write new threshod values*/ + writel_relaxed(itr1, sensor->base + DTS_ITR1_OFFSET); + + return 0; +} + +/* Callback to get temperature from HW */ +static int stm_thermal_get_temp(struct thermal_zone_device *tz, int *temp) +{ + struct stm_thermal_sensor *sensor = tz->devdata; + u32 periods; + int freqM, ret; + + if (sensor->mode != THERMAL_DEVICE_ENABLED) + return -EAGAIN; + + /* Retrieve the number of periods sampled */ + ret = readl_relaxed_poll_timeout(sensor->base + DTS_DR_OFFSET, periods, + (periods & TS1_MFREQ_MASK), + STARTUP_TIME, POLL_TIMEOUT); + if (ret) + return ret; + + /* Figure out the CLK_PTAT frequency */ + freqM = (clk_get_rate(sensor->clk) * SAMPLING_TIME) / periods; + if (!freqM) + return -EINVAL; + + /* Figure out the temperature in mili celsius */ + *temp = (freqM - sensor->fmt0) * 1000 / sensor->ramp_coeff + sensor->t0; + + return 0; +} + +/* Registers DTS irq to be visible by GIC */ +static int stm_register_irq(struct stm_thermal_sensor *sensor) +{ + struct device *dev = sensor->dev; + struct platform_device *pdev = to_platform_device(dev); + int ret; + + sensor->irq = platform_get_irq(pdev, 0); + if (sensor->irq < 0) + return sensor->irq; + + ret = devm_request_threaded_irq(dev, sensor->irq, + NULL, + stm_thermal_irq_handler, + IRQF_ONESHOT, + dev->driver->name, sensor); + if (ret) { + dev_err(dev, "%s: Failed to register IRQ %d\n", __func__, + sensor->irq); + return ret; + } + + dev_dbg(dev, "%s: thermal IRQ registered", __func__); + + return 0; +} + +static int stm_thermal_sensor_off(struct stm_thermal_sensor *sensor) +{ + int ret; + + stm_disable_irq(sensor); + + ret = stm_sensor_power_off(sensor); + if (ret) + return ret; + + clk_disable_unprepare(sensor->clk); + + return 0; +} + +static int stm_thermal_prepare(struct stm_thermal_sensor *sensor) +{ + int ret; + + ret = clk_prepare_enable(sensor->clk); + if (ret) + return ret; + + ret = stm_thermal_read_factory_settings(sensor); + if (ret) + goto thermal_unprepare; + + ret = stm_thermal_calibration(sensor); + if (ret) + goto thermal_unprepare; + + return 0; + +thermal_unprepare: + clk_disable_unprepare(sensor->clk); + + return ret; +} + +#ifdef CONFIG_PM_SLEEP +static int stm_thermal_suspend(struct device *dev) +{ + struct stm_thermal_sensor *sensor = dev_get_drvdata(dev); + + return stm_thermal_sensor_off(sensor); +} + +static int stm_thermal_resume(struct device *dev) +{ + int ret; + struct stm_thermal_sensor *sensor = dev_get_drvdata(dev); + + ret = stm_thermal_prepare(sensor); + if (ret) + return ret; + + ret = stm_sensor_power_on(sensor); + if (ret) + return ret; + + thermal_zone_device_update(sensor->th_dev, THERMAL_EVENT_UNSPECIFIED); + stm_enable_irq(sensor); + + return 0; +} +#endif /* CONFIG_PM_SLEEP */ + +static SIMPLE_DEV_PM_OPS(stm_thermal_pm_ops, + stm_thermal_suspend, stm_thermal_resume); + +static const struct thermal_zone_device_ops stm_tz_ops = { + .get_temp = stm_thermal_get_temp, + .set_trips = stm_thermal_set_trips, +}; + +static const struct of_device_id stm_thermal_of_match[] = { + { .compatible = "st,stm32-thermal"}, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, stm_thermal_of_match); + +static int stm_thermal_probe(struct platform_device *pdev) +{ + struct stm_thermal_sensor *sensor; + void __iomem *base; + int ret; + + if (!pdev->dev.of_node) { + dev_err(&pdev->dev, "%s: device tree node not found\n", + __func__); + return -EINVAL; + } + + sensor = devm_kzalloc(&pdev->dev, sizeof(*sensor), GFP_KERNEL); + if (!sensor) + return -ENOMEM; + + platform_set_drvdata(pdev, sensor); + + sensor->dev = &pdev->dev; + + base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); + if (IS_ERR(base)) + return PTR_ERR(base); + + /* Populate sensor */ + sensor->base = base; + + sensor->clk = devm_clk_get(&pdev->dev, "pclk"); + if (IS_ERR(sensor->clk)) { + dev_err(&pdev->dev, "%s: failed to fetch PCLK clock\n", + __func__); + return PTR_ERR(sensor->clk); + } + + stm_disable_irq(sensor); + + /* Clear irq flags */ + writel_relaxed(ICIFR_MASK, sensor->base + DTS_ICIFR_OFFSET); + + /* Configure and enable HW sensor */ + ret = stm_thermal_prepare(sensor); + if (ret) { + dev_err(&pdev->dev, "Error prepare sensor: %d\n", ret); + return ret; + } + + ret = stm_sensor_power_on(sensor); + if (ret) { + dev_err(&pdev->dev, "Error power on sensor: %d\n", ret); + return ret; + } + + sensor->th_dev = devm_thermal_of_zone_register(&pdev->dev, 0, + sensor, + &stm_tz_ops); + + if (IS_ERR(sensor->th_dev)) { + dev_err(&pdev->dev, "%s: thermal zone sensor registering KO\n", + __func__); + ret = PTR_ERR(sensor->th_dev); + return ret; + } + + /* Register IRQ into GIC */ + ret = stm_register_irq(sensor); + if (ret) + goto err_tz; + + stm_enable_irq(sensor); + + /* + * Thermal_zone doesn't enable hwmon as default, + * enable it here + */ + sensor->th_dev->tzp->no_hwmon = false; + ret = thermal_add_hwmon_sysfs(sensor->th_dev); + if (ret) + goto err_tz; + + dev_info(&pdev->dev, "%s: Driver initialized successfully\n", + __func__); + + return 0; + +err_tz: + return ret; +} + +static int stm_thermal_remove(struct platform_device *pdev) +{ + struct stm_thermal_sensor *sensor = platform_get_drvdata(pdev); + + stm_thermal_sensor_off(sensor); + thermal_remove_hwmon_sysfs(sensor->th_dev); + + return 0; +} + +static struct platform_driver stm_thermal_driver = { + .driver = { + .name = "stm_thermal", + .pm = &stm_thermal_pm_ops, + .of_match_table = stm_thermal_of_match, + }, + .probe = stm_thermal_probe, + .remove = stm_thermal_remove, +}; +module_platform_driver(stm_thermal_driver); + +MODULE_DESCRIPTION("STMicroelectronics STM32 Thermal Sensor Driver"); +MODULE_AUTHOR("David Hernandez Sanchez <david.hernandezsanchez@st.com>"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:stm_thermal"); |